263 commits

This branch

This branch

All branches

Author	SHA1	Message	Date
Raphael Jacquot	23a8e32e31	implement more things, test with ice40	2019-02-10 12:04:53 +01:00
Raphael Jacquot	4594dec086	more stuff implemented	2019-02-10 09:02:24 +01:00
Raphael Jacquot	71b2349831	lots of corrections	2019-02-09 19:18:58 +01:00
Raphael Jacquot	b0b3373e30	implement more versions of RTN	2019-02-09 12:03:43 +01:00
Raphael Jacquot	8fa16e6a1e	add more stuff	2019-02-09 11:53:45 +01:00
Raphael Jacquot	de5bfe83cc	implement loading into D1 too	2019-02-09 09:49:22 +01:00
Raphael Jacquot	8ae31087eb	bus access all rewritten	2019-02-09 09:32:29 +01:00
Raphael Jacquot	c0e4c0b20c	apply identical treatment for BRAM access	2019-02-09 01:13:57 +01:00
Raphael Jacquot	da4299fd19	reading and writing to the blockram should be in separate always blocks	2019-02-09 01:06:44 +01:00
Raphael Jacquot	dfc315937a	whitespace fix	2019-02-09 00:59:38 +01:00
Raphael Jacquot	f8ef195563	refactor access to the sysram array	2019-02-09 00:55:09 +01:00
Raphael Jacquot	229aab83fe	rename and change a lot of things	2019-02-09 00:02:09 +01:00
Raphael Jacquot	686f91f1c9	Implement reset	2019-02-09 00:01:48 +01:00
Raphael Jacquot	c86de581d0	cleanup	2019-02-09 00:01:30 +01:00
Raphael Jacquot	322b176497	implement RTNSXM, fix RTNCC	2019-02-09 00:01:18 +01:00
Raphael Jacquot	ccd373243f	implement a couple mode opcodes	2019-02-08 23:59:56 +01:00
Raphael Jacquot	bb298832ff	add GOSUB	2019-02-08 23:59:36 +01:00
Raphael Jacquot	5a834d9006	remove	2019-02-08 21:12:11 +01:00
Raphael Jacquot	2d5a5d7457	implement CONFIGURE and DP_WRITE	2019-02-08 21:11:47 +01:00
Raphael Jacquot	cd185eeff0	rewrite in less spaghetti code style	2019-02-08 19:09:13 +01:00
Raphael Jacquot	92fe235e07	add an instruction counter	2019-02-08 12:46:32 +01:00
Raphael Jacquot	a56f472a45	optimize SETDEC	2019-02-08 11:55:47 +01:00
Raphael Jacquot	0f456bf0af	fix more PC handling issues	2019-02-08 11:47:06 +01:00
Raphael Jacquot	5559deab1d	fix more PC stuff	2019-02-08 11:15:16 +01:00
Raphael Jacquot	bcf79c9d7d	fix handling of PC increments and the like	2019-02-08 11:06:19 +01:00
Raphael Jacquot	90a8a4e9a9	implement more stuff	2019-02-08 00:02:55 +01:00
Raphael Jacquot	24c49893a1	implement more instructions, catch errors	2019-02-07 23:31:35 +01:00
Raphael Jacquot	55bdfed19a	entirely redesign the state machine	2019-02-07 22:54:06 +01:00
Raphael Jacquot	4800c6f241	try replacing all ifs with a case... yosys blows up too	2019-02-07 11:54:11 +01:00
Raphael Jacquot	0940b198d3	remove multiple posedge clk, which doesn't work	2019-02-07 09:38:27 +01:00
Raphael Jacquot	5a5fc9c775	fix all bad warnings	2019-02-07 08:55:41 +01:00
Raphael Jacquot	b5c3a56273	separate reading instructions from reading data	2019-02-07 08:35:59 +01:00
Raphael Jacquot	b519f3d8b3	use a yosys config file instead	2019-02-07 07:11:25 +01:00
Raphael Jacquot	7a1bc5956e	add an ifdef	2019-02-07 07:11:11 +01:00
Raphael Jacquot	4c9925c1a3	fix yosys warning	2019-02-07 07:10:33 +01:00
Raphael Jacquot	953323c7b8	rename runstates and starts splitting things up	2019-02-07 06:29:47 +01:00
Raphael Jacquot	3c32cbc213	attempt to fix bus	2019-02-06 17:50:36 +01:00
Raphael Jacquot	b8fa3b2df0	fix nibble_out in bus	2019-02-06 17:43:14 +01:00
Raphael Jacquot	62b1ab0292	attempt at bus are failing. what am I missing ?	2019-02-06 17:39:25 +01:00
Raphael Jacquot	b0bbacb0cc	fix bad assign types	2019-02-06 16:44:52 +01:00
Raphael Jacquot	98ff32e61c	make messages for GOTO, GOVLNG and GOSBVL better	2019-02-06 16:14:09 +01:00
Raphael Jacquot	16d9149f1a	implement the bus, with priority. currently, only rom and io_ram	2019-02-06 16:04:02 +01:00
Raphael Jacquot	c77b714777	implement some of the bus commands for the io_ram module.	2019-02-06 14:33:44 +01:00
Raphael Jacquot	82f4df8e93	add licence info	2019-02-06 10:40:55 +01:00
Raphael Jacquot	11d3d1dfef	add io_ram block (unfinished)	2019-02-05 08:49:14 +01:00
Raphael Jacquot	cc632307ea	implement decoding of data transfers	2019-02-05 07:07:19 +01:00
Raphael Jacquot	14272d9978	finish re-coding all instructions	2019-02-04 23:51:36 +01:00
Raphael Jacquot	40d75acc8f	implement more stuff	2019-02-04 22:08:17 +01:00
Raphael Jacquot	713689b0f9	fix some verilator warnings	2019-02-04 20:36:47 +01:00
Raphael Jacquot	355539aaaf	handle 0	2019-02-04 18:35:53 +01:00