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  • 9ecdc1799b successfully handles the first 4 opcodes and bails out on error Raphael Jacquot 2019-02-11 22:57:00 +0100
  • 17c2278c99 yay, decodes the first 4 opcodes \o/ Raphael Jacquot 2019-02-11 22:29:13 +0100
  • 21c09f0c5f first iteration of decoder version 3 ;-) Raphael Jacquot 2019-02-11 21:36:02 +0100
  • c454fb8b97 test of new decoder structure Raphael Jacquot 2019-02-11 21:29:04 +0100
  • 2c06ce0359 major surgery in progress Raphael Jacquot 2019-02-11 20:27:51 +0100
  • 9b2f5fa41c more clocking work Raphael Jacquot 2019-02-11 19:49:22 +0100
  • be83ee0eed rework the clocking Raphael Jacquot 2019-02-11 19:24:57 +0100
  • 6c41e73688 update clock timings Raphael Jacquot 2019-02-11 16:58:15 +0100
  • cbfbe4eb3f renumber debug opcodes add add_cst and sub_cst alu opcodes port pointer math to use ALU make A[ab]x more readable Raphael Jacquot 2019-02-11 15:36:51 +0100
  • 9799ea7618 use the ALU for 13x opcodes comment debug code add some debug code elsewhere Raphael Jacquot 2019-02-11 13:17:18 +0100
  • 61bb45c54f cleanup Raphael Jacquot 2019-02-11 12:05:51 +0100
  • b39c56a43c make things more readable Raphael Jacquot 2019-02-11 11:29:31 +0100
  • 8b63d25e8f cleanups Raphael Jacquot 2019-02-11 10:41:34 +0100
  • 6407e6673e implement EXCH alu op Raphael Jacquot 2019-02-11 10:29:22 +0100
  • 6d8924cf1d clear alu_debug and dbg_op_code on each instruction start Raphael Jacquot 2019-02-11 10:29:05 +0100
  • 046fa457be add stuff for a future debugger Raphael Jacquot 2019-02-11 09:13:16 +0100
  • 17b8b14db7 more fixes Raphael Jacquot 2019-02-11 09:13:06 +0100
  • 6a1e9eff7e various ALU fixage Raphael Jacquot 2019-02-11 09:12:42 +0100
  • 0eeb018b56 move to using the ALU Raphael Jacquot 2019-02-11 09:12:19 +0100
  • 9cd9c18381 add new registers Raphael Jacquot 2019-02-11 09:11:40 +0100
  • 46890c6394 refactor ALU operations Raphael Jacquot 2019-02-11 07:04:42 +0100
  • d6a8bee3fe add a register "comes from memory" Raphael Jacquot 2019-02-11 07:03:55 +0100
  • 1799ac8eb6 remove DEC_LC_LEN -> DEC_LC Raphael Jacquot 2019-02-11 07:03:37 +0100
  • aa95324ea9 implement LC with ALU operations (need to find a way to output the instruction representation) Raphael Jacquot 2019-02-11 07:03:20 +0100
  • d6b59740dd add Dn=(2) Raphael Jacquot 2019-02-10 23:00:20 +0100
  • 43dd894888 more work on ALU Raphael Jacquot 2019-02-10 23:00:06 +0100
  • 799fc3c327 convert stuff to use the ALU module instead Raphael Jacquot 2019-02-10 22:02:39 +0100
  • f21dcd8c23 add alu stuff Raphael Jacquot 2019-02-10 18:46:26 +0100
  • ec83140ff3 remove some stuff Raphael Jacquot 2019-02-10 18:45:52 +0100
  • c26772b4f9 implement RSTK=C Raphael Jacquot 2019-02-10 13:57:30 +0100
  • 4e33d9c145 fix documentation comprehension error Raphael Jacquot 2019-02-10 13:50:11 +0100
  • efd93e4a95 add or substract constant do D0 and D1 Raphael Jacquot 2019-02-10 13:39:56 +0100
  • bde3e1a027 add D0=(4) and transfer on field W Raphael Jacquot 2019-02-10 12:47:50 +0100
  • 23a8e32e31 implement more things, test with ice40 Raphael Jacquot 2019-02-10 12:04:53 +0100
  • 4594dec086 more stuff implemented Raphael Jacquot 2019-02-10 09:02:24 +0100
  • 71b2349831 lots of corrections Raphael Jacquot 2019-02-09 19:18:58 +0100
  • b0b3373e30 implement more versions of RTN Raphael Jacquot 2019-02-09 12:03:43 +0100
  • 8fa16e6a1e add more stuff Raphael Jacquot 2019-02-09 11:53:45 +0100
  • de5bfe83cc implement loading into D1 too Raphael Jacquot 2019-02-09 09:49:22 +0100
  • 8ae31087eb bus access all rewritten Raphael Jacquot 2019-02-09 09:32:29 +0100
  • c0e4c0b20c apply identical treatment for BRAM access Raphael Jacquot 2019-02-09 01:13:57 +0100
  • da4299fd19 reading and writing to the blockram should be in separate always blocks Raphael Jacquot 2019-02-09 01:06:44 +0100
  • dfc315937a whitespace fix Raphael Jacquot 2019-02-09 00:59:38 +0100
  • f8ef195563 refactor access to the sysram array Raphael Jacquot 2019-02-09 00:55:09 +0100
  • 229aab83fe rename and change a lot of things Raphael Jacquot 2019-02-09 00:02:09 +0100
  • 686f91f1c9 Implement reset Raphael Jacquot 2019-02-09 00:01:48 +0100
  • c86de581d0 cleanup Raphael Jacquot 2019-02-09 00:01:30 +0100
  • 322b176497 implement RTNSXM, fix RTNCC Raphael Jacquot 2019-02-09 00:01:18 +0100
  • ccd373243f implement a couple mode opcodes Raphael Jacquot 2019-02-08 23:59:56 +0100
  • bb298832ff add GOSUB Raphael Jacquot 2019-02-08 23:59:36 +0100
  • 5a834d9006 remove Raphael Jacquot 2019-02-08 21:12:11 +0100
  • 2d5a5d7457 implement CONFIGURE and DP_WRITE Raphael Jacquot 2019-02-08 21:11:47 +0100
  • cd185eeff0 rewrite in less spaghetti code style Raphael Jacquot 2019-02-08 19:09:13 +0100
  • 92fe235e07 add an instruction counter Raphael Jacquot 2019-02-08 12:46:32 +0100
  • a56f472a45 optimize SETDEC Raphael Jacquot 2019-02-08 11:55:47 +0100
  • 0f456bf0af fix more PC handling issues Raphael Jacquot 2019-02-08 11:47:06 +0100
  • 5559deab1d fix more PC stuff Raphael Jacquot 2019-02-08 11:15:16 +0100
  • bcf79c9d7d fix handling of PC increments and the like Raphael Jacquot 2019-02-08 11:06:19 +0100
  • 90a8a4e9a9 implement more stuff Raphael Jacquot 2019-02-08 00:02:55 +0100
  • 24c49893a1 implement more instructions, catch errors Raphael Jacquot 2019-02-07 23:31:35 +0100
  • 55bdfed19a entirely redesign the state machine Raphael Jacquot 2019-02-07 22:54:06 +0100
  • 4800c6f241 try replacing all ifs with a case... yosys blows up too Raphael Jacquot 2019-02-07 11:54:11 +0100
  • 0940b198d3 remove multiple posedge clk, which doesn't work Raphael Jacquot 2019-02-07 09:38:27 +0100
  • 5a5fc9c775 fix all bad warnings Raphael Jacquot 2019-02-07 08:55:41 +0100
  • b5c3a56273 separate reading instructions from reading data Raphael Jacquot 2019-02-07 08:35:59 +0100
  • b519f3d8b3 use a yosys config file instead Raphael Jacquot 2019-02-07 07:11:25 +0100
  • 7a1bc5956e add an ifdef Raphael Jacquot 2019-02-07 07:11:11 +0100
  • 4c9925c1a3 fix yosys warning Raphael Jacquot 2019-02-07 07:10:33 +0100
  • 953323c7b8 rename runstates and starts splitting things up Raphael Jacquot 2019-02-07 06:29:47 +0100
  • 3c32cbc213 attempt to fix bus Raphael Jacquot 2019-02-06 17:50:36 +0100
  • b8fa3b2df0 fix nibble_out in bus Raphael Jacquot 2019-02-06 17:43:14 +0100
  • 62b1ab0292 attempt at bus are failing. what am I missing ? Raphael Jacquot 2019-02-06 17:39:25 +0100
  • b0bbacb0cc fix bad assign types Raphael Jacquot 2019-02-06 16:44:52 +0100
  • 98ff32e61c make messages for GOTO, GOVLNG and GOSBVL better Raphael Jacquot 2019-02-06 16:14:09 +0100
  • 16d9149f1a implement the bus, with priority. currently, only rom and io_ram Raphael Jacquot 2019-02-06 16:04:02 +0100
  • c77b714777 implement some of the bus commands for the io_ram module. Raphael Jacquot 2019-02-06 14:33:44 +0100
  • 82f4df8e93 add licence info Raphael Jacquot 2019-02-06 10:40:55 +0100
  • 11d3d1dfef add io_ram block (unfinished) Raphael Jacquot 2019-02-05 08:49:14 +0100
  • cc632307ea implement decoding of data transfers Raphael Jacquot 2019-02-05 07:07:19 +0100
  • 14272d9978 finish re-coding all instructions Raphael Jacquot 2019-02-04 23:51:36 +0100
  • 40d75acc8f implement more stuff Raphael Jacquot 2019-02-04 22:08:17 +0100
  • 713689b0f9 fix some verilator warnings Raphael Jacquot 2019-02-04 20:36:47 +0100
  • 355539aaaf handle 0 Raphael Jacquot 2019-02-04 18:35:53 +0100
  • 36fb15a209 add some comments Raphael Jacquot 2019-02-04 18:17:14 +0100
  • 59186f6bf8 do more instructions Raphael Jacquot 2019-02-04 18:00:08 +0100
  • d743217132 make it one single process Raphael Jacquot 2019-02-04 17:46:29 +0100
  • d2e7f7d035 commit more stuff Raphael Jacquot 2019-02-04 17:14:08 +0100
  • 7fcce53689 implement ST=[01] n Raphael Jacquot 2019-02-04 17:00:08 +0100
  • 610647d724 add some ifdefs to hide the various display statements Raphael Jacquot 2019-02-04 16:49:11 +0100
  • 5d8fcd41fa transform more pieces (DECODE_8) Raphael Jacquot 2019-02-04 15:48:06 +0100
  • ffaf23b363 handle GOTO in the new form Raphael Jacquot 2019-02-04 15:30:18 +0100
  • 9b8428c14c redesigning after people looked at it Raphael Jacquot 2019-02-04 15:02:33 +0100
  • a44c6f6f36 change the way the rom is encoded, makes things easier Raphael Jacquot 2019-02-04 11:31:58 +0100
  • 9f0fadf1b1 more changes Raphael Jacquot 2019-02-04 10:55:17 +0100
  • 2974a63e02 changed some things from suggestions Raphael Jacquot 2019-02-04 10:38:42 +0100
  • 28d4ae60c6 add initial load Raphael Jacquot 2019-02-04 09:59:35 +0100