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add stuff for a future debugger

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This commit is contained in:
Raphael Jacquot 2019-02-11 09:13:16 +01:00
parent 17b8b14db7
commit 046fa457be
3 changed files with 78 additions and 2 deletions
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31
dbg_const.v Normal file
View file

@ -0,0 +1,31 @@
`ifndef _DBG_CONST
`define _DBG_CONST
`define DBG_OP_RTNSXM 16'h0001
`define DBG_OP_RTN 16'h0002
`define DBG_OP_RTNSC 16'h0003
`define DBG_OP_RTNCC 16'h0004
`define DBG_OP_SETHEX 16'h0005
`define DBG_OP_SETDEC 16'h0006
`define DBG_OP_RSTK_C 16'h0007
`define DBG_OP_C_RSTK 16'h0008
`define DBG_OP_CLRST 16'h0009
`define DBG_OP_C_ST 16'h000A
`define DBG_OP_ST_C 16'h000B
`define DBG_OP_CSTEX 16'h000C
`define DBG_OP_INC_P 16'h000D
`define DBG_OP_DEC_P 16'h000E
`define DBG_OP_AND 16'h000F
`define DBG_OP_OR 16'h0010
`define DBG_OP_RTI 16'h0011
`define DBG_OP_COPY_FULL 16'h0012
`define DBG_OP_EXCH_FULL 16'h0013
`define DBG_OP_MEM_IN 16'h0014
`define DBG_OP_MEM_OUT 16'h0015
`define DBG_OP_ADD_CONST 16'h0016
`define DBG_OP_SUB_CONST 16'h0017
`define DBG_OP_LOAD_IMM 16'h0018
`endif

9
dbg_module.v Normal file
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@ -0,0 +1,9 @@
`ifndef _DBG_MOD
`define _DBG_MOD
`include "dbg_const.v"
// case
// endcase
`endif

40
saturn_core.v
View file

@ -6,6 +6,7 @@
`include "bus_commands.v"
`include "hp48_00_bus.v"
`include "dbg_module.v"
/**************************************************************************************************
*
@ -59,6 +60,7 @@ wire dec_strobe;
// state machine stuff
wire halt;
reg cycle_ctr_ready;
reg [31:0] cycle_ctr;
reg [31:0] instr_ctr;
reg decode_error;
@ -143,11 +145,24 @@ reg alu_res_carry;
reg [3:0] alu_tmp;
reg alu_carry;
reg alu_debug;
reg alu_p1_halt;
reg alu_p2_halt;
reg alu_halt;
reg alu_requested_halt;
reg [11:0] alu_return;
reg [3:0] alu_next_cycle;
// debugger registers
reg [19:0] dbg_op_addr;
reg [15:0] dbg_op_code;
reg [3:0] dbg_reg_dest;
reg [3:0] dbg_reg_src1;
reg [3:0] dbg_reg_src2;
reg [3:0] dbg_field;
reg [3:0] dbg_first;
reg [3:0] dbg_last;
reg [63:0] dbg_data;
// processor registers
reg [19:0] PC;
reg [3:0] P;
@ -186,8 +201,11 @@ initial
clk3 = 0;
en_bus_clk = 0;
$display("initialize cycle counter");
cycle_ctr = -1;
cycle_ctr_ready = 0;
cycle_ctr = 0;
instr_ctr = 0;
$display("initializing debugger");
dbg_op_code = 0;
$display("initializing bus_command");
bus_command = `BUSCMD_NOP;
$display("initializing busstate");
@ -202,6 +220,8 @@ initial
read_next_pc = 1;
execute_cycle = 0;
inc_pc = 0;
alu_p1_halt = 0;
alu_p2_halt = 0;
alu_halt = 0;
alu_requested_halt = 0;
$display("should be initializing registers");
@ -255,7 +275,9 @@ begin
if (!reset) begin
if (clk3) begin
en_dec_clk <= 0;
cycle_ctr <= cycle_ctr + 1;
if (cycle_ctr_ready)
cycle_ctr <= cycle_ctr + 1;
else cycle_ctr_ready <= 1;
case (next_cycle)
`BUSCMD_NOP: begin
bus_command <= `BUSCMD_NOP;
@ -353,6 +375,20 @@ begin
end
end
always @(posedge ph0) begin
if (dbg_op_code)
case (dbg_op_code)
default: begin
`ifdef SIM
$display("DEBUGGER - UNKNOWN OPCODE: %4h", dbg_op_code);
`endif
end
endcase
`ifdef SIM
else $display("DEBUGGER - NOTHING TO DO");
`endif
end
always @(posedge ph1) begin
`include "opcodes/z_alu_phase_1.v"
end