Miroirs/hp-saturn
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Author SHA1 Message Date
Raphael Jacquot
f502451548 update debugger 2019-03-04 19:15:44 +01:00
Raphael Jacquot
6964b72df1 ok. serial sort of works, except it doesn't... 2019-03-04 18:29:00 +01:00
Raphael Jacquot
6f3f3ce73c debug the seial port 2019-03-04 17:01:59 +01:00
Raphael Jacquot
dc927031e4 cleanups and simplifications 2019-03-04 15:44:51 +01:00
Raphael Jacquot
ae164feb19 there, serial port works at 115200 
needed to add \r,..
 2019-03-04 15:24:05 +01:00
Raphael Jacquot
fcea35b4cb oops, LSB first 2019-03-04 15:15:11 +01:00
Raphael Jacquot
5716904ac8 add the serial port to the complie 
change speed to 115200
 2019-03-04 14:53:48 +01:00
Raphaël Jacquot
7708d7a85c attached serial port tentative 2019-03-04 14:40:31 +01:00
Raphael Jacquot
d87eb7786c add an extra script 2019-03-04 13:44:37 +01:00
Raphael Jacquot
383841f89a make it yet faster 2019-03-04 13:29:03 +01:00
Raphaël Jacquot
479382e004 export rstk_ptr to debugger 
implement LCHEX (and almost done for LAHEX)
 2019-03-04 13:28:08 +01:00
Raphaël Jacquot
e47f12f1d7 implement push PC to RSTK 2019-03-04 11:52:05 +01:00
Raphaël Jacquot
908b96df6f implement CLRHST and variants 
implement SET[HEX|DEC]
 2019-03-04 10:53:37 +01:00
Raphaël Jacquot
735504d2b3 implement RESET instruction 2019-03-04 10:15:37 +01:00
Raphaël Jacquot
dd16719a42 recognize PC_READ command 2019-03-04 10:15:27 +01:00
Raphaël Jacquot
c20c893234 replace X with ? to make a difference 2019-03-04 10:15:11 +01:00
Raphaël Jacquot
8a631c28c2 fix missing bus state reset 2019-03-04 10:14:44 +01:00
Raphaël Jacquot
18a56d750b export main registers to debugger 
add C register
implement C=P n
add dumping C register
 2019-03-04 09:58:13 +01:00
Raphael Jacquot
7c313c3b5d make it faster yet 2019-03-04 08:56:26 +01:00
Raphael Jacquot
b2811e82eb too shlow now 
bus halt in simulation only
 2019-03-04 08:44:05 +01:00
Raphael Jacquot
12173e72c4 fix forgotten reset 
slow it down some
 2019-03-04 08:32:34 +01:00
Raphael Jacquot
39182feaf1 fix miscalculations and typo 2019-03-04 08:23:53 +01:00
Raphael Jacquot
5968e6f00e 1/32s is too fast ;-) 2019-03-04 08:16:27 +01:00
Raphaël Jacquot
e0eecde066 merge 2019-03-04 08:10:53 +01:00
Raphaël Jacquot
009f01f5d7 implement 8[45]x ST=[01] n 
implement GOVLNG
dump 2 lines of registers in debugger now
 2019-03-04 08:08:02 +01:00
Raphael Jacquot
8cbf9f59a2 make the blinkenlights pretty 2019-03-03 23:24:50 +01:00
Raphaël Jacquot
da3cce2c07 execute the first jump successfully, and start reading the next instruction 2019-03-03 22:38:56 +01:00
Raphaël Jacquot
a301036968 Merge branch 'master' of github.com:sxpert/hp-saturn 2019-03-03 20:49:10 +01:00
Raphaël Jacquot
631b7f9153 start implementing jump instructions 2019-03-03 20:48:56 +01:00
Raphaël Jacquot
d17a4eb533 cleanup 2019-03-03 20:48:48 +01:00
Raphael Jacquot
cfd7603e96 we have signal ! 2019-03-03 18:22:48 +01:00
Raphael Jacquot
c04c770cba successfully got the saturn to startup on the ECP5 \o/ 2019-03-03 17:29:30 +01:00
Raphael Jacquot
bc25d4a61a cleanup blinky test 2019-03-03 16:18:30 +01:00
Raphael Jacquot
42e49caca3 cleanup of top 2019-03-03 15:59:02 +01:00
Raphael Jacquot
e192444f51 added a chaser to test the board 2019-03-03 15:46:21 +01:00
Raphaël Jacquot
6dd38500a8 add a counter to slow things down 2019-03-03 15:19:07 +01:00
Raphael Jacquot
ca29b542c3 there, a working compile shell script 2019-03-03 14:16:58 +01:00
Raphael Jacquot
531e0cab02 update compile file 2019-03-03 14:00:10 +01:00
Raphaël Jacquot
28a81503eb store current PC for the currently decoding instruction 2019-03-03 13:34:00 +01:00
Raphaël Jacquot
b58be38b10 connect debugger to leds 2019-03-03 13:33:32 +01:00
Raphael Jacquot
a6d5491619 fix the compilation for proper use of clk_25mhz signal as clock 2019-03-03 13:03:36 +01:00
Raphael Jacquot
9cb1618acb fix the rom module for proper bram generation 2019-03-03 13:03:12 +01:00
Raphaël Jacquot
391e5b6e93 change address bits to 12 (4096*4) 2019-03-03 10:27:31 +01:00
Raphael Jacquot
ae17cd1361 cleanup the rom 2019-03-03 10:24:53 +01:00
Raphaël Jacquot
2cab45a6ff remove the reset on the rom access, doesn't work 2019-03-03 10:08:26 +01:00
Raphael Jacquot
7e4ab90369 merge a few wire and assigns... can't do it on port declarations though 2019-03-03 09:47:28 +01:00
Raphael Jacquot
61957fab3e fix misplaced ifdef 
discover you can directly set contents of a wire without requiring an assign
 2019-03-03 09:43:18 +01:00
Raphaël Jacquot
eeb5150159 add the beginnings of a PC and RSTK handler 
fix bad maths in the rom-gx-r module
wire in the PC in the debugger and the control unit
add an execute flag, to start execution of partially
decoded instructions that need reading data from the
instruction stream
 2019-03-03 09:33:42 +01:00
Raphaël Jacquot
6c371cf203 increase ROMBITS to fully utilize one memory block 2019-03-03 08:09:33 +01:00
Raphael Jacquot
8fb7ad0eac try async version of reading rom... inconclusive 2019-03-03 08:03:43 +01:00