Raphael Jacquot
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0eeb018b56
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move to using the ALU
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2019-02-11 09:12:19 +01:00 |
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Raphael Jacquot
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9cd9c18381
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add new registers
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2019-02-11 09:11:40 +01:00 |
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Raphael Jacquot
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46890c6394
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refactor ALU operations
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2019-02-11 07:04:42 +01:00 |
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Raphael Jacquot
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d6a8bee3fe
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add a register "comes from memory"
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2019-02-11 07:03:55 +01:00 |
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Raphael Jacquot
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1799ac8eb6
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remove DEC_LC_LEN -> DEC_LC
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2019-02-11 07:03:37 +01:00 |
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Raphael Jacquot
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aa95324ea9
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implement LC with ALU operations
(need to find a way to output the instruction representation)
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2019-02-11 07:03:20 +01:00 |
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Raphael Jacquot
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d6b59740dd
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add Dn=(2)
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2019-02-10 23:00:20 +01:00 |
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Raphael Jacquot
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43dd894888
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more work on ALU
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2019-02-10 23:00:06 +01:00 |
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Raphael Jacquot
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799fc3c327
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convert stuff to use the ALU module instead
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2019-02-10 22:02:39 +01:00 |
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Raphael Jacquot
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f21dcd8c23
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add alu stuff
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2019-02-10 18:46:26 +01:00 |
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Raphael Jacquot
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ec83140ff3
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remove some stuff
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2019-02-10 18:45:52 +01:00 |
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Raphael Jacquot
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c26772b4f9
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implement RSTK=C
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2019-02-10 13:57:30 +01:00 |
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Raphael Jacquot
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4e33d9c145
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fix documentation comprehension error
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2019-02-10 13:50:11 +01:00 |
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Raphael Jacquot
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efd93e4a95
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add or substract constant do D0 and D1
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2019-02-10 13:39:56 +01:00 |
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Raphael Jacquot
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bde3e1a027
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add D0=(4) and transfer on field W
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2019-02-10 12:47:50 +01:00 |
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Raphael Jacquot
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23a8e32e31
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implement more things, test with ice40
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2019-02-10 12:04:53 +01:00 |
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Raphael Jacquot
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4594dec086
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more stuff implemented
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2019-02-10 09:02:24 +01:00 |
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Raphael Jacquot
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71b2349831
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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Raphael Jacquot
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b0b3373e30
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implement more versions of RTN
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2019-02-09 12:03:43 +01:00 |
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Raphael Jacquot
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8fa16e6a1e
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add more stuff
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2019-02-09 11:53:45 +01:00 |
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Raphael Jacquot
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de5bfe83cc
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implement loading into D1 too
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2019-02-09 09:49:22 +01:00 |
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Raphael Jacquot
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8ae31087eb
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bus access all rewritten
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2019-02-09 09:32:29 +01:00 |
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Raphael Jacquot
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c0e4c0b20c
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apply identical treatment for BRAM access
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2019-02-09 01:13:57 +01:00 |
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Raphael Jacquot
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da4299fd19
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reading and writing to the blockram should be in separate always blocks
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2019-02-09 01:06:44 +01:00 |
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Raphael Jacquot
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dfc315937a
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whitespace fix
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2019-02-09 00:59:38 +01:00 |
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Raphael Jacquot
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f8ef195563
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refactor access to the sysram array
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2019-02-09 00:55:09 +01:00 |
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Raphael Jacquot
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229aab83fe
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rename and change a lot of things
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2019-02-09 00:02:09 +01:00 |
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Raphael Jacquot
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686f91f1c9
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Implement reset
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2019-02-09 00:01:48 +01:00 |
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Raphael Jacquot
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c86de581d0
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cleanup
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2019-02-09 00:01:30 +01:00 |
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Raphael Jacquot
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322b176497
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implement RTNSXM, fix RTNCC
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2019-02-09 00:01:18 +01:00 |
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Raphael Jacquot
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ccd373243f
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implement a couple mode opcodes
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2019-02-08 23:59:56 +01:00 |
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Raphael Jacquot
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bb298832ff
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add GOSUB
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2019-02-08 23:59:36 +01:00 |
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Raphael Jacquot
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5a834d9006
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remove
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2019-02-08 21:12:11 +01:00 |
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Raphael Jacquot
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2d5a5d7457
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implement CONFIGURE and DP_WRITE
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2019-02-08 21:11:47 +01:00 |
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Raphael Jacquot
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cd185eeff0
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rewrite in less spaghetti code style
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2019-02-08 19:09:13 +01:00 |
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Raphael Jacquot
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92fe235e07
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add an instruction counter
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2019-02-08 12:46:32 +01:00 |
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Raphael Jacquot
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a56f472a45
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optimize SETDEC
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2019-02-08 11:55:47 +01:00 |
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Raphael Jacquot
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0f456bf0af
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fix more PC handling issues
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2019-02-08 11:47:06 +01:00 |
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Raphael Jacquot
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5559deab1d
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fix more PC stuff
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2019-02-08 11:15:16 +01:00 |
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Raphael Jacquot
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bcf79c9d7d
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fix handling of PC increments and the like
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2019-02-08 11:06:19 +01:00 |
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Raphael Jacquot
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90a8a4e9a9
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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Raphael Jacquot
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24c49893a1
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implement more instructions, catch errors
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2019-02-07 23:31:35 +01:00 |
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Raphael Jacquot
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55bdfed19a
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entirely redesign the state machine
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2019-02-07 22:54:06 +01:00 |
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Raphael Jacquot
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4800c6f241
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try replacing all ifs with a case... yosys blows up too
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2019-02-07 11:54:11 +01:00 |
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Raphael Jacquot
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0940b198d3
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remove multiple posedge clk, which doesn't work
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2019-02-07 09:38:27 +01:00 |
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Raphael Jacquot
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5a5fc9c775
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fix all bad warnings
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2019-02-07 08:55:41 +01:00 |
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Raphael Jacquot
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b5c3a56273
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separate reading instructions from reading data
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2019-02-07 08:35:59 +01:00 |
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Raphael Jacquot
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b519f3d8b3
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use a yosys config file instead
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2019-02-07 07:11:25 +01:00 |
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Raphael Jacquot
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7a1bc5956e
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add an ifdef
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2019-02-07 07:11:11 +01:00 |
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Raphael Jacquot
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4c9925c1a3
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fix yosys warning
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2019-02-07 07:10:33 +01:00 |
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