Commit graph

262 commits

Author SHA1 Message Date
Raphael Jacquot
ef93420950 first verilator error fixes 2019-03-14 13:33:07 +01:00
Raphael Jacquot
d808e636c2 add script to run verilator 2019-03-14 13:32:50 +01:00
Raphael Jacquot
66bcb23d2c fix gitignore 2019-03-14 13:22:15 +01:00
Raphael Jacquot
9549b53edc implement bus trasfers debugging 2019-03-06 18:19:02 +01:00
Raphael Jacquot
6d940c7f95 fix the conditions for the debugger to spew chars aout 2019-03-06 14:41:18 +01:00
Raphael Jacquot
e09ed6bc28 udate makefile 2019-03-06 12:49:01 +01:00
Raphaël Jacquot
f86a1d03c5 implement base alu functionnality 2019-03-06 12:16:34 +01:00
Raphael Jacquot
98b3ed1b79 decode Aax and Abx 2019-03-05 07:56:33 +01:00
Raphael Jacquot
f12a74a917 print a "." when the bus is active, but not reading 2019-03-05 06:47:02 +01:00
Raphaël Jacquot
ddae7f9332 start implementing block Axx 2019-03-05 06:26:33 +01:00
Raphaël Jacquot
f3d1a4d9d4 implement D0=(5) 2019-03-05 06:14:38 +01:00
Raphaël Jacquot
28483afe9a implement CONFIG and RTN* (0[0-3]) 2019-03-05 05:39:34 +01:00
Raphael Jacquot
9168cbc1a2 victory, this works on the fpga \o/
using "=" instead of "<=" is evil !
make the fpga halt when necessary
2019-03-04 22:48:09 +01:00
Raphael Jacquot
4d578f8f18 ok, we're getting somewhere 2019-03-04 21:10:12 +01:00
Raphaël Jacquot
7e0f4a9c0f change the way clk_en is generated 2019-03-04 19:59:00 +01:00
Raphael Jacquot
f502451548 update debugger 2019-03-04 19:15:44 +01:00
Raphael Jacquot
6964b72df1 ok. serial sort of works, except it doesn't... 2019-03-04 18:29:00 +01:00
Raphael Jacquot
6f3f3ce73c debug the seial port 2019-03-04 17:01:59 +01:00
Raphael Jacquot
dc927031e4 cleanups and simplifications 2019-03-04 15:44:51 +01:00
Raphael Jacquot
ae164feb19 there, serial port works at 115200
needed to add \r,..
2019-03-04 15:24:05 +01:00
Raphael Jacquot
fcea35b4cb oops, LSB first 2019-03-04 15:15:11 +01:00
Raphael Jacquot
5716904ac8 add the serial port to the complie
change speed to 115200
2019-03-04 14:53:48 +01:00
Raphaël Jacquot
7708d7a85c attached serial port tentative 2019-03-04 14:40:31 +01:00
Raphael Jacquot
d87eb7786c add an extra script 2019-03-04 13:44:37 +01:00
Raphael Jacquot
383841f89a make it yet faster 2019-03-04 13:29:03 +01:00
Raphaël Jacquot
479382e004 export rstk_ptr to debugger
implement LCHEX (and almost done for LAHEX)
2019-03-04 13:28:08 +01:00
Raphaël Jacquot
e47f12f1d7 implement push PC to RSTK 2019-03-04 11:52:05 +01:00
Raphaël Jacquot
908b96df6f implement CLRHST and variants
implement SET[HEX|DEC]
2019-03-04 10:53:37 +01:00
Raphaël Jacquot
735504d2b3 implement RESET instruction 2019-03-04 10:15:37 +01:00
Raphaël Jacquot
dd16719a42 recognize PC_READ command 2019-03-04 10:15:27 +01:00
Raphaël Jacquot
c20c893234 replace X with ? to make a difference 2019-03-04 10:15:11 +01:00
Raphaël Jacquot
8a631c28c2 fix missing bus state reset 2019-03-04 10:14:44 +01:00
Raphaël Jacquot
18a56d750b export main registers to debugger
add C register
implement C=P n
add dumping C register
2019-03-04 09:58:13 +01:00
Raphael Jacquot
7c313c3b5d make it faster yet 2019-03-04 08:56:26 +01:00
Raphael Jacquot
b2811e82eb too shlow now
bus halt in simulation only
2019-03-04 08:44:05 +01:00
Raphael Jacquot
12173e72c4 fix forgotten reset
slow it down some
2019-03-04 08:32:34 +01:00
Raphael Jacquot
39182feaf1 fix miscalculations and typo 2019-03-04 08:23:53 +01:00
Raphael Jacquot
5968e6f00e 1/32s is too fast ;-) 2019-03-04 08:16:27 +01:00
Raphaël Jacquot
e0eecde066 merge 2019-03-04 08:10:53 +01:00
Raphaël Jacquot
009f01f5d7 implement 8[45]x ST=[01] n
implement GOVLNG
dump 2 lines of registers in debugger now
2019-03-04 08:08:02 +01:00
Raphael Jacquot
8cbf9f59a2 make the blinkenlights pretty 2019-03-03 23:24:50 +01:00
Raphaël Jacquot
da3cce2c07 execute the first jump successfully, and start reading the next instruction 2019-03-03 22:38:56 +01:00
Raphaël Jacquot
a301036968 Merge branch 'master' of github.com:sxpert/hp-saturn 2019-03-03 20:49:10 +01:00
Raphaël Jacquot
631b7f9153 start implementing jump instructions 2019-03-03 20:48:56 +01:00
Raphaël Jacquot
d17a4eb533 cleanup 2019-03-03 20:48:48 +01:00
Raphael Jacquot
cfd7603e96 we have signal ! 2019-03-03 18:22:48 +01:00
Raphael Jacquot
c04c770cba successfully got the saturn to startup on the ECP5 \o/ 2019-03-03 17:29:30 +01:00
Raphael Jacquot
bc25d4a61a cleanup blinky test 2019-03-03 16:18:30 +01:00
Raphael Jacquot
42e49caca3 cleanup of top 2019-03-03 15:59:02 +01:00
Raphael Jacquot
e192444f51 added a chaser to test the board 2019-03-03 15:46:21 +01:00