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victory, this works on the fpga \o/

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using "=" instead of "<=" is evil !
make the fpga halt when necessary
This commit is contained in:
Raphael Jacquot 2019-03-04 22:48:09 +01:00
parent 4d578f8f18
commit 9168cbc1a2
6 changed files with 42 additions and 24 deletions
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6
saturn_bus_controller.v
View file

@ -109,7 +109,8 @@ saturn_control_unit control_unit (
.o_alu_opcode (dec_alu_opcode),
.o_instr_type (dec_instr_type),
.o_instr_decoded (dec_instr_decoded)
.o_instr_decoded (dec_instr_decoded),
.o_instr_execute (dec_instr_execute)
);
wire [0:0] ctrl_unit_error;
@ -136,6 +137,7 @@ wire [4:0] dec_alu_opcode;
wire [3:0] dec_instr_type;
wire [0:0] dec_instr_decoded;
wire [0:0] dec_instr_execute;
/**************************************************************************************************
*
@ -175,6 +177,8 @@ saturn_debugger debugger (
.i_instr_type (dec_instr_type),
.i_instr_decoded (dec_instr_decoded),
.i_instr_execute (dec_instr_execute),
.i_bus_busy (bus_busy),
.o_char_to_send (o_char_to_send),
.o_char_counter (o_char_counter),

7
saturn_control_unit.v
View file

@ -64,7 +64,8 @@ module saturn_control_unit (
o_alu_opcode,
o_instr_type,
o_instr_decoded
o_instr_decoded,
o_instr_execute
);
input wire [0:0] i_clk;
@ -110,6 +111,7 @@ output wire [4:0] o_alu_opcode;
output wire [3:0] o_instr_type;
output wire [0:0] o_instr_decoded;
output wire [0:0] o_instr_execute;
assign o_current_pc = reg_PC;
assign o_reg_p = reg_P;
@ -124,6 +126,7 @@ assign o_alu_opcode = dec_alu_opcode;
assign o_instr_type = dec_instr_type;
assign o_instr_decoded = dec_instr_decoded;
assign o_instr_execute = dec_instr_execute;
/**************************************************************************************************
*
@ -419,7 +422,7 @@ always @(posedge i_clk) begin
default: $display("CLRHST %h", dec_alu_imm_value);
endcase
`endif
reg_HST = reg_HST & ~dec_alu_imm_value;
reg_HST <= reg_HST & ~dec_alu_imm_value;
end
/* 8[45]n ST=[01] n */

24
saturn_debugger.v
View file

@ -55,6 +55,8 @@ module saturn_debugger (
i_instr_type,
i_instr_decoded,
i_instr_execute,
i_bus_busy,
/* output to leds */
o_char_to_send,
@ -99,6 +101,8 @@ input wire [4:0] i_alu_opcode;
input wire [3:0] i_instr_type;
input wire [0:0] i_instr_decoded;
input wire [0:0] i_instr_execute;
input wire [0:0] i_bus_busy;
output reg [7:0] o_char_to_send;
output wire [9:0] o_char_counter;
@ -540,7 +544,25 @@ always @(posedge i_clk) begin
o_char_valid <= 1'b1;
end
if (i_clk_en && i_instr_decoded) begin
if (i_clk_en && i_bus_busy) begin
o_char_send <= ~o_char_send;
case (i_phase)
2'b00: o_char_to_send <= "!";
2'b01: o_char_to_send <= "@";
2'b10: o_char_to_send <= "#";
2'b11: o_char_to_send <= "$";
endcase
if (i_instr_decoded) o_char_to_send <= "=";
o_char_valid <= 1'b1;
end
if (i_clk_en && i_instr_execute && i_phases[3]) begin
o_char_send <= ~o_char_send;
o_char_to_send <= "^";
o_char_valid <= 1'b1;
end
if (i_clk_en && i_instr_decoded && i_phases[3]) begin
o_char_send <= ~o_char_send;
o_char_to_send <= "|";
o_char_valid <= 1'b1;

2
saturn_hp48gx_rom.v
View file

@ -25,7 +25,7 @@
`ifdef SIM
`define ROMBITS 20
`else
`define ROMBITS 16
`define ROMBITS 19
`endif
module saturn_hp48gx_rom (

25
saturn_inst_decoder.v
View file

@ -126,7 +126,6 @@ reg [0:0] decode_started;
reg [0:0] block_0x;
reg [0:0] block_2x;
reg [0:0] block_3x;
reg [0:0] block_6x;
reg [0:0] block_8x;
reg [0:0] block_80x;
reg [0:0] block_80Cx;
@ -171,7 +170,6 @@ initial begin
block_0x = 1'b0;
block_2x = 1'b0;
block_3x = 1'b0;
block_6x = 1'b0;
block_8x = 1'b0;
block_80x = 1'b0;
block_80Cx = 1'b0;
@ -229,10 +227,11 @@ always @(posedge i_clk) begin
4'h6:
begin
o_instr_type <= `INSTR_TYPE_JUMP;
// o_push_pc <= i_nibble[1];
o_jump_length <= 3'd2;
jump_counter <= 3'd0;
o_instr_execute <= 1'b1;
block_6x <= 1'b1;
block_JUMP <= 1'b1;
end
4'h8: block_8x <= 1'b1;
default:
@ -290,16 +289,6 @@ always @(posedge i_clk) begin
block_3x <= 1'b0;
end
if (block_6x) begin
// $display("DECODER %0d: [%d] GOTO %h", i_phase, i_cycle_ctr, i_nibble);
jump_counter <= jump_counter + 3'd1;
if (jump_counter == o_jump_length) begin
block_6x <= 1'b0;
o_instr_decoded <= 1'b1;
decode_started <= 1'b0;
end
end
if (block_8x) begin
case (i_nibble)
4'h0: block_80x <= 1'b1;
@ -432,6 +421,7 @@ always @(posedge i_clk) begin
/* decoder cleanup only after the instruction is completely decoded and execution has started */
if (i_phases[3] && o_instr_decoded) begin
// $display("DECODER %0d: [%d] decoder cleanup", i_phase, i_cycle_ctr);
o_instr_decoded <= 1'b0;
o_instr_execute <= 1'b0;
o_instr_type <= `INSTR_TYPE_NONE;
@ -466,7 +456,6 @@ always @(posedge i_clk) begin
block_0x <= 1'b0;
block_2x <= 1'b0;
block_3x <= 1'b0;
block_6x <= 1'b0;
block_8x <= 1'b0;
block_80x <= 1'b0;
block_80Cx <= 1'b0;
@ -477,12 +466,12 @@ always @(posedge i_clk) begin
block_LOAD <= 1'b0;
/* local variables */
jump_counter = 3'd0;
load_counter = 4'd0;
load_count = 4'd0;
jump_counter <= 3'd0;
load_counter <= 4'd0;
load_count <= 4'd0;
/* invalid instruction */
o_decoder_error = 1'b0;
o_decoder_error <= 1'b0;
end
end

2
saturn_top.v
View file

@ -181,7 +181,7 @@ end
always @(posedge clk_25mhz) begin
reset <= btn[1];
delay <= delay[`TEST_BIT]?`DELAY_START:delay + 26'b1;
clk_en <= delay[`TEST_BIT]?1'b1:1'b0;
clk_en <= (delay[`TEST_BIT]?1'b1:1'b0) && !halt;
led[7] <= halt;
led[6] <= char_send;