22 commits

Author	SHA1	Message	Date
Raphael Jacquot	b2ae484450	implement the ALU as it should be	2019-03-14 21:47:05 +01:00
Raphael Jacquot	c62d562008	make it so that execution of bus programs happen ... in the same cycle as the instruction modify the way jump and rtn are handled add some registers to the debugger	2019-03-14 16:37:51 +01:00
Raphaël Jacquot	f86a1d03c5	implement base alu functionnality	2019-03-06 12:16:34 +01:00
Raphael Jacquot	98b3ed1b79	decode Aax and Abx	2019-03-05 07:56:33 +01:00
Raphaël Jacquot	ddae7f9332	start implementing block Axx	2019-03-05 06:26:33 +01:00
Raphaël Jacquot	f3d1a4d9d4	implement D0=(5)	2019-03-05 06:14:38 +01:00
Raphaël Jacquot	28483afe9a	implement CONFIG and RTN* (0[0-3])	2019-03-05 05:39:34 +01:00
Raphael Jacquot	9168cbc1a2	victory, this works on the fpga \o/ ... using "=" instead of "<=" is evil ! make the fpga halt when necessary	2019-03-04 22:48:09 +01:00
Raphaël Jacquot	479382e004	export rstk_ptr to debugger ... implement LCHEX (and almost done for LAHEX)	2019-03-04 13:28:08 +01:00
Raphaël Jacquot	e47f12f1d7	implement push PC to RSTK	2019-03-04 11:52:05 +01:00
Raphaël Jacquot	908b96df6f	implement CLRHST and variants ... implement SET[HEX|DEC]	2019-03-04 10:53:37 +01:00
Raphaël Jacquot	735504d2b3	implement RESET instruction	2019-03-04 10:15:37 +01:00
Raphaël Jacquot	18a56d750b	export main registers to debugger ... add C register implement C=P n add dumping C register	2019-03-04 09:58:13 +01:00
Raphaël Jacquot	009f01f5d7	implement 8[45]x ST=[01] n ... implement GOVLNG dump 2 lines of registers in debugger now	2019-03-04 08:08:02 +01:00
Raphaël Jacquot	da3cce2c07	execute the first jump successfully, and start reading the next instruction	2019-03-03 22:38:56 +01:00
Raphaël Jacquot	631b7f9153	start implementing jump instructions	2019-03-03 20:48:56 +01:00
Raphaël Jacquot	6dd38500a8	add a counter to slow things down	2019-03-03 15:19:07 +01:00
Raphaël Jacquot	28a81503eb	store current PC for the currently decoding instruction	2019-03-03 13:34:00 +01:00
Raphaël Jacquot	eeb5150159	add the beginnings of a PC and RSTK handler ... fix bad maths in the rom-gx-r module wire in the PC in the debugger and the control unit add an execute flag, to start execution of partially decoded instructions that need reading data from the instruction stream	2019-03-03 09:33:42 +01:00
Raphaël Jacquot	42e8a146ce	start implementing some type of debugging functionnality	2019-03-02 21:45:38 +01:00
Raphaël Jacquot	2fcd9f7b23	decode our first instruction ... execute said instruction start implementing the debugging engine to see what we are doing	2019-03-02 19:40:31 +01:00
Raphael Jacquot	c5355b4a90	enough was done to start feeding the decoder	2019-03-02 15:52:56 +01:00