Raphael Jacquot
1771536ca0
implement block_15x
2019-03-15 20:42:51 +01:00
Raphael Jacquot
e9e7a6a5f0
add nice message for rom on CONFIGURE command
2019-03-15 10:20:21 +01:00
Raphael Jacquot
2a4d684d0e
fis typo
2019-03-15 07:13:20 +01:00
Raphael Jacquot
e97ec2243f
pipelining of reading from rom
2019-03-14 14:33:28 +01:00
Raphael Jacquot
c30b96d1af
fix an unused warning
2019-03-14 13:49:38 +01:00
Raphael Jacquot
9168cbc1a2
victory, this works on the fpga \o/
...
using "=" instead of "<=" is evil !
make the fpga halt when necessary
2019-03-04 22:48:09 +01:00
Raphael Jacquot
6964b72df1
ok. serial sort of works, except it doesn't...
2019-03-04 18:29:00 +01:00
Raphaël Jacquot
dd16719a42
recognize PC_READ command
2019-03-04 10:15:27 +01:00
Raphaël Jacquot
009f01f5d7
implement 8[45]x ST=[01] n
...
implement GOVLNG
dump 2 lines of registers in debugger now
2019-03-04 08:08:02 +01:00
Raphaël Jacquot
d17a4eb533
cleanup
2019-03-03 20:48:48 +01:00
Raphaël Jacquot
6dd38500a8
add a counter to slow things down
2019-03-03 15:19:07 +01:00
Raphael Jacquot
9cb1618acb
fix the rom module for proper bram generation
2019-03-03 13:03:12 +01:00
Raphaël Jacquot
391e5b6e93
change address bits to 12 (4096*4)
2019-03-03 10:27:31 +01:00
Raphael Jacquot
ae17cd1361
cleanup the rom
2019-03-03 10:24:53 +01:00
Raphaël Jacquot
2cab45a6ff
remove the reset on the rom access, doesn't work
2019-03-03 10:08:26 +01:00
Raphaël Jacquot
eeb5150159
add the beginnings of a PC and RSTK handler
...
fix bad maths in the rom-gx-r module
wire in the PC in the debugger and the control unit
add an execute flag, to start execution of partially
decoded instructions that need reading data from the
instruction stream
2019-03-03 09:33:42 +01:00
Raphaël Jacquot
6c371cf203
increase ROMBITS to fully utilize one memory block
2019-03-03 08:09:33 +01:00
Raphael Jacquot
8fb7ad0eac
try async version of reading rom... inconclusive
2019-03-03 08:03:43 +01:00
Raphael Jacquot
ff04360005
fix missing declaration
...
fix driver conflict
2019-03-03 07:31:18 +01:00
Raphaël Jacquot
b3d72c1d3b
add some more debugging functionnality
...
segregate reading of the rom in it's own little world
2019-03-03 07:25:22 +01:00
Raphael Jacquot
21ad359673
fix compiling
...
fix the way the bus controller program worked, which generated evil
inferred latches
2019-03-02 22:33:58 +01:00
Raphael Jacquot
e761f984c8
implement the basic rom, and add a few things
2019-02-25 09:17:17 +01:00
Raphael Jacquot
8866b8c175
starts complete rewrite
2019-02-24 23:30:57 +01:00