mirror of
https://github.com/sxpert/hp-saturn
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Mirror of https://github.com/sxpert/hp-saturn
alu | ||
.gitignore | ||
bus_commands.v | ||
compile | ||
dbg_const.v | ||
dbg_module.v | ||
decstates.v | ||
def-alu.v | ||
def-fields.v | ||
empty_lfe5u-85f.config | ||
gen_rom_hex.py | ||
gxrom-r-decompile | ||
history.txt | ||
hp48_00_bus.v | ||
hp48_01_io_ram.v | ||
hp48_02_sys_ram.v | ||
hp48_06_rom.v | ||
ico | ||
icoboard.pcf | ||
Makefile | ||
old_bus_controller.v | ||
old_intruction_decoder.v | ||
old_regs.v | ||
README | ||
rom-gx-r.hex | ||
run | ||
saturn-core.ESP5.ys | ||
saturn_alu.v | ||
saturn_core.ICE40.ys | ||
saturn_core.v | ||
saturn_decoder.v | ||
testrom-2.hex | ||
testrom.hex | ||
text.vcd | ||
ulx3s_v20.lpf |
Verilog implementation of the HP saturn processor licence: GPLv3 or later timings: ___________ reset: |____________________________________________________ ____ ____ ____ ____ ____ ____ clk : ____| |____| |____| |____| |____| |____| |____ _________ _________ _________ _________ _________ counter: ______________/____0____X____1____X____2____X____3____X____0____ _________ _________ phase_0: ______________| |_____________________________| _________ phase_1: ________________________| |_____________________________ _________ phase_2: __________________________________| |___________________ _________ phase_3: ____________________________________________| |_________ notes for using the ULX3S Maybe linux ujprog won't find port because of insufficient priviledge. Either run ujprog as root or have udev rule:# this is for usb-serial tty device SUBSYSTEM=="tty", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", \ MODE="664", GROUP="dialout" this is for ujprog libusb access ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", \ GROUP="dialout", MODE="666"