16 commits

Author	SHA1	Message	Date
Raphael Jacquot	570807cf61	time to start over, this this is broken beyond fiddling	2019-02-24 21:54:15 +01:00
Raphael Jacquot	51e7fc792c	nothing notable	2019-02-19 16:16:53 +01:00
Raphael Jacquot	0d3c3ecd3e	implement CONFIG ... cleanup the bus controller	2019-02-17 19:29:39 +01:00
Raphael Jacquot	06f79dca88	implemented decoding of 8Ax block, equality and inequality tests over ... field A. needs implementing the actual ALU op implemented RTNYES/GOYES((not totally finished) RTNYES works need to find an actual GOYES to test that	2019-02-16 11:08:34 +01:00
Raphael Jacquot	e1f099145e	add register 0	2019-02-15 09:00:00 +01:00
Raphael Jacquot	e72fe301b0	add some definitions for bits in HST register	2019-02-15 07:06:07 +01:00
Raphael Jacquot	96daffd25c	implement CLRHST and friends	2019-02-14 22:54:54 +01:00
Raphael Jacquot	4b7e59fa21	implement more instructions	2019-02-14 22:14:52 +01:00
Raphael Jacquot	fd69407de0	alu coming up nicely, decoder gaining weight	2019-02-14 14:35:23 +01:00
Raphael Jacquot	f076cf6fb9	start the groundwork to implement jumps ... move PC handling into the ALU	2019-02-14 08:59:04 +01:00
Raphael Jacquot	aa1d8efd85	finished blocks 1, 2 and 3	2019-02-13 20:09:25 +01:00
Raphael Jacquot	c357160ab3	start memory transfers	2019-02-13 08:21:25 +01:00
Raphael Jacquot	8858d08bb6	impement 1[012]x	2019-02-12 23:26:18 +01:00
Raphael Jacquot	e409021f35	need more registers ;-)	2019-02-12 15:12:19 +01:00
Raphael Jacquot	13e390e8a6	add a few registers	2019-02-12 14:50:24 +01:00
Raphael Jacquot	88620f217c	start handling ALU related stuff	2019-02-12 12:43:36 +01:00

Renamed from def_alu.v (Browse further)