mirror of
https://github.com/sxpert/hp-saturn
synced 2024-11-16 19:50:19 +01:00
64 lines
No EOL
1.4 KiB
Verilog
64 lines
No EOL
1.4 KiB
Verilog
`ifndef _DEF_ALU
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`define _DEF_ALU
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// stuff (where should that go ?)
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`define T_SET 0
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`define T_TEST 1
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`define T_DIR_OUT 0
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`define T_DIR_IN 1
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`define T_PTR_0 0
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`define T_PTR_1 1
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// copy / exchange
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`define ALU_OP_ZERO 0
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`define ALU_OP_COPY 1
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`define ALU_OP_EXCH 2
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// shifts
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`define ALU_OP_SHL 3
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`define ALU_OP_SHR 4
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// logic
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`define ALU_OP_AND 5
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`define ALU_OP_OR 6
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// arithmetic
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`define ALU_OP_2CMPL 7
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`define ALU_OP_1CMPL 8
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`define ALU_OP_INC 9
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`define ALU_OP_DEC 10
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`define ALU_OP_ADD 11
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`define ALU_OP_SUB 12
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// tests
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`define ALU_OP_TEST_EQ 13
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`define ALU_OP_TEST_NEQ 14
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// relative jump
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`define ALU_OP_JMP_REL2 15
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`define ALU_OP_JMP_REL3 16
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// registers
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`define ALU_REG_A 0
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`define ALU_REG_B 1
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`define ALU_REG_C 2
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`define ALU_REG_D 3
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`define ALU_REG_D0 4
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`define ALU_REG_D1 5
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`define ALU_REG_PC 6
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`define ALU_REG_RSTK 7
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`define ALU_REG_R0 8
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`define ALU_REG_R1 9
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`define ALU_REG_R2 10
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`define ALU_REG_R3 11
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`define ALU_REG_R4 12
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//13
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//14
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//15
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`define ALU_REG_DAT0 16
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`define ALU_REG_DAT1 17
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`define ALU_REG_CST 18
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`define ALU_REG_ST 19
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`define ALU_REG_P 20
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`define ALU_REG_M 21
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`define ALU_REG_IMM 22
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`endif |