7 commits

Author	SHA1	Message	Date
Raphael Jacquot	23a8e32e31	implement more things, test with ice40	2019-02-10 12:04:53 +01:00
Raphael Jacquot	8fa16e6a1e	add more stuff	2019-02-09 11:53:45 +01:00
Raphael Jacquot	8ae31087eb	bus access all rewritten	2019-02-09 09:32:29 +01:00
Raphael Jacquot	da4299fd19	reading and writing to the blockram should be in separate always blocks	2019-02-09 01:06:44 +01:00
Raphael Jacquot	dfc315937a	whitespace fix	2019-02-09 00:59:38 +01:00
Raphael Jacquot	f8ef195563	refactor access to the sysram array	2019-02-09 00:55:09 +01:00
Raphael Jacquot	229aab83fe	rename and change a lot of things	2019-02-09 00:02:09 +01:00