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0x.v
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implement RSTK=C
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2019-02-10 13:57:30 +01:00 |
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1[9ABDEF]nnnnn_D[01]_EQ_[245]n.v
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add Dn=(2)
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2019-02-10 23:00:20 +01:00 |
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1[45]_memaccess.v
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fix documentation comprehension error
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2019-02-10 13:50:11 +01:00 |
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1[678C]n_D[01]_math_n.v
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add or substract constant do D0 and D1
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2019-02-10 13:39:56 +01:00 |
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1x.v
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add Dn=(2)
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2019-02-10 23:00:20 +01:00 |
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2n_P_EQ_n.v
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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3n[x...]_LC.v
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implement LC with ALU operations
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2019-02-11 07:03:20 +01:00 |
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6xxx_GOTO.v
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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7xxx_GOSUB.v
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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8[89]n_test_P.v
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more stuff implemented
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2019-02-10 09:02:24 +01:00 |
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8[4567]n_work_test_ST.v
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more stuff implemented
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2019-02-10 09:02:24 +01:00 |
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8[DF]xxxxx_GO.v
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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8Ax_test_[n]eq_A.v
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convert stuff to use the ALU module instead
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2019-02-10 22:02:39 +01:00 |
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8x.v
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more stuff implemented
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2019-02-10 09:02:24 +01:00 |
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13x_ptr_and_AC.v
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implement more things, test with ice40
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2019-02-10 12:04:53 +01:00 |
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80[CD]n_C_and_P_n.v
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more stuff implemented
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2019-02-10 09:02:24 +01:00 |
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80x.v
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implement more things, test with ice40
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2019-02-10 12:04:53 +01:00 |
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82x_CLRHST.v
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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808[4-B]_[AC]BIT_set_test.v
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implement more things, test with ice40
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2019-02-10 12:04:53 +01:00 |
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808x.v
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implement more things, test with ice40
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2019-02-10 12:04:53 +01:00 |
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A[ab]x.v
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convert stuff to use the ALU module instead
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2019-02-10 22:02:39 +01:00 |
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B[ab]x.v
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more work on ALU
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2019-02-10 23:00:06 +01:00 |
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Cx.v
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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Dx_regs_field_A.v
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lots of corrections
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2019-02-09 19:18:58 +01:00 |
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Fx.v
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convert stuff to use the ALU module instead
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2019-02-10 22:02:39 +01:00 |
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xx_RTNYES_GOYES.v
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more stuff implemented
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2019-02-10 09:02:24 +01:00 |
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z_alu_phase_2.v
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convert stuff to use the ALU module instead
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2019-02-10 22:02:39 +01:00 |
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z_alu_phase_3.v
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more work on ALU
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2019-02-10 23:00:06 +01:00 |
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z_fields.v
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add alu stuff
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2019-02-10 18:46:26 +01:00 |
