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This commit is contained in:
Raphael Jacquot 2019-03-02 15:01:00 +01:00
parent 3cbd6ac5e1
commit cd2b74dcc8
3 changed files with 38 additions and 20 deletions
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29
saturn_bus_controller.v
View file

@ -68,7 +68,7 @@ saturn_control_unit control_unit (
.o_program_data (ctrl_unit_prog_data), .o_program_data (ctrl_unit_prog_data),
.o_no_read (ctrl_unit_no_read), .o_no_read (ctrl_unit_no_read),
.i_nibble (nibble_in), .i_nibble (i_bus_nibble_in),
.o_error (ctrl_unit_error) .o_error (ctrl_unit_error)
); );
@ -108,7 +108,6 @@ assign o_debug_cycle = dbg_debug_cycle;
reg [0:0] bus_error; reg [0:0] bus_error;
reg [0:0] bus_busy; reg [0:0] bus_busy;
reg [3:0] nibble_in;
/* /*
* program list for the bus controller * program list for the bus controller
@ -118,11 +117,13 @@ reg [3:0] nibble_in;
reg [4:0] bus_prog_addr; reg [4:0] bus_prog_addr;
reg [4:0] bus_program[0:31]; reg [4:0] bus_program[0:31];
reg [4:0] next_bus_prog_addr; reg [4:0] next_bus_prog_addr;
reg [0:0] more_to_write;
always @(*) begin always @(*) begin
// $write("BUSCTRL0 %0d: [%d] write prog %d : %5b\n", i_phase, i_cycle_ctr, ctrl_unit_prog_addr, ctrl_unit_prog_data); // $write("BUSCTRL0 %0d: [%d] write prog %d : %5b\n", i_phase, i_cycle_ctr, ctrl_unit_prog_addr, ctrl_unit_prog_data);
bus_program[ctrl_unit_prog_addr] = ctrl_unit_prog_data; bus_program[ctrl_unit_prog_addr] = ctrl_unit_prog_data;
next_bus_prog_addr = bus_prog_addr + 5'd1; next_bus_prog_addr = bus_prog_addr + 5'd1;
more_to_write = (bus_prog_addr != ctrl_unit_prog_addr);
end end
/* /*
@ -152,8 +153,8 @@ always @(posedge i_clk) begin
/* /*
* in this phase, we can send a command or data from the processor * in this phase, we can send a command or data from the processor
*/ */
if (bus_prog_addr != ctrl_unit_prog_addr) begin if (more_to_write) begin
$write("BUSCTRL %0d: [%d] %d : %5b ", i_phase, i_cycle_ctr, next_bus_prog_addr, bus_program[next_bus_prog_addr]); $write("BUSCTRL %0d: [%d] %0d : %5b ", i_phase, i_cycle_ctr, next_bus_prog_addr, bus_program[next_bus_prog_addr]);
if (bus_program[next_bus_prog_addr][4]) $write("CMD : "); if (bus_program[next_bus_prog_addr][4]) $write("CMD : ");
else $write("DATA : "); else $write("DATA : ");
$write("%h\n", bus_program[next_bus_prog_addr][3:0]); $write("%h\n", bus_program[next_bus_prog_addr][3:0]);
@ -162,11 +163,13 @@ always @(posedge i_clk) begin
o_bus_nibble_out <= bus_program[next_bus_prog_addr][3:0]; o_bus_nibble_out <= bus_program[next_bus_prog_addr][3:0];
o_bus_clk_en <= 1'b1; o_bus_clk_en <= 1'b1;
bus_busy <= 1'b1; bus_busy <= 1'b1;
end else begin end
if (!ctrl_unit_no_read) begin /*
$display("BUSCTRL %0d: [%d] setting up read", i_phase, i_cycle_ctr); * nothing to send, see if we can read, and do it
o_bus_clk_en <= 1'b1; */
end if (!more_to_write && !ctrl_unit_no_read) begin
// $display("BUSCTRL %0d: [%d] setting up read", i_phase, i_cycle_ctr);
o_bus_clk_en <= 1'b1;
end end
end end
4'b0010: 4'b0010:
@ -175,12 +178,8 @@ always @(posedge i_clk) begin
* this phase is reserved for reading data from the bus * this phase is reserved for reading data from the bus
*/ */
if (o_bus_clk_en) begin if (o_bus_clk_en) begin
$display("BUSCTRL %0d: [%d] lowering bus clock_en", i_phase, i_cycle_ctr); // $display("BUSCTRL %0d: [%d] lowering bus clock_en", i_phase, i_cycle_ctr);
o_bus_clk_en <= 1'b0; o_bus_clk_en <= 1'b0;
if (!ctrl_unit_no_read) begin
$display("BUSCTRL %0d: [%d] read %h", i_phase, i_cycle_ctr, i_bus_nibble_in);
nibble_in <= i_bus_nibble_in;
end
end end
end end
4'b0100: 4'b0100:
@ -188,7 +187,7 @@ always @(posedge i_clk) begin
/* /*
* this phase is when the instruction decoder does it's job * this phase is when the instruction decoder does it's job
*/ */
if ((bus_prog_addr == ctrl_unit_prog_addr) && bus_busy) begin if (!more_to_write && bus_busy) begin
$display("BUSCTRL %0d: [%d] done sending the entire program", i_phase, i_cycle_ctr); $display("BUSCTRL %0d: [%d] done sending the entire program", i_phase, i_cycle_ctr);
bus_busy <= 1'b0; bus_busy <= 1'b0;
end end

23
saturn_control_unit.v
View file

@ -89,6 +89,13 @@ end
always @(posedge i_clk) begin always @(posedge i_clk) begin
/************************
*
* we're just starting, load the PC into the controller and modules
* this could also be used when loading the PC on jumps, need to identify conditions
*
*/
if (!i_debug_cycle && just_reset && i_phases[3]) begin if (!i_debug_cycle && just_reset && i_phases[3]) begin
/* this happend right after reset */ /* this happend right after reset */
`ifdef SIM `ifdef SIM
@ -109,6 +116,9 @@ always @(posedge i_clk) begin
/* loop to fill the initial PC value in the program */ /* loop to fill the initial PC value in the program */
if (!i_debug_cycle && !control_unit_ready && (bus_prog_addr != 5'b0)) begin if (!i_debug_cycle && !control_unit_ready && (bus_prog_addr != 5'b0)) begin
/*
* this should load the actual PC values...
*/
o_program_data <= 5'b0; o_program_data <= 5'b0;
o_program_address <= bus_prog_addr; o_program_address <= bus_prog_addr;
bus_prog_addr <= bus_prog_addr + 1; bus_prog_addr <= bus_prog_addr + 1;
@ -125,8 +135,13 @@ always @(posedge i_clk) begin
$write("\n"); $write("\n");
`endif `endif
end end
/* this happend otherwise */ /************************
*
* main execution loop
*
*/
if (!i_debug_cycle && control_unit_ready && !i_bus_busy) begin if (!i_debug_cycle && control_unit_ready && !i_bus_busy) begin
// `ifdef SIM // `ifdef SIM
@ -140,6 +155,10 @@ always @(posedge i_clk) begin
if (i_phases[2]) begin if (i_phases[2]) begin
$display("CTRL %0d: [%d] interpreting %h", i_phase, i_cycle_ctr, i_nibble); $display("CTRL %0d: [%d] interpreting %h", i_phase, i_cycle_ctr, i_nibble);
end end
if (i_phases[3]) begin
$display("CTRL %0d: [%d] start instruction execution", i_phase, i_cycle_ctr);
end
end end
if (i_reset) begin if (i_reset) begin

6
saturn_top.v
View file

@ -34,16 +34,16 @@ reg [0:0] reset;
wire [0:0] halt; wire [0:0] halt;
initial begin initial begin
$display("TOP : starting the simulation"); $display("TOP : starting the simulation");
clk = 0; clk = 0;
reset = 1; reset = 1;
@(posedge clk); @(posedge clk);
@(posedge clk); @(posedge clk);
@(posedge clk); @(posedge clk);
reset = 0; reset = 0;
$display("TOP : reset done, waiting for instructions"); $display("TOP : reset done, waiting for instructions");
@(posedge halt); @(posedge halt);
$display("TOP : instructed to stop, halt is %b", halt); $display("TOP : instructed to stop, halt is %b", halt);
$finish; $finish;
end end