mirror of
https://github.com/gwenhael-le-moine/x49gp.git
synced 2024-12-25 21:58:49 +01:00
744 lines
15 KiB
C
744 lines
15 KiB
C
/* $Id: s3c2410_intc.c,v 1.8 2008/12/11 12:18:17 ecd Exp $
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*/
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <errno.h>
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#include <x49gp.h>
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#include <s3c2410.h>
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#include <s3c2410_intc.h>
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#include <s3c2410_power.h>
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#include <byteorder.h>
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extern int do_trace;
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typedef struct {
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int sel_shift;
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uint32_t mode_bit;
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int index;
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int req[6];
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} s3c2410_arb_t;
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typedef struct {
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uint32_t sel;
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uint32_t mode;
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} s3c2410_arb_data_t;
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static const int s3c2410_arb_order[4][6] =
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{
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{ 0, 1, 2, 3, 4, 5 },
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{ 0, 2, 3, 4, 1, 5 },
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{ 0, 3, 4, 1, 2, 5 },
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{ 0, 4, 1, 2, 3, 5 }
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};
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static const s3c2410_arb_t s3c2410_arb_table[] =
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{
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[0] = { ARB0_SEL_SHIFT, ARB0_MODE, 0,
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{ -1, EINT0, EINT1, EINT2, EINT3, -1 } },
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[1] = { ARB1_SEL_SHIFT, ARB1_MODE, 1,
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{ EINT4_7, EINT8_23, -1, nBATT_FLT, INT_TICK, INT_WDT } },
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[2] = { ARB2_SEL_SHIFT, ARB2_MODE, 2,
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{ INT_TIMER0, INT_TIMER1, INT_TIMER2, INT_TIMER3, INT_TIMER4, INT_UART2} },
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[3] = { ARB3_SEL_SHIFT, ARB3_MODE, 3,
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{ INT_LCD, INT_DMA0, INT_DMA1, INT_DMA2, INT_DMA3, INT_SDI } },
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[4] = { ARB4_SEL_SHIFT, ARB4_MODE, 4,
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{ INT_SPI0, INT_UART1, -1, INT_USBD, INT_USBH, INT_IIC } },
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[5] = { ARB5_SEL_SHIFT, ARB5_MODE, 5,
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{ -1, INT_UART0, INT_SPI1, INT_RTC, INT_ADC, -1, } },
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[6] = { ARB6_SEL_SHIFT, ARB6_MODE, 6,
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{ 0, 1, 2, 3, 4, 5 } },
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};
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#define INTC_NR_ARB (sizeof(s3c2410_arb_table) / sizeof(s3c2410_arb_table[0]))
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typedef struct {
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uint32_t srcpnd;
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uint32_t intmod;
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uint32_t intmsk;
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uint32_t priority;
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uint32_t intpnd;
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uint32_t intoffset;
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uint32_t subsrcpnd;
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uint32_t intsubmsk;
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s3c2410_arb_data_t arb_data[INTC_NR_ARB];
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x49gp_t *x49gp;
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uint32_t src_pending;
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uint32_t subsrc_pending;
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unsigned int nr_regs;
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s3c2410_offset_t *regs;
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} s3c2410_intc_t;
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static void s3c2410_intc_gen_int(s3c2410_intc_t *intc);
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static void s3c2410_intc_gen_int_from_sub_int(s3c2410_intc_t *intc);
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static int
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s3c2410_intc_data_init(s3c2410_intc_t *intc)
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{
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int i;
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s3c2410_offset_t regs[] = {
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S3C2410_OFFSET(INTC, SRCPND, 0x00000000, intc->srcpnd),
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S3C2410_OFFSET(INTC, INTMOD, 0x00000000, intc->intmod),
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S3C2410_OFFSET(INTC, INTMSK, 0xffffffff, intc->intmsk),
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S3C2410_OFFSET(INTC, PRIORITY, 0x0000007f, intc->priority),
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S3C2410_OFFSET(INTC, INTPND, 0x00000000, intc->intpnd),
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S3C2410_OFFSET(INTC, INTOFFSET, 0x00000000, intc->intoffset),
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S3C2410_OFFSET(INTC, SUBSRCPND, 0x00000000, intc->subsrcpnd),
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S3C2410_OFFSET(INTC, INTSUBMSK, 0x000007ff, intc->intsubmsk)
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};
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memset(intc, 0, sizeof(s3c2410_intc_t));
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intc->regs = malloc(sizeof(regs));
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if (NULL == intc->regs) {
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fprintf(stderr, "%s:%u: Out of memory\n",
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__FUNCTION__, __LINE__);
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return -ENOMEM;
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}
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memcpy(intc->regs, regs, sizeof(regs));
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intc->nr_regs = sizeof(regs) / sizeof(regs[0]);
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for (i = 0; i < INTC_NR_ARB; i++) {
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intc->arb_data[i].sel = 0;
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intc->arb_data[i].mode = s3c2410_arb_table[i].mode_bit;
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}
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return 0;
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}
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static void
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srcpnd_put_word(s3c2410_intc_t *intc, uint32_t data)
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{
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intc->srcpnd &= ~(data);
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intc->srcpnd |= intc->src_pending;
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if (intc->src_pending & data) {
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s3c2410_intc_gen_int(intc);
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}
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}
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static void
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intmod_put_word(s3c2410_intc_t *intc, uint32_t data)
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{
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intc->intmod = data & 0xfeffffbf;
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s3c2410_intc_gen_int(intc);
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}
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static void
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intmsk_put_word(s3c2410_intc_t *intc, uint32_t data)
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{
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#ifdef DEBUG_X49GP_ENABLE_IRQ
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uint32_t change;
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int i;
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change = intc->intmsk ^ data;
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#endif
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intc->intmsk = data | 0x01000040;
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#ifdef DEBUG_X49GP_ENABLE_IRQ
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for (i = 0; i < 32; i++) {
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if ((change & (1 << i)) && !(intc->intmsk & (1 << i))) {
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printf("INTC: Enable IRQ %u\n", i);
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}
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}
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#endif
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s3c2410_intc_gen_int(intc);
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}
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static uint32_t
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priority_get_word(s3c2410_intc_t *intc)
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{
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const s3c2410_arb_t *arb;
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s3c2410_arb_data_t *arb_data;
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int i;
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intc->priority = 0;
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for (i = 0; i < INTC_NR_ARB; i++) {
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arb = &s3c2410_arb_table[i];
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arb_data = &intc->arb_data[i];
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intc->priority |= (arb_data->sel << arb->sel_shift) |
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arb_data->mode;
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}
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return intc->priority;
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}
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static void
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priority_put_word(s3c2410_intc_t *intc, uint32_t data)
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{
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const s3c2410_arb_t *arb;
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s3c2410_arb_data_t *arb_data;
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int i;
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intc->priority = data & 0x001fffff;
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for (i = 0; i < INTC_NR_ARB; i++) {
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arb = &s3c2410_arb_table[i];
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arb_data = &intc->arb_data[i];
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arb_data->sel = (intc->priority >> arb->sel_shift) & ARBx_SEL_MASK;
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arb_data->mode = intc->priority & arb->mode_bit;
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}
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s3c2410_intc_gen_int(intc);
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}
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static void
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intpnd_put_word(s3c2410_intc_t *intc, uint32_t data)
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{
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intc->intpnd &= ~(data);
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s3c2410_intc_gen_int(intc);
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}
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static void
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subsrcpnd_put_word(s3c2410_intc_t *intc, uint32_t data)
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{
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intc->subsrcpnd &= ~(data);
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intc->subsrcpnd |= intc->subsrc_pending;
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if (intc->subsrc_pending & data) {
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s3c2410_intc_gen_int_from_sub_int(intc);
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}
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}
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static void
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intsubmsk_put_word(s3c2410_intc_t *intc, uint32_t data)
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{
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intc->intsubmsk = data & 0x000007ff;
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s3c2410_intc_gen_int_from_sub_int(intc);
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}
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static uint32_t
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s3c2410_intc_select_int(s3c2410_intc_t *intc, const s3c2410_arb_t *arb,
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uint32_t service, int *offset)
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{
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s3c2410_arb_data_t *arb_data = &intc->arb_data[arb->index];
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const int *order;
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int i, req;
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order = s3c2410_arb_order[arb_data->sel];
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for (i = 0; i < 6; i++) {
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req = order[i];
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if (-1 == arb->req[req])
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continue;
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if (service & (1 << arb->req[req])) {
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if (arb_data->mode)
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arb_data->sel = (arb_data->sel + 1) & ARBx_SEL_MASK;
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*offset = arb->req[req];
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return (1 << arb->index);
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}
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}
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*offset = -1;
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return 0;
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}
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void
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s3c2410_FIQ (CPUState *env)
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{
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cpu_interrupt(env, CPU_INTERRUPT_FIQ);
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}
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void
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s3c2410_IRQ (CPUState *env)
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{
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cpu_interrupt(env, CPU_INTERRUPT_HARD);
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}
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static void
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s3c2410_intc_gen_int(s3c2410_intc_t *intc)
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{
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x49gp_t *x49gp = intc->x49gp;
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uint32_t fiq, service;
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int offset[6], index;
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const s3c2410_arb_t *arb;
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uint32_t request;
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int i;
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fiq = intc->srcpnd & intc->intmod;
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#ifdef DEBUG_S3C2410_INTC0
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printf("INTC: FIQ service request: %08x\n", fiq);
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#endif
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if (fiq) {
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/*
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* Generate FIQ.
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*/
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: vector to %08x\n", 0x1c);
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#endif
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cpu_interrupt(x49gp->env, CPU_INTERRUPT_FIQ);
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x49gp_set_idle(x49gp, 0);
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return;
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} else {
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cpu_reset_interrupt(x49gp->env, CPU_INTERRUPT_FIQ);
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}
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#ifdef DEBUG_S3C2410_INTC0
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printf("INTC: IRQ pending request: %08x\n", intc->intpnd);
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#endif
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if (intc->intpnd) {
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/*
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* Generate IRQ.
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*/
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: vector to %08x\n", 0x18);
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#endif
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cpu_interrupt(x49gp->env, CPU_INTERRUPT_HARD);
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x49gp_set_idle(x49gp, 0);
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return;
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}
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#ifdef DEBUG_S3C2410_INTC0
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printf("INTC: srcpnd %08x, intmsk: %08x\n", intc->srcpnd, intc->intmsk);
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#endif
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service = intc->srcpnd & ~(intc->intmsk);
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#ifdef DEBUG_S3C2410_INTC0
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printf("INTC: IRQ service request: %08x\n", service);
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#endif
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if (0 == service) {
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cpu_reset_interrupt(x49gp->env, CPU_INTERRUPT_HARD);
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return;
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}
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request = 0;
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for (i = 0; i < 6; i++) {
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arb = &s3c2410_arb_table[i];
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request |= s3c2410_intc_select_int(intc, arb, service, &offset[i]);
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#ifdef DEBUG_S3C2410_INTC0
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printf("INTC: ARB%u highest %d\n", i, offset[i]);
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#endif
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}
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arb = &s3c2410_arb_table[6];
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#ifdef DEBUG_S3C2410_INTC0
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printf("INTC: ARB%u request: %08x\n", 6, request);
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#endif
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if (s3c2410_intc_select_int(intc, arb, request, &index)) {
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intc->intoffset = offset[index];
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intc->intpnd |= (1 << intc->intoffset);
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: irq pending: %u (%08x)\n", intc->intoffset, intc->intpnd);
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#endif
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/*
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* Generate IRQ.
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*/
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: vector to %08x\n", 0x18);
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#endif
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cpu_interrupt(x49gp->env, CPU_INTERRUPT_HARD);
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x49gp_set_idle(x49gp, 0);
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return;
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}
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#ifdef DEBUG_S3C2410_INTC0
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printf("INTC: No irq pending\n");
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#endif
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cpu_reset_interrupt(x49gp->env, CPU_INTERRUPT_HARD);
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}
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void
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s3c2410_intc_assert(x49gp_t *x49gp, int irq, int level)
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{
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s3c2410_intc_t *intc = x49gp->s3c2410_intc;
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if (irq > 31)
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return;
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: assert irq %u (%08x)\n", irq, 1 << irq);
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#endif
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if (! (intc->src_pending & (1 << irq))) {
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if (level)
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intc->src_pending |= (1 << irq);
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intc->srcpnd |= (1 << irq);
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s3c2410_intc_gen_int(intc);
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}
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if (x49gp->arm_idle == 2) {
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if (irq == EINT0 || irq == INT_RTC)
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x49gp_set_idle(x49gp, 0);
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}
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}
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void
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s3c2410_intc_deassert(x49gp_t *x49gp, int irq)
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{
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s3c2410_intc_t *intc = x49gp->s3c2410_intc;
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if (irq > 31)
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return;
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: deassert irq %u (%08x)\n", irq, 1 << irq);
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#endif
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intc->src_pending &= ~(1 << irq);
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}
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static void
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s3c2410_intc_gen_int_from_sub_int(s3c2410_intc_t *intc)
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{
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x49gp_t *x49gp = intc->x49gp;
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uint32_t service;
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service = intc->subsrcpnd & ~(intc->intsubmsk);
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: subirq service request: %08x\n", service);
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#endif
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if (service & ((1 << SUB_INT_ERR0) | (1 << SUB_INT_TXD0) | (1 << SUB_INT_RXD0))) {
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s3c2410_intc_assert(x49gp, INT_UART0, 1);
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} else {
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s3c2410_intc_deassert(x49gp, INT_UART0);
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}
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if (service & ((1 << SUB_INT_ERR1) | (1 << SUB_INT_TXD1) | (1 << SUB_INT_RXD1))) {
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s3c2410_intc_assert(x49gp, INT_UART1, 1);
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} else {
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s3c2410_intc_deassert(x49gp, INT_UART1);
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}
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if (service & ((1 << SUB_INT_ERR2) | (1 << SUB_INT_TXD2) | (1 << SUB_INT_RXD2))) {
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s3c2410_intc_assert(x49gp, INT_UART2, 1);
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} else {
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s3c2410_intc_deassert(x49gp, INT_UART2);
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}
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if (service & ((1 << SUB_INT_ADC) | (1 << SUB_INT_TC))) {
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s3c2410_intc_assert(x49gp, INT_ADC, 1);
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} else {
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s3c2410_intc_deassert(x49gp, INT_ADC);
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}
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intc->subsrcpnd = intc->subsrc_pending;
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}
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void
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s3c2410_intc_sub_assert(x49gp_t *x49gp, int sub_irq, int level)
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{
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s3c2410_intc_t *intc = x49gp->s3c2410_intc;
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if (sub_irq > 31)
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return;
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: assert subirq %u (%08x)\n", sub_irq, 1 << sub_irq);
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#endif
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if (! (intc->subsrc_pending & (1 << sub_irq))) {
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if (level)
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intc->subsrc_pending |= (1 << sub_irq);
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intc->subsrcpnd |= (1 << sub_irq);
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s3c2410_intc_gen_int_from_sub_int(intc);
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}
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}
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void
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s3c2410_intc_sub_deassert(x49gp_t *x49gp, int sub_irq)
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{
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s3c2410_intc_t *intc = x49gp->s3c2410_intc;
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if (sub_irq > 31)
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return;
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#ifdef DEBUG_S3C2410_INTC
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printf("INTC: deassert subirq %u (%08x)\n", sub_irq, 1 << sub_irq);
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#endif
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intc->subsrc_pending &= ~(1 << sub_irq);
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}
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|
static uint32_t
|
|
s3c2410_intc_read(void *opaque, target_phys_addr_t offset)
|
|
{
|
|
s3c2410_intc_t *intc = opaque;
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|
s3c2410_offset_t *reg;
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|
uint32_t data;
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|
|
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if (! S3C2410_OFFSET_OK(intc, offset)) {
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|
return ~(0);
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|
}
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|
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reg = S3C2410_OFFSET_ENTRY(intc, offset);
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|
|
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switch (offset) {
|
|
case S3C2410_INTC_PRIORITY:
|
|
data = priority_get_word(intc);
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|
break;
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|
default:
|
|
data = *(reg->datap);
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break;
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|
}
|
|
|
|
#ifdef DEBUG_S3C2410_INTC
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printf("read %s [%08x] %s [%08lx] data %08x\n",
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"s3c2410-intc", S3C2410_INTC_BASE,
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reg->name, (unsigned long) offset, data);
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#endif
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|
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return data;
|
|
}
|
|
|
|
static void
|
|
s3c2410_intc_write(void *opaque, target_phys_addr_t offset, uint32_t data)
|
|
{
|
|
#ifdef DEBUG_S3C2410_INTC
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s3c2410_offset_t *reg;
|
|
#endif
|
|
s3c2410_intc_t *intc = opaque;
|
|
|
|
if (! S3C2410_OFFSET_OK(intc, offset)) {
|
|
return;
|
|
}
|
|
|
|
#ifdef DEBUG_S3C2410_INTC
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|
reg = S3C2410_OFFSET_ENTRY(intc, offset);
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|
|
|
printf("write %s [%08x] %s [%08lx] data %08x\n",
|
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"s3c2410-intc", S3C2410_INTC_BASE,
|
|
reg->name, (unsigned long) offset, data);
|
|
#endif
|
|
|
|
switch (offset) {
|
|
case S3C2410_INTC_SRCPND:
|
|
srcpnd_put_word(intc, data);
|
|
break;
|
|
case S3C2410_INTC_INTMOD:
|
|
intmod_put_word(intc, data);
|
|
break;
|
|
case S3C2410_INTC_INTMSK:
|
|
intmsk_put_word(intc, data);
|
|
break;
|
|
case S3C2410_INTC_PRIORITY:
|
|
priority_put_word(intc, data);
|
|
break;
|
|
case S3C2410_INTC_INTPND:
|
|
intpnd_put_word(intc, data);
|
|
break;
|
|
case S3C2410_INTC_SUBSRCPND:
|
|
subsrcpnd_put_word(intc, data);
|
|
break;
|
|
case S3C2410_INTC_INTSUBMSK:
|
|
intsubmsk_put_word(intc, data);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int
|
|
s3c2410_intc_load(x49gp_module_t *module, GKeyFile *key)
|
|
{
|
|
s3c2410_intc_t *intc = module->user_data;
|
|
s3c2410_offset_t *reg;
|
|
int error = 0;
|
|
int i;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
for (i = 0; i < intc->nr_regs; i++) {
|
|
reg = &intc->regs[i];
|
|
|
|
if (NULL == reg->name)
|
|
continue;
|
|
|
|
if (x49gp_module_get_u32(module, key, reg->name,
|
|
reg->reset, reg->datap))
|
|
error = -EAGAIN;
|
|
}
|
|
|
|
intc->src_pending = intc->srcpnd;
|
|
intc->subsrc_pending = intc->subsrcpnd;
|
|
intc->srcpnd = 0;
|
|
intc->subsrcpnd = 0;
|
|
|
|
priority_put_word(intc, intc->priority);
|
|
intsubmsk_put_word(intc, intc->intsubmsk);
|
|
intmsk_put_word(intc, intc->intmsk);
|
|
|
|
return error;
|
|
}
|
|
|
|
static int
|
|
s3c2410_intc_save(x49gp_module_t *module, GKeyFile *key)
|
|
{
|
|
s3c2410_intc_t *intc = module->user_data;
|
|
s3c2410_offset_t *reg;
|
|
int i;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
intc->srcpnd = intc->src_pending;
|
|
intc->subsrcpnd = intc->subsrc_pending;
|
|
|
|
for (i = 0; i < intc->nr_regs; i++) {
|
|
reg = &intc->regs[i];
|
|
|
|
if (NULL == reg->name)
|
|
continue;
|
|
|
|
x49gp_module_set_u32(module, key, reg->name, *(reg->datap));
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
s3c2410_intc_reset(x49gp_module_t *module, x49gp_reset_t reset)
|
|
{
|
|
s3c2410_intc_t *intc = module->user_data;
|
|
s3c2410_offset_t *reg;
|
|
int i;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
if (reset == X49GP_RESET_POWER_OFF) {
|
|
return 0;
|
|
}
|
|
|
|
for (i = 0; i < intc->nr_regs; i++) {
|
|
reg = &intc->regs[i];
|
|
|
|
if (NULL == reg->name)
|
|
continue;
|
|
|
|
*(reg->datap) = reg->reset;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static CPUReadMemoryFunc *s3c2410_intc_readfn[] =
|
|
{
|
|
s3c2410_intc_read,
|
|
s3c2410_intc_read,
|
|
s3c2410_intc_read
|
|
};
|
|
|
|
static CPUWriteMemoryFunc *s3c2410_intc_writefn[] =
|
|
{
|
|
s3c2410_intc_write,
|
|
s3c2410_intc_write,
|
|
s3c2410_intc_write
|
|
};
|
|
|
|
static int
|
|
s3c2410_intc_init(x49gp_module_t *module)
|
|
{
|
|
s3c2410_intc_t *intc;
|
|
int iotype;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
intc = malloc(sizeof(s3c2410_intc_t));
|
|
if (NULL == intc) {
|
|
fprintf(stderr, "%s:%u: Out of memory\n",
|
|
__FUNCTION__, __LINE__);
|
|
return -ENOMEM;
|
|
}
|
|
if (s3c2410_intc_data_init(intc)) {
|
|
free(intc);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
module->user_data = intc;
|
|
|
|
intc->x49gp = module->x49gp;
|
|
intc->x49gp->s3c2410_intc = intc;
|
|
|
|
iotype = cpu_register_io_memory(s3c2410_intc_readfn,
|
|
s3c2410_intc_writefn, intc);
|
|
#ifdef DEBUG_S3C2410_INTC
|
|
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
|
|
#endif
|
|
cpu_register_physical_memory(S3C2410_INTC_BASE, S3C2410_MAP_SIZE, iotype);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
s3c2410_intc_exit(x49gp_module_t *module)
|
|
{
|
|
s3c2410_intc_t *intc;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
if (module->user_data) {
|
|
intc = module->user_data;
|
|
if (intc->regs)
|
|
free(intc->regs);
|
|
free(intc);
|
|
}
|
|
|
|
x49gp_module_unregister(module);
|
|
free(module);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
x49gp_s3c2410_intc_init(x49gp_t *x49gp)
|
|
{
|
|
x49gp_module_t *module;
|
|
|
|
if (x49gp_module_init(x49gp, "s3c2410-intc",
|
|
s3c2410_intc_init,
|
|
s3c2410_intc_exit,
|
|
s3c2410_intc_reset,
|
|
s3c2410_intc_load,
|
|
s3c2410_intc_save,
|
|
NULL, &module)) {
|
|
return -1;
|
|
}
|
|
|
|
return x49gp_module_register(module);
|
|
}
|