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[3298] Updated QEMU patches

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This commit is contained in:
claudiol 2018-08-28 12:42:54 -04:00
parent 1dd8295b04
commit 02ed9ab8a9
56 changed files with 16 additions and 4551 deletions
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84
Makefile
View file

@ -49,32 +49,16 @@ QEMU_DEFINES = -DTARGET_ARM -DX49GP \
# Use this for speed
DEFINES = $(QEMU_DEFINES)
ifdef QEMU_OLD
QEMUSRC = qemu/prepare.sh \
$(wildcard qemu/patches/*.patch) \
$(wildcard qemu/patches/*.diff)
QEMU=qemu/qemu
else
QEMUSRC =
QEMU=qemu/qemu-git
endif
QEMUMAKE = $(shell if [ "`uname -s`" = "Linux" -a "`uname -m`" = "sun4u" ]; then echo "sparc32 $(MAKE)"; else echo "$(MAKE)"; fi)
ifdef QEMU_OLD
QEMU_DIR=$(QEMU)
QEMU_DEFINES+=-DQEMU_OLD
X49GP_LDFLAGS = -L$(QEMU)/arm-softmmu
X49GP_LIBS = -lqemu -lz
else
QEMU_DIR=$(QEMU)
QEMU_DIR_BUILD=$(QEMU_DIR)/arm-softmmu
QEMU_DEFINES+=-DNEED_CPU_H
QEMU_OBJS = $(QEMU_DIR_BUILD)/exec.o $(QEMU_DIR_BUILD)/translate-all.o $(QEMU_DIR_BUILD)/cpu-exec.o $(QEMU_DIR_BUILD)/translate.o $(QEMU_DIR_BUILD)/fpu/softfloat.o $(QEMU_DIR_BUILD)/op_helper.o $(QEMU_DIR_BUILD)/helper.o $(QEMU_DIR_BUILD)/disas.o $(QEMU_DIR_BUILD)/i386-dis.o $(QEMU_DIR_BUILD)/arm-dis.o $(QEMU_DIR_BUILD)/tcg/tcg.o $(QEMU_DIR_BUILD)/iwmmxt_helper.o $(QEMU_DIR_BUILD)/neon_helper.o
X49GP_LDFLAGS =
X49GP_LIBS = $(QEMU_OBJS)
endif
QEMU_INCDIR=$(QEMU_DIR)
QEMU_INC=-I$(QEMU_INCDIR)/target-arm -I$(QEMU_INCDIR) -I$(QEMU_INCDIR)/fpu -I$(QEMU_INCDIR)/arm-softmmu
@ -89,11 +73,7 @@ INSTALL_MENU_DIR = "$(INSTALL_PREFIX)"/share/applications
INSTALL_MAN_DIR = "$(INSTALL_PREFIX)/share/man/man1"
DEFINES += -DX49GP_DATADIR=\"$(INSTALL_DATA_DIR)\"
ifdef QEMU_OLD
CC = $(shell if [ "`uname -s`" = "Darwin" ]; then echo "gcc"; else echo "gcc-3.4"; fi)
else
CC = gcc
endif
LD = $(CC)
AR = ar
RANLIB = ranlib
@ -111,10 +91,6 @@ MAKEDEPEND = $(CC) -MM
CFLAGS += $(shell pkg-config --cflags gtk+-2.0)
LDLIBS += $(shell pkg-config --libs gtk+-2.0) -lz -lm
ifdef QEMU_OLD
export MAKE MAKEDEPEND CC LD AR RANLIB CFLAGS LDFLAGS
endif
LIBS = $(QEMU)
SRCS = main.c module.c flash.c sram.c s3c2410.c \
@ -139,22 +115,12 @@ SRCS = main.c module.c flash.c sram.c s3c2410.c \
OBJS = $(SRCS:.c=.o)
ifdef QEMU_OLD
VVFATOBJS = $(QEMU)/arm-softmmu/block-vvfat.o \
$(QEMU)/arm-softmmu/block-qcow.o \
$(QEMU)/arm-softmmu/block-raw.o
else
# TEMPO hack
VVFATOBJS = block-vvfat.o \
block-qcow.o \
block-raw.o
endif
ifdef QEMU_OLD
VVFATOBJS += $(QEMU)/arm-softmmu/cutils.o
else
VVFATOBJS += $(QEMU_DIR)/cutils.o
endif
TARGET = x49gp
TARGET_ALLCAPS = X49GP
@ -168,13 +134,8 @@ else
do-it-all: depend-and-build
endif
ifdef QEMU_OLD
$(TARGET): $(OBJS) $(VVFATOBJS) $(QEMU)/arm-softmmu/libqemu.a
$(CC) $(LDFLAGS) -o $@ $(OBJS) $(VVFATOBJS) $(LDLIBS)
else
$(TARGET): $(OBJS) $(VVFATOBJS) $(QEMU_OBJS)
$(CC) $(LDFLAGS) -o $@ $(OBJS) $(VVFATOBJS) $(LDLIBS)
endif
install: all $(TARGET).desktop $(TARGET).man
install -D -m 755 $(TARGET) "$(INSTALL_BINARY_DIR)/$(TARGET)"
@ -202,18 +163,7 @@ endif
sim: dummy
$(MAKE) -C $@
ifdef QEMU_OLD
$(QEMU): $(QEMU)/config-host.h dummy
+$(QEMUMAKE) -C $@
$(QEMU)/config-host.h: $(QEMUSRC)
cd qemu; ./prepare.sh
$(MAKE) -C . all
$(QEMU)/arm-softmmu/%.o: $(QEMU)/%.c
+$(QEMUMAKE) BASE_CFLAGS=-DX49GP -C $(QEMU)/arm-softmmu $(shell basename $@)
else
$(QEMU)/config-host.h: $(QEMUSRC)
$(QEMU)/config-host.h:
+( cd $(QEMU); \
./configure-small --extra-cflags=-DX49GP; \
$(QEMUMAKE) -f Makefile-small )
@ -222,7 +172,6 @@ $(QEMU_OBJS): _dir_qemu
_dir_qemu: dummy
+$(QEMUMAKE) -C $(QEMU) -f Makefile-small
endif
%.o: %.c
$(CC) $(CFLAGS) -o $@ -c $<
@ -230,36 +179,6 @@ endif
block-vvfat.o: block-vvfat.c
$(CC) $(CFLAGS) -fno-aggressive-loop-optimizations -o $@ -c $<
ifdef QEMU_OLD
clean-libs:
if [ -n "$(LIBS)" ]; then \
for d in $(LIBS); do \
$(MAKE) -C $$d clean; \
done \
fi
clean: clean-libs
rm -f *.o core *~ .depend
distclean: clean
rm -rf $(QEMU)
rm -f $(TARGET) $(TARGET).desktop $(TARGET).man
depend-and-build: depend
$(MAKE) -C . all
depend-libs: $(QEMU)/config-host.h
if [ -n "$(LIBS)" ]; then \
for d in $(LIBS); do \
if [ "$$d" != "$(QEMU)" ]; then \
$(MAKE) -C $$d depend; \
fi \
done \
fi
depend: depend-libs
$(MAKEDEPEND) $(CFLAGS) $(SRCS) >.depend
else
clean-qemu:
$(MAKE) -C $(QEMU) -f Makefile-small clean
@ -277,6 +196,5 @@ depend-and-build: depend
depend: depend-libs
$(MAKEDEPEND) $(CFLAGS) $(SRCS) >.depend
endif
dummy:

4
block-qcow.c
View file

@ -21,12 +21,8 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifdef QEMU_OLD
#include "vl.h"
#else
#include "qemu-common.h"
#include "block.h"
#endif
#include "block_int.h"
#include <zlib.h>
#if 0

4
block-raw.c
View file

@ -21,12 +21,8 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifdef QEMU_OLD
#include "vl.h"
#else
#include "qemu-common.h"
#include "block.h"
#endif
#include "block_int.h"
#include <assert.h>
#ifndef _WIN32

4
block-vvfat.c
View file

@ -25,12 +25,8 @@
#include <sys/stat.h>
#include <dirent.h>
#include <assert.h>
#ifdef QEMU_OLD
#include "vl.h"
#else
#include "qemu-common.h"
#include "block.h"
#endif
#include "block_int.h"
#ifndef S_IWGRP

4
block.c
View file

@ -8,13 +8,9 @@
#include <errno.h>
#include <sys/stat.h>
#ifndef QEMU_OLD
#include "qemu-common.h"
#endif
#include <block.h>
#ifndef QEMU_OLD
#include "block_int.h"
#endif
#define SECTOR_BITS 9
#define SECTOR_SIZE (1 << SECTOR_BITS)

29
flash.c
View file

@ -330,10 +330,6 @@ flash_readb(void *opaque, target_phys_addr_t offset)
uint32_t shift;
unsigned char data;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t) phys_ram_base + flash->offset;
#endif
if (flash->state == FLASH_STATE_NORMAL) {
data = *(datap + offset);
} else {
@ -357,10 +353,6 @@ flash_readw(void *opaque, target_phys_addr_t offset)
uint8_t *datap = flash->data;
uint32_t data;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t) phys_ram_base + flash->offset;
#endif
if (flash->state == FLASH_STATE_NORMAL) {
data = lduw_p(datap + offset);
} else {
@ -382,10 +374,6 @@ flash_readl(void *opaque, target_phys_addr_t offset)
uint8_t *datap = flash->data;
uint32_t data;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t) phys_ram_base + flash->offset;
#endif
if (flash->state == FLASH_STATE_NORMAL) {
data = ldl_p(datap + offset);
} else {
@ -407,10 +395,6 @@ flash_writeb(void *opaque, target_phys_addr_t offset, uint32_t data)
x49gp_flash_t *flash = opaque;
uint32_t shift;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t) phys_ram_base + flash->offset;
#endif
data &= 0xff;
#ifdef DEBUG_X49GP_FLASH_WRITE
@ -432,10 +416,6 @@ flash_writew(void *opaque, target_phys_addr_t offset, uint32_t data)
{
x49gp_flash_t *flash = opaque;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t) phys_ram_base + flash->offset;
#endif
data &= 0xffff;
#ifdef DEBUG_X49GP_FLASH_WRITE
@ -451,10 +431,6 @@ flash_writel(void *opaque, target_phys_addr_t offset, uint32_t data)
{
x49gp_flash_t *flash = opaque;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t) phys_ram_base + flash->offset;
#endif
#ifdef DEBUG_X49GP_FLASH_WRITE
printf("write FLASH 4 (state %u) at offset %08lx: %08x\n",
flash->state, offset, data);
@ -656,13 +632,8 @@ flash_init(x49gp_module_t *module)
module->user_data = flash;
#ifdef QEMU_OLD
flash->iotype = cpu_register_io_memory(0, flash_readfn,
flash_writefn, flash);
#else
flash->iotype = cpu_register_io_memory(flash_readfn,
flash_writefn, flash);
#endif
flash->data = (void *) -1;
flash->offset = phys_ram_size;

16
gdbstub.c
View file

@ -353,13 +353,7 @@ static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
p++;
len = strtoull(p, (char **)&p, 16);
if (type == 0 || type == 1) {
if (
#ifdef QEMU_OLD
cpu_breakpoint_insert(env, addr) < 0
#else
cpu_breakpoint_insert(env, addr, BP_GDB, NULL) < 0
#endif
)
if (cpu_breakpoint_insert(env, addr, BP_GDB, NULL) < 0)
goto breakpoint_error;
put_packet(s, "OK");
} else {
@ -376,11 +370,7 @@ static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
p++;
len = strtoull(p, (char **)&p, 16);
if (type == 0 || type == 1) {
#ifdef QEMU_OLD
cpu_breakpoint_remove(env, addr);
#else
cpu_breakpoint_remove(env, addr, BP_GDB);
#endif
put_packet(s, "OK");
} else {
goto breakpoint_error;
@ -441,11 +431,7 @@ void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
}
va_end(va);
put_packet(s, buf);
#ifdef QEMU_OLD
cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
#else
cpu_exit(s->env);
#endif
}
static void gdb_read_byte(GDBState *s, int ch)

109
include/block.h
View file

@ -17,9 +17,6 @@
it (default for
bdrv_file_open()) */
#ifdef QEMU_OLD
typedef struct BlockDriverState BlockDriverState;
#endif
typedef struct BlockDriver BlockDriver;
typedef struct SnapshotInfo QEMUSnapshotInfo;
typedef struct BlockDriverInfo BlockDriverInfo;
@ -47,110 +44,6 @@ int bdrv_pread(BlockDriverState *bs, int64_t offset,
int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
const void *buf, int count);
#ifdef QEMU_OLD
struct BlockDriver {
const char *format_name;
int instance_size;
int (*bdrv_probe)(const uint8_t *buf, int buf_size, const char *filename);
int (*bdrv_open)(BlockDriverState *bs, const char *filename, int flags);
int (*bdrv_read)(BlockDriverState *bs, int64_t sector_num,
uint8_t *buf, int nb_sectors);
int (*bdrv_write)(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors);
void (*bdrv_close)(BlockDriverState *bs);
int (*bdrv_create)(const char *filename, int64_t total_sectors,
const char *backing_file, int flags);
void (*bdrv_flush)(BlockDriverState *bs);
int (*bdrv_is_allocated)(BlockDriverState *bs, int64_t sector_num,
int nb_sectors, int *pnum);
int (*bdrv_set_key)(BlockDriverState *bs, const char *key);
int (*bdrv_make_empty)(BlockDriverState *bs);
/* aio */
BlockDriverAIOCB *(*bdrv_aio_read)(BlockDriverState *bs,
int64_t sector_num, uint8_t *buf, int nb_sectors,
BlockDriverCompletionFunc *cb, void *opaque);
BlockDriverAIOCB *(*bdrv_aio_write)(BlockDriverState *bs,
int64_t sector_num, const uint8_t *buf, int nb_sectors,
BlockDriverCompletionFunc *cb, void *opaque);
void (*bdrv_aio_cancel)(BlockDriverAIOCB *acb);
int aiocb_size;
const char *protocol_name;
int (*bdrv_pread)(BlockDriverState *bs, int64_t offset,
uint8_t *buf, int count);
int (*bdrv_pwrite)(BlockDriverState *bs, int64_t offset,
const uint8_t *buf, int count);
int (*bdrv_truncate)(BlockDriverState *bs, int64_t offset);
int64_t (*bdrv_getlength)(BlockDriverState *bs);
int (*bdrv_write_compressed)(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors);
int (*bdrv_snapshot_create)(BlockDriverState *bs,
QEMUSnapshotInfo *sn_info);
int (*bdrv_snapshot_goto)(BlockDriverState *bs,
const char *snapshot_id);
int (*bdrv_snapshot_delete)(BlockDriverState *bs, const char *snapshot_id);
int (*bdrv_snapshot_list)(BlockDriverState *bs,
QEMUSnapshotInfo **psn_info);
int (*bdrv_get_info)(BlockDriverState *bs, BlockDriverInfo *bdi);
/* removable device specific */
int (*bdrv_is_inserted)(BlockDriverState *bs);
int (*bdrv_media_changed)(BlockDriverState *bs);
int (*bdrv_eject)(BlockDriverState *bs, int eject_flag);
int (*bdrv_set_locked)(BlockDriverState *bs, int locked);
BlockDriverAIOCB *free_aiocb;
struct BlockDriver *next;
};
struct BlockDriverState {
int64_t total_sectors; /* if we are reading a disk image, give its
size in sectors */
int read_only; /* if true, the media is read only */
int removable; /* if true, the media can be removed */
int locked; /* if true, the media cannot temporarily be ejected */
int encrypted; /* if true, the media is encrypted */
/* event callback when inserting/removing */
void (*change_cb)(void *opaque);
void *change_opaque;
BlockDriver *drv; /* NULL means no media */
void *opaque;
int boot_sector_enabled;
uint8_t boot_sector_data[512];
char filename[1024];
char backing_file[1024]; /* if non zero, the image is a diff of
this file image */
int is_temporary;
int media_changed;
BlockDriverState *backing_hd;
// /* async read/write emulation */
//
// void *sync_aiocb;
/* NOTE: the following infos are only hints for real hardware
drivers. They are not used by the block driver */
int cyls, heads, secs, translation;
int type;
char device_name[32];
BlockDriverState *next;
};
void *qemu_malloc(size_t size);
void *qemu_mallocz(size_t size);
void qemu_free(void *ptr);
void pstrcpy(char *buf, int buf_size, const char *str);
char *pstrcat(char *buf, int buf_size, const char *s);
int strstart(const char *str, const char *val, const char **ptr);
int stristart(const char *str, const char *val, const char **ptr);
#endif /* QEMU_OLD */
#ifndef QEMU_OLD
int bdrv_truncate(BlockDriverState *bs, int64_t offset);
int64_t bdrv_getlength(BlockDriverState *bs);
void bdrv_flush(BlockDriverState *bs);
@ -182,6 +75,4 @@ struct BlockDriverInfo {
int64_t vm_state_offset;
};
#endif
#endif /* !(BLOCK_H) */

14
include/list.h
View file

@ -9,20 +9,6 @@ static inline void prefetch(const void *x) {;}
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
#endif
#ifdef QEMU_OLD
/**
* container_of - cast a member of a structure out to the containing structure
*
* @ptr: the pointer to the member.
* @type: the type of the container struct this is embedded in.
* @member: the name of the member within the struct.
*
*/
#define container_of(ptr, type, member) ({ \
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
(type *)( (char *)__mptr - offsetof(type,member) );})
#endif
/*
* These are non-NULL pointers that will result in page faults
* under normal circumstances, used to verify that nobody uses

2
include/x49gp.h
View file

@ -19,10 +19,8 @@
#include <list.h>
/* LD TEMPO HACK */
#ifndef QEMU_OLD
extern uint8_t *phys_ram_base;
extern int phys_ram_size;
#endif
typedef enum {
X49GP_ARM_RUN = 0,

68
main.c
View file

@ -27,15 +27,11 @@
static x49gp_t *x49gp;
#ifdef QEMU_OLD // LD TEMPO HACK
extern
#endif
/* LD TEMPO HACK */
CPUState *__GLOBAL_env;
int semihosting_enabled = 1;
/* LD TEMPO HACK */
#ifndef QEMU_OLD
uint8_t *phys_ram_base;
int phys_ram_size;
ram_addr_t ram_size = 0x80000; // LD ???
@ -107,8 +103,6 @@ void gdb_register_coprocessor(CPUState * env,
fprintf(stderr, "TODO: %s\n", __FUNCTION__);
}
#endif /* !QEMU_OLD */
void *
qemu_malloc(size_t size)
{
@ -146,45 +140,17 @@ qemu_vmalloc(size_t size)
#endif
}
#ifdef QEMU_OLD
int
term_vprintf(const char *fmt, va_list ap)
{
return vprintf(fmt, ap);
}
int
term_printf(const char *fmt, ...)
{
va_list ap;
int n;
va_start(ap, fmt);
n = vprintf(fmt, ap);
va_end(ap);
return n;
}
#endif
#define SWI_Breakpoint 0x180000
#ifdef QEMU_OLD
int
do_arm_semihosting(CPUState *env, uint32_t number)
#else
uint32_t
do_arm_semihosting(CPUState *env)
#endif
{
#ifndef QEMU_OLD
uint32_t number;
if (env->thumb) {
number = lduw_code(env->regs[15] - 2) & 0xff;
} else {
number = ldl_code(env->regs[15] - 4) & 0xffffff;
}
#endif
uint32_t number;
if (env->thumb) {
number = lduw_code(env->regs[15] - 2) & 0xff;
} else {
number = ldl_code(env->regs[15] - 4) & 0xffffff;
}
switch (number) {
case SWI_Breakpoint:
break;
@ -244,11 +210,7 @@ x49gp_set_idle(x49gp_t *x49gp, x49gp_arm_idle_t idle)
x49gp->env->halted = 0;
} else {
x49gp->env->halted = 1;
#ifdef QEMU_OLD
cpu_interrupt(x49gp->env, CPU_INTERRUPT_EXIT);
#else
cpu_exit(x49gp->env);
#endif
cpu_exit(x49gp->env);
}
}
@ -551,11 +513,7 @@ ui_sighnd(int sig)
case SIGQUIT:
case SIGTERM:
x49gp->arm_exit = 1;
#ifdef QEMU_OLD
cpu_interrupt(x49gp->env, CPU_INTERRUPT_EXIT);
#else
cpu_exit(x49gp->env);
#endif
cpu_exit(x49gp->env);
break;
}
}
@ -606,13 +564,9 @@ main(int argc, char **argv)
x49gp->PCLK_ratio = 4;
x49gp->PCLK = 75000000 / 4;
#ifdef QEMU_OLD
x49gp->env = cpu_init();
#else
//cpu_set_log(0xffffffff);
cpu_exec_init_all(0);
//cpu_set_log(0xffffffff);
cpu_exec_init_all(0);
x49gp->env = cpu_init("arm926");
#endif
__GLOBAL_env = x49gp->env;
// cpu_set_log(cpu_str_to_log_mask("all"));

8
module.c
View file

@ -44,12 +44,8 @@ x49gp_modules_init(x49gp_t *x49gp)
phys_ram_dirty = qemu_vmalloc(phys_ram_size >> TARGET_PAGE_BITS);
memset(phys_ram_dirty, 0xff, phys_ram_size >> TARGET_PAGE_BITS);
#ifndef QEMU_OLD
{
ram_addr_t x49gp_ram_alloc(ram_addr_t size, uint8_t *base);
x49gp_ram_alloc(phys_ram_size, phys_ram_base);
}
#endif
ram_addr_t x49gp_ram_alloc(ram_addr_t size, uint8_t *base);
x49gp_ram_alloc(phys_ram_size, phys_ram_base);
return 0;
}

34
qemu/patches/q_block.c_hdled_1.diff
View file

@ -1,34 +0,0 @@
--- block.c 2007-02-06 02:15:39.000000000 +0100
+++ block2.c 2007-02-06 02:24:10.000000000 +0100
@@ -497,6 +497,7 @@
int bdrv_read(BlockDriverState *bs, int64_t sector_num,
uint8_t *buf, int nb_sectors)
{
+ bs->activityLED = 1;
BlockDriver *drv = bs->drv;
if (!drv)
@@ -534,6 +535,7 @@
int bdrv_write(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors)
{
+ bs->activityLED = 1;
BlockDriver *drv = bs->drv;
if (!bs->drv)
return -ENOMEDIUM;
@@ -1058,6 +1060,7 @@
uint8_t *buf, int nb_sectors,
BlockDriverCompletionFunc *cb, void *opaque)
{
+ bs->activityLED = 1;
BlockDriver *drv = bs->drv;
if (!drv)
@@ -1078,6 +1081,7 @@
const uint8_t *buf, int nb_sectors,
BlockDriverCompletionFunc *cb, void *opaque)
{
+ bs->activityLED = 1;
BlockDriver *drv = bs->drv;
if (!drv)

10
qemu/patches/q_block_int.h_hdled_1.diff
View file

@ -1,10 +0,0 @@
--- block_int.h 2006-06-21 18:46:53.000000000 +0200
+++ block_int2.h 2006-07-03 17:20:04.000000000 +0200
@@ -51,6 +51,7 @@
int removable; /* if true, the media can be removed */
int locked; /* if true, the media cannot temporarily be ejected */
int encrypted; /* if true, the media is encrypted */
+ int activityLED; /* if true, the media is accessed atm */
/* event callback when inserting/removing */
void (*change_cb)(void *opaque);
void *change_opaque;

26
qemu/patches/q_host-cocoa_02.diff
View file

@ -1,26 +0,0 @@
--- Makefile.target 2007-01-31 13:24:18.000000000 +0100
+++ Makefile.target 2007-02-02 14:45:02.000000000 +0100
@@ -415,8 +419,8 @@
endif
VL_OBJS+=vnc.o
ifdef CONFIG_COCOA
-VL_OBJS+=cocoa.o
-COCOA_LIBS=-F/System/Library/Frameworks -framework Cocoa -framework IOKit
+VL_OBJS+=cocoaQemuMain.o cocoaQemuController.o cocoaQemu.o cocoaQemuProgressWindow.o cocoaQemuWindow.o cocoaQemuOpenGLView.o cocoaQemuQuartzView.o cocoaQemuQuickDrawView.o cocoaPopUpView.o cocoaCpuView.o FSController.o FSRoundedView.o FSToolbarController.o FSTransparentButton.o
+COCOA_LIBS=-F/System/Library/Frameworks -framework Cocoa -framework IOKit -framework CoreFoundation -framework OpenGL -framework ApplicationServices
ifdef CONFIG_COREAUDIO
COCOA_LIBS+=-framework CoreAudio
endif
@@ -465,7 +469,11 @@
$(QEMU_SYSTEM): $(VL_OBJS) libqemu.a
$(CC) $(VL_LDFLAGS) -o $@ $^ $(LIBS) $(SDL_LIBS) $(COCOA_LIBS) $(VL_LIBS)
-cocoa.o: cocoa.m
+
+cocoa%.o: host-cocoa/cocoa%.m
+ $(CC) $(CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $<
+
+FS%.o: host-cocoa/FSControls/FS%.m
$(CC) $(CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $<
sdl.o: sdl.c keymaps.c sdl_keysym.h

41
qemu/patches/q_vga.c_02.diff
View file

@ -1,41 +0,0 @@
--- vga.c 2005-12-19 23:51:53.000000000 +0100
+++ vga2.c 2006-04-10 20:21:56.000000000 +0200
@@ -788,22 +788,38 @@
static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b)
{
+#if __LITTLE_ENDIAN__
+ return ((b >> 5) << 5) | ((g >> 5) << 2) | (r >> 6);
+#else
return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6);
+#endif
}
static inline unsigned int rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b)
{
+#if __LITTLE_ENDIAN__
+ return ((b >> 3) << 10) | ((g >> 3) << 5) | (r >> 3);
+#else
return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3);
+#endif
}
static inline unsigned int rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b)
{
+#if __LITTLE_ENDIAN__
+ return ((b >> 3) << 11) | ((g >> 2) << 5) | (r >> 3);
+#else
return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
+#endif
}
static inline unsigned int rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
{
+#if __LITTLE_ENDIAN__
+ return (b << 16) | (g << 8) | r;
+#else
return (r << 16) | (g << 8) | b;
+#endif
}
#define DEPTH 8

137
qemu/patches/qemu-0.7.2-dyngen-check-stack-clobbers.patch
View file

@ -1,137 +0,0 @@
2005-11-11 Gwenole Beauchesne <gbeauchesne@mandriva.com>
* Check for stack clobbers in functions using GOTO_LABEL_PARAM().
--- qemu-0.7.2/dyngen.c.dyngen-check-stack-clobbers 2005-11-11 16:26:33.000000000 +0100
+++ qemu-0.7.2/dyngen.c 2005-11-11 17:30:29.000000000 +0100
@@ -1414,6 +1414,9 @@ int arm_emit_ldr_info(const char *name,
#define FLAG_TARGET (1 << 3)
/* This is a magic instruction that needs fixing up. */
#define FLAG_EXIT (1 << 4)
+/* This instruction clobbers the stack pointer. */
+/* XXX only supports push, pop, add/sub $imm,%esp */
+#define FLAG_STACK (1 << 5)
#define MAX_EXITS 5
static void
@@ -1454,6 +1457,7 @@ trace_i386_insn (const char *name, uint8
int is_jmp;
int is_exit;
int is_pcrel;
+ int is_stack;
int immed;
int seen_rexw;
int32_t disp;
@@ -1476,6 +1480,7 @@ trace_i386_insn (const char *name, uint8
is_exit = 0;
seen_rexw = 0;
is_pcrel = 0;
+ is_stack = 0;
while (is_prefix) {
op = ptr[insn_size];
@@ -1522,6 +1527,7 @@ trace_i386_insn (const char *name, uint8
switch (op & 0x7) {
case 0: /* push fs/gs */
case 1: /* pop fs/gs */
+ is_stack = 1;
case 2: /* cpuid/rsm */
modrm = 0;
break;
@@ -1594,6 +1600,7 @@ trace_i386_insn (const char *name, uint8
#endif
case 5: /* push/pop general register. */
modrm = 0;
+ is_stack = 1;
break;
case 6:
@@ -1601,6 +1608,7 @@ trace_i386_insn (const char *name, uint8
case 0: /* pusha */
case 1: /* popa */
modrm = 0;
+ is_stack = 1;
break;
case 2: /* bound */
case 3: /* arpl */
@@ -1620,10 +1628,12 @@ trace_i386_insn (const char *name, uint8
case 8: /* push immediate */
immed = op_size;
modrm = 0;
+ is_stack = 1;
break;
case 10: /* push 8-bit immediate */
immed = 1;
modrm = 0;
+ is_stack = 1;
break;
case 9: /* imul immediate */
immed = op_size;
@@ -1653,8 +1663,22 @@ trace_i386_insn (const char *name, uint8
immed = op_size;
else
immed = 1;
+ if (op == 0x81 || op == 0x83) {
+ /* add, sub */
+ op = ptr[insn_size];
+ switch ((op >> 3) & 7) {
+ case 0:
+ case 5:
+ is_stack = (op & 7) == 4;
+ break;
+ }
+ }
}
- /* else test, xchg, mov, lea or pop general. */
+ else if ((op & 0xf) == 0xf) {
+ /* pop general. */
+ is_stack = 1;
+ }
+ /* else test, xchg, mov, lea. */
break;
case 9:
@@ -1904,6 +1928,9 @@ trace_i386_insn (const char *name, uint8
if (is_exit)
flags[insn] |= FLAG_EXIT;
+ if (is_stack)
+ flags[insn] |= FLAG_STACK;
+
if (!(is_jmp || is_ret || is_exit))
flags[insn + insn_size] |= FLAG_INSN;
}
@@ -1924,6 +1951,7 @@ static int trace_i386_op(const char * na
int num_exits;
int len;
int last_insn;
+ int stack_clobbered;
len = *plen;
flags = malloc(len + 1);
@@ -1947,6 +1975,7 @@ static int trace_i386_op(const char * na
retpos = -1;
num_exits = 0;
last_insn = 0;
+ stack_clobbered = 0;
for (insn = 0; insn < len; insn++) {
if (flags[insn] & FLAG_RET) {
/* ??? In theory it should be possible to handle multiple return
@@ -1956,6 +1985,8 @@ static int trace_i386_op(const char * na
retpos = insn;
}
if (flags[insn] & FLAG_EXIT) {
+ if (stack_clobbered)
+ error("Stack clobbered in %s", name);
if (num_exits == MAX_EXITS)
error("Too many block exits in %s", name);
exit_addrs[num_exits] = insn;
@@ -1963,6 +1994,8 @@ static int trace_i386_op(const char * na
}
if (flags[insn] & FLAG_INSN)
last_insn = insn;
+ if (flags[insn] & FLAG_STACK)
+ stack_clobbered = 1;
}
exit_addrs[num_exits] = -1;

37
qemu/patches/qemu-0.7.2-gcc4-opts.patch
View file

@ -1,37 +0,0 @@
2005-11-11 Gwenole Beauchesne <gbeauchesne@mandriva.com>
* Globaaly save %ebx, %esi, %edi on entry to generated
function. This avoids some register spills in synthetic opcodes.
NOTE: this also easily fixes gcc4 compiled qemu-system-x86_64 on x86.
--- qemu-0.7.2/cpu-exec.c.gcc4-opts 2005-09-04 19:11:31.000000000 +0200
+++ qemu-0.7.2/cpu-exec.c 2005-11-11 17:40:47.000000000 +0100
@@ -561,6 +561,15 @@ int cpu_exec(CPUState *env1)
: /* no outputs */
: "r" (gen_func)
: "r1", "r2", "r3", "r8", "r9", "r10", "r12", "r14");
+#elif defined(TARGET_X86_64) && defined(__i386__)
+ asm volatile ("push %%ebx\n"
+ "push %%esi\n"
+ "push %%edi\n"
+ "call *%0\n"
+ "pop %%edi\n"
+ "pop %%esi\n"
+ "pop %%ebx\n"
+ : : "r" (gen_func) : "ebx", "esi", "edi");
#elif defined(TARGET_I386) && defined(USE_CODE_COPY)
{
if (!(tb->cflags & CF_CODE_COPY)) {
--- qemu-0.7.2/Makefile.target.gcc4-opts 2005-11-11 16:26:33.000000000 +0100
+++ qemu-0.7.2/Makefile.target 2005-11-11 17:59:56.000000000 +0100
@@ -65,6 +65,10 @@ OP_CFLAGS+= -falign-functions=0 -fno-gcs
else
OP_CFLAGS+= -malign-functions=0
endif
+ifeq ($(TARGET_ARCH), x86_64)
+# XXX globally save %ebx, %esi, %edi on entry to generated function
+OP_CFLAGS+= -fcall-used-ebx -fcall-used-esi -fcall-used-edi
+endif
ifdef TARGET_GPROF
USE_I386_LD=y

118
qemu/patches/qemu-0.8.0-gcc4-hacks.patch
View file

@ -1,118 +0,0 @@
2005-10-28 Gwenole Beauchesne <gbeauchesne@mandriva.com>
* Various additional hacks for GCC4.
--- qemu-0.7.2/target-i386/ops_sse.h.gcc4-hacks 2005-09-04 19:11:31.000000000 +0200
+++ qemu-0.7.2/target-i386/ops_sse.h 2005-10-28 10:09:21.000000000 +0200
@@ -34,6 +34,12 @@
#define Q(n) XMM_Q(n)
#define SUFFIX _xmm
#endif
+#if defined(__i386__) && __GNUC__ >= 4
+#define RegCopy(d, s) __builtin_memcpy(&(d), &(s), sizeof(d))
+#endif
+#ifndef RegCopy
+#define RegCopy(d, s) d = s
+#endif
void OPPROTO glue(op_psrlw, SUFFIX)(void)
{
@@ -570,7 +576,7 @@ void OPPROTO glue(op_pshufw, SUFFIX) (vo
r.W(1) = s->W((order >> 2) & 3);
r.W(2) = s->W((order >> 4) & 3);
r.W(3) = s->W((order >> 6) & 3);
- *d = r;
+ RegCopy(*d, r);
}
#else
void OPPROTO op_shufps(void)
--- qemu-0.7.2/target-i386/helper.c.gcc4-hacks 2005-09-04 19:11:31.000000000 +0200
+++ qemu-0.7.2/target-i386/helper.c 2005-10-28 10:09:21.000000000 +0200
@@ -3130,8 +3130,15 @@ void helper_fxrstor(target_ulong ptr, in
nb_xmm_regs = 8 << data64;
addr = ptr + 0xa0;
for(i = 0; i < nb_xmm_regs; i++) {
+#if defined(__i386__) && __GNUC__ >= 4
+ env->xmm_regs[i].XMM_L(0) = ldl(addr);
+ env->xmm_regs[i].XMM_L(1) = ldl(addr + 4);
+ env->xmm_regs[i].XMM_L(2) = ldl(addr + 8);
+ env->xmm_regs[i].XMM_L(3) = ldl(addr + 12);
+#else
env->xmm_regs[i].XMM_Q(0) = ldq(addr);
env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
+#endif
addr += 16;
}
}
--- qemu-0.7.2/cpu-all.h.gcc4-hacks 2005-09-04 19:11:31.000000000 +0200
+++ qemu-0.7.2/cpu-all.h 2005-10-28 10:09:21.000000000 +0200
@@ -339,7 +339,13 @@
static inline void stq_le_p(void *ptr, uint64_t v)
{
+#if defined(__i386__) && __GNUC__ >= 4
+ const union { uint64_t v; uint32_t p[2]; } x = { .v = v };
+ ((uint32_t *)ptr)[0] = x.p[0];
+ ((uint32_t *)ptr)[1] = x.p[1];
+#else
*(uint64_t *)ptr = v;
+#endif
}
/* float access */
--- qemu-0.7.2/softmmu_header.h.gcc4-hacks 2005-10-28 10:08:08.000000000 +0200
+++ qemu-0.7.2/softmmu_header.h 2005-10-28 10:09:21.000000000 +0200
@@ -104,7 +104,7 @@
void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
- (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
+ (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU) && (__GNUC__ < 4)
#define CPU_TLB_ENTRY_BITS 4
@@ -131,7 +131,7 @@ static inline RES_TYPE glue(glue(ld, USU
"m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
"i" (CPU_MEM_INDEX),
"m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
- : "%eax", "%ecx", "%edx", "memory", "cc");
+ : "%eax", "%edx", "memory", "cc");
return res;
}
@@ -178,13 +178,14 @@ static inline int glue(glue(lds, SUFFIX)
"m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
"i" (CPU_MEM_INDEX),
"m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
- : "%eax", "%ecx", "%edx", "memory", "cc");
+ : "%eax", "%edx", "memory", "cc");
return res;
}
#endif
-static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
+static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE val)
{
+ RES_TYPE v = val;
asm volatile ("movl %0, %%edx\n"
"movl %0, %%eax\n"
"shrl %3, %%edx\n"
@@ -236,16 +237,14 @@
"2:\n"
:
: "r" (ptr),
-/* NOTE: 'q' would be needed as constraint, but we could not use it
- with T1 ! */
- "r" (v),
+ "q" (v),
"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
"i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
"m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_write)),
"i" (CPU_MEM_INDEX),
"m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
- : "%eax", "%ecx", "%edx", "memory", "cc");
+ : "%eax", "%edx", "memory", "cc");
}
/* TODO: handle 64-bit access sizes and addresses */

155
qemu/patches/qemu-0.8.0-osx-bugfix.patch
View file

@ -1,155 +0,0 @@
--- qemu-0.8.0/target-i386/helper.c.osx-bugfix 2006-03-17 14:19:42.000000000 +0900
+++ qemu-0.8.0/target-i386/helper.c 2006-03-17 07:27:57.000000000 +0900
@@ -28,68 +28,6 @@ do {\
(raise_exception_err)(a, b);\
} while (0)
#endif
-
-const uint8_t parity_table[256] = {
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
- 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
-};
-
-/* modulo 17 table */
-const uint8_t rclw_table[32] = {
- 0, 1, 2, 3, 4, 5, 6, 7,
- 8, 9,10,11,12,13,14,15,
- 16, 0, 1, 2, 3, 4, 5, 6,
- 7, 8, 9,10,11,12,13,14,
-};
-
-/* modulo 9 table */
-const uint8_t rclb_table[32] = {
- 0, 1, 2, 3, 4, 5, 6, 7,
- 8, 0, 1, 2, 3, 4, 5, 6,
- 7, 8, 0, 1, 2, 3, 4, 5,
- 6, 7, 8, 0, 1, 2, 3, 4,
-};
-
-const CPU86_LDouble f15rk[7] =
-{
- 0.00000000000000000000L,
- 1.00000000000000000000L,
- 3.14159265358979323851L, /*pi*/
- 0.30102999566398119523L, /*lg2*/
- 0.69314718055994530943L, /*ln2*/
- 1.44269504088896340739L, /*l2e*/
- 3.32192809488736234781L, /*l2t*/
-};
/* thread support */
--- qemu-0.8.0/target-i386/op.c.osx-bugfix 2006-03-17 14:20:37.000000000 +0900
+++ qemu-0.8.0/target-i386/op.c 2006-03-17 07:28:40.000000000 +0900
@@ -21,19 +21,69 @@
#define ASM_SOFTMMU
#include "exec.h"
-#if defined(__APPLE__)
-/* XXX avoid indirect symbols, correct address patched at code generation time. */
-static const uint8_t parity_table[256];
-static const uint8_t rclw_table[32];
-static const uint8_t rclb_table[32];
-static const CPU86_LDouble f15rk[7];
-#else
-extern const uint8_t parity_table[256];
-extern const uint8_t rclw_table[32];
-extern const uint8_t rclb_table[32];
-extern const CPU86_LDouble f15rk[7];
-#endif
+const uint8_t parity_table[256] = {
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
+};
+/* modulo 17 table */
+const uint8_t rclw_table[32] = {
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 8, 9,10,11,12,13,14,15,
+ 16, 0, 1, 2, 3, 4, 5, 6,
+ 7, 8, 9,10,11,12,13,14,
+};
+
+/* modulo 9 table */
+const uint8_t rclb_table[32] = {
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 8, 0, 1, 2, 3, 4, 5, 6,
+ 7, 8, 0, 1, 2, 3, 4, 5,
+ 6, 7, 8, 0, 1, 2, 3, 4,
+};
+
+const CPU86_LDouble f15rk[7] =
+{
+ 0.00000000000000000000L,
+ 1.00000000000000000000L,
+ 3.14159265358979323851L, /*pi*/
+ 0.30102999566398119523L, /*lg2*/
+ 0.69314718055994530943L, /*ln2*/
+ 1.44269504088896340739L, /*l2e*/
+ 3.32192809488736234781L, /*l2t*/
+};
+
+
/* n must be a constant to be efficient */
static inline target_long lshift(target_long x, int n)
{

20
qemu/patches/qemu-0.9.0-arm-shift.patch
View file

@ -1,20 +0,0 @@
--- qemu-0.9.0/target-arm/op.c 2007-07-23 06:57:25.000000000 +0200
+++ qemu/target-arm/op.c 2007-07-23 06:58:25.000000000 +0200
@@ -819,7 +819,7 @@
int shift;
shift = PARAM1;
if (shift != 0) {
- env->CF = (T1 >> (32 - shift)) & 1;
+ env->CF = (T0 >> (32 - shift)) & 1;
T0 = T0 << shift;
}
env->NZF = T0;
@@ -832,7 +832,7 @@
shift = PARAM1;
if (shift == 0) {
- env->CF = ((uint32_t)shift) >> 31;
+ env->CF = ((uint32_t)T0) >> 31;
T0 = 0;
} else {
env->CF = (T0 >> (shift - 1)) & 1;

19
qemu/patches/qemu-0.9.0-enforce-16byte-stack-boundary.patch
View file

@ -1,19 +0,0 @@
2007-02-01 Mike kronenberg <mike.kronenberg@kronenberg.org>
* Fix for QEMU 0.9.0.
2006-02-12 Gwenole Beauchesne <gbeauchesne@mandriva.com>
* Enforce 16-byte boundaries.
--- qemu-0.8.0/Makefile.target.enforce-16byte-stack-boundary 2006-02-12 17:46:54.000000000 +0100
+++ qemu-0.8.0/Makefile.target 2006-02-12 17:55:24.000000000 +0100
@@ -67,7 +67,7 @@ endif
ifeq ($(ARCH),i386)
HELPER_CFLAGS+=-fomit-frame-pointer
-OP_CFLAGS+=-mpreferred-stack-boundary=2 -fomit-frame-pointer
+OP_CFLAGS+=-fomit-frame-pointer
ifeq ($(HAVE_GCC3_OPTIONS),yes)
OP_CFLAGS+= -falign-functions=0 -fno-gcse
else

892
qemu/patches/qemu-0.9.0-gcc4.patch
View file

@ -1,892 +0,0 @@
2007-02-01 Mike Kronenberg <mike.kronenberg@kronenberg.org>
* target-ppc/exec.h: Fix for QEMU 0.9.0.
* dyngen-exec.h: Fix for QEMU 0.9.0.
2005-06-02 Gwenole Beauchesne <gbeauchesne@mandriva.com>
* dyngen.c (trace_i386_insn): Fix push/imul case with 8-bit
immediate.
2005-05-11 Paul Brook <paul@codesourcery.com>
* gcc4 host support.
--- qemu-0.7.0/target-ppc/exec.h.gcc4 2005-04-27 22:52:05.000000000 +0200
+++ qemu-0.7.0/target-ppc/exec.h 2005-06-02 21:41:51.000000000 +0200
@@ -33,11 +33,7 @@ #define FT0 (env->ft0)
#define FT1 (env->ft1)
#define FT2 (env->ft2)
-#if defined (DEBUG_OP)
-# define RETURN() __asm__ __volatile__("nop" : : : "memory");
-#else
-# define RETURN() __asm__ __volatile__("" : : : "memory");
-#endif
+#define RETURN() FORCE_RET()
#include "cpu.h"
#include "exec-all.h"
--- qemu-0.7.0/dyngen-exec.h.gcc4 2005-04-27 22:52:05.000000000 +0200
+++ qemu-0.7.0/dyngen-exec.h 2005-06-02 21:41:51.000000000 +0200
@@ -155,7 +155,12 @@ extern int printf(const char *, ...);
#endif
/* force GCC to generate only one epilog at the end of the function */
+#if defined(__i386__) || defined(__x86_64__)
+/* Also add 4 bytes of padding so that we can replace the ret with a jmp. */
+#define FORCE_RET() asm volatile ("nop;nop;nop;nop");
+#else
#define FORCE_RET() __asm__ __volatile__("" : : : "memory");
+#endif
#ifndef OPPROTO
#define OPPROTO
@@ -205,12 +210,19 @@ extern int __op_jmp0, __op_jmp1, __op_jm
#endif
#ifdef __i386__
-#define EXIT_TB() asm volatile ("ret")
-#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)
+/* Dyngen will replace hlt instructions with a ret instruction. Inserting a
+ ret directly would confuse dyngen. */
+#define EXIT_TB() asm volatile ("hlt")
+/* Dyngen will replace cli with 0x9e (jmp).
+ We generate the offset manually. */
+#define GOTO_LABEL_PARAM(n) \
+ asm volatile ("cli;.long " ASM_NAME(__op_gen_label) #n " - 1f;1:")
#endif
#ifdef __x86_64__
-#define EXIT_TB() asm volatile ("ret")
-#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)
+/* The same as i386. */
+#define EXIT_TB() asm volatile ("hlt")
+#define GOTO_LABEL_PARAM(n) \
+ asm volatile ("cli;.long " ASM_NAME(__op_gen_label) #n " - 1f;1:")
#endif
#ifdef __powerpc__
#define EXIT_TB() asm volatile ("blr")
--- qemu-0.7.0/dyngen.c.gcc4 2005-04-27 22:52:05.000000000 +0200
+++ qemu-0.7.0/dyngen.c 2005-06-02 22:25:06.000000000 +0200
@@ -32,6 +32,8 @@
#include "config-host.h"
+//#define DEBUG_OP
+
/* NOTE: we test CONFIG_WIN32 instead of _WIN32 to enabled cross
compilation */
#if defined(CONFIG_WIN32)
@@ -1343,6 +1345,644 @@ int arm_emit_ldr_info(const char *name,
#endif
+#if defined(HOST_I386) || defined(HOST_X86_64)
+
+/* This byte is the first byte of an instruction. */
+#define FLAG_INSN (1 << 0)
+/* This byte has been processed as part of an instruction. */
+#define FLAG_SCANNED (1 << 1)
+/* This instruction is a return instruction. Gcc cometimes generates prefix
+ bytes, so may be more than one byte long. */
+#define FLAG_RET (1 << 2)
+/* This is either the target of a jump, or the preceeding instruction uses
+ a pc-relative offset. */
+#define FLAG_TARGET (1 << 3)
+/* This is a magic instruction that needs fixing up. */
+#define FLAG_EXIT (1 << 4)
+#define MAX_EXITS 5
+
+static void
+bad_opcode(const char *name, uint32_t op)
+{
+ error("Unsupported opcode %0*x in %s", (op > 0xff) ? 4 : 2, op, name);
+}
+
+/* Mark len bytes as scanned, Returns insn_size + len. Reports an error
+ if these bytes have already been scanned. */
+static int
+eat_bytes(const char *name, char *flags, int insn, int insn_size, int len)
+{
+ while (len > 0) {
+ /* This should never occur in sane code. */
+ if (flags[insn + insn_size] & FLAG_SCANNED)
+ error ("Overlapping instructions in %s", name);
+ flags[insn + insn_size] |= FLAG_SCANNED;
+ insn_size++;
+ len--;
+ }
+ return insn_size;
+}
+
+static void
+trace_i386_insn (const char *name, uint8_t *start_p, char *flags, int insn,
+ int len)
+{
+ uint8_t *ptr;
+ uint8_t op;
+ int modrm;
+ int is_prefix;
+ int op_size;
+ int addr_size;
+ int insn_size;
+ int is_ret;
+ int is_condjmp;
+ int is_jmp;
+ int is_exit;
+ int is_pcrel;
+ int immed;
+ int seen_rexw;
+ int32_t disp;
+
+ ptr = start_p + insn;
+ /* nonzero if this insn has a ModR/M byte. */
+ modrm = 1;
+ /* The size of the immediate value in this instruction. */
+ immed = 0;
+ /* The operand size. */
+ op_size = 4;
+ /* The address size */
+ addr_size = 4;
+ /* The total length of this instruction. */
+ insn_size = 0;
+ is_prefix = 1;
+ is_ret = 0;
+ is_condjmp = 0;
+ is_jmp = 0;
+ is_exit = 0;
+ seen_rexw = 0;
+ is_pcrel = 0;
+
+ while (is_prefix) {
+ op = ptr[insn_size];
+ insn_size = eat_bytes(name, flags, insn, insn_size, 1);
+ is_prefix = 0;
+ switch (op >> 4) {
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ if (op == 0x0f) {
+ /* two-byte opcode. */
+ op = ptr[insn_size];
+ insn_size = eat_bytes(name, flags, insn, insn_size, 1);
+ switch (op >> 4) {
+ case 0:
+ if ((op & 0xf) > 3)
+ modrm = 0;
+ break;
+ case 1: /* vector move or prefetch */
+ case 2: /* various moves and vector compares. */
+ case 4: /* cmov */
+ case 5: /* vector instructions */
+ case 6:
+ case 13:
+ case 14:
+ case 15:
+ break;
+ case 7: /* mmx */
+ if (op & 0x77) /* emms */
+ modrm = 0;
+ break;
+ case 3: /* wrmsr, rdtsc, rdmsr, rdpmc, sysenter, sysexit */
+ modrm = 0;
+ break;
+ case 8: /* long conditional jump */
+ is_condjmp = 1;
+ immed = op_size;
+ modrm = 0;
+ break;
+ case 9: /* setcc */
+ break;
+ case 10:
+ switch (op & 0x7) {
+ case 0: /* push fs/gs */
+ case 1: /* pop fs/gs */
+ case 2: /* cpuid/rsm */
+ modrm = 0;
+ break;
+ case 4: /* shld/shrd immediate */
+ immed = 1;
+ break;
+ default: /* Normal instructions with a ModR/M byte. */
+ break;
+ }
+ break;
+ case 11:
+ switch (op & 0xf) {
+ case 10: /* bt, bts, btr, btc */
+ immed = 1;
+ break;
+ default:
+ /* cmpxchg, lss, btr, lfs, lgs, movzx, btc, bsf, bsr
+ undefined, and movsx */
+ break;
+ }
+ break;
+ case 12:
+ if (op & 8) {
+ /* bswap */
+ modrm = 0;
+ } else {
+ switch (op & 0x7) {
+ case 2:
+ case 4:
+ case 5:
+ case 6:
+ immed = 1;
+ break;
+ default:
+ break;
+ }
+ }
+ break;
+ }
+ } else if ((op & 0x07) <= 0x3) {
+ /* General arithmentic ax. */
+ } else if ((op & 0x07) <= 0x5) {
+ /* General arithmetic ax, immediate. */
+ if (op & 0x01)
+ immed = op_size;
+ else
+ immed = 1;
+ modrm = 0;
+ } else if ((op & 0x23) == 0x22) {
+ /* Segment prefix. */
+ is_prefix = 1;
+ } else {
+ /* Segment register push/pop or DAA/AAA/DAS/AAS. */
+ modrm = 0;
+ }
+ break;
+
+#if defined(HOST_X86_64)
+ case 4: /* rex prefix. */
+ is_prefix = 1;
+ /* The address/operand size is actually 64-bit, but the immediate
+ values in the instruction are still 32-bit. */
+ op_size = 4;
+ addr_size = 4;
+ if (op & 8)
+ seen_rexw = 1;
+ break;
+#else
+ case 4: /* inc/dec register. */
+#endif
+ case 5: /* push/pop general register. */
+ modrm = 0;
+ break;
+
+ case 6:
+ switch (op & 0x0f) {
+ case 0: /* pusha */
+ case 1: /* popa */
+ modrm = 0;
+ break;
+ case 2: /* bound */
+ case 3: /* arpl */
+ break;
+ case 4: /* FS */
+ case 5: /* GS */
+ is_prefix = 1;
+ break;
+ case 6: /* opcode size prefix. */
+ op_size = 2;
+ is_prefix = 1;
+ break;
+ case 7: /* Address size prefix. */
+ addr_size = 2;
+ is_prefix = 1;
+ break;
+ case 8: /* push immediate */
+ immed = op_size;
+ modrm = 0;
+ break;
+ case 10: /* push 8-bit immediate */
+ immed = 1;
+ modrm = 0;
+ break;
+ case 9: /* imul immediate */
+ immed = op_size;
+ break;
+ case 11: /* imul 8-bit immediate */
+ immed = 1;
+ break;
+ case 12: /* insb */
+ case 13: /* insw */
+ case 14: /* outsb */
+ case 15: /* outsw */
+ modrm = 0;
+ break;
+ }
+ break;
+
+ case 7: /* Short conditional jump. */
+ is_condjmp = 1;
+ immed = 1;
+ modrm = 0;
+ break;
+
+ case 8:
+ if ((op & 0xf) <= 3) {
+ /* arithmetic immediate. */
+ if ((op & 3) == 1)
+ immed = op_size;
+ else
+ immed = 1;
+ }
+ /* else test, xchg, mov, lea or pop general. */
+ break;
+
+ case 9:
+ /* Various single-byte opcodes with no modrm byte. */
+ modrm = 0;
+ if (op == 10) {
+ /* Call */
+ immed = 4;
+ }
+ break;
+
+ case 10:
+ switch ((op & 0xe) >> 1) {
+ case 0: /* mov absoliute immediate. */
+ case 1:
+ if (seen_rexw)
+ immed = 8;
+ else
+ immed = addr_size;
+ break;
+ case 4: /* test immediate. */
+ if (op & 1)
+ immed = op_size;
+ else
+ immed = 1;
+ break;
+ default: /* Various string ops. */
+ break;
+ }
+ modrm = 0;
+ break;
+
+ case 11: /* move immediate to register */
+ if (op & 8) {
+ if (seen_rexw)
+ immed = 8;
+ else
+ immed = op_size;
+ } else {
+ immed = 1;
+ }
+ modrm = 0;
+ break;
+
+ case 12:
+ switch (op & 0xf) {
+ case 0: /* shift immediate */
+ case 1:
+ immed = 1;
+ break;
+ case 2: /* ret immediate */
+ immed = 2;
+ modrm = 0;
+ bad_opcode(name, op);
+ break;
+ case 3: /* ret */
+ modrm = 0;
+ is_ret = 1;
+ case 4: /* les */
+ case 5: /* lds */
+ break;
+ case 6: /* mov immediate byte */
+ immed = 1;
+ break;
+ case 7: /* mov immediate */
+ immed = op_size;
+ break;
+ case 8: /* enter */
+ /* TODO: Is this right? */
+ immed = 3;
+ modrm = 0;
+ break;
+ case 10: /* retf immediate */
+ immed = 2;
+ modrm = 0;
+ bad_opcode(name, op);
+ break;
+ case 13: /* int */
+ immed = 1;
+ modrm = 0;
+ break;
+ case 11: /* retf */
+ case 15: /* iret */
+ modrm = 0;
+ bad_opcode(name, op);
+ break;
+ default: /* leave, int3 or into */
+ modrm = 0;
+ break;
+ }
+ break;
+
+ case 13:
+ if ((op & 0xf) >= 8) {
+ /* Coprocessor escape. For our purposes this is just a normal
+ instruction with a ModR/M byte. */
+ } else if ((op & 0xf) >= 4) {
+ /* AAM, AAD or XLAT */
+ modrm = 0;
+ }
+ /* else shift instruction */
+ break;
+
+ case 14:
+ switch ((op & 0xc) >> 2) {
+ case 0: /* loop or jcxz */
+ is_condjmp = 1;
+ immed = 1;
+ break;
+ case 1: /* in/out immed */
+ immed = 1;
+ break;
+ case 2: /* call or jmp */
+ switch (op & 3) {
+ case 0: /* call */
+ immed = op_size;
+ break;
+ case 1: /* long jump */
+ immed = 4;
+ is_jmp = 1;
+ break;
+ case 2: /* far jmp */
+ bad_opcode(name, op);
+ break;
+ case 3: /* short jmp */
+ immed = 1;
+ is_jmp = 1;
+ break;
+ }
+ break;
+ case 3: /* in/out register */
+ break;
+ }
+ modrm = 0;
+ break;
+
+ case 15:
+ switch ((op & 0xe) >> 1) {
+ case 0:
+ case 1:
+ is_prefix = 1;
+ break;
+ case 2:
+ case 4:
+ case 5:
+ case 6:
+ modrm = 0;
+ /* Some privileged insns are used as markers. */
+ switch (op) {
+ case 0xf4: /* hlt: Exit translation block. */
+ is_exit = 1;
+ break;
+ case 0xfa: /* cli: Jump to label. */
+ is_exit = 1;
+ immed = 4;
+ break;
+ case 0xfb: /* sti: TB patch jump. */
+ /* Mark the insn for patching, but continue sscanning. */
+ flags[insn] |= FLAG_EXIT;
+ immed = 4;
+ break;
+ }
+ break;
+ case 3: /* unary grp3 */
+ if ((ptr[insn_size] & 0x38) == 0) {
+ if (op == 0xf7)
+ immed = op_size;
+ else
+ immed = 1; /* test immediate */
+ }
+ break;
+ case 7: /* inc/dec grp4/5 */
+ /* TODO: This includes indirect jumps. We should fail if we
+ encounter one of these. */
+ break;
+ }
+ break;
+ }
+ }
+
+ if (modrm) {
+ if (addr_size != 4)
+ error("16-bit addressing mode used in %s", name);
+
+ disp = 0;
+ modrm = ptr[insn_size];
+ insn_size = eat_bytes(name, flags, insn, insn_size, 1);
+ modrm &= 0xc7;
+ switch ((modrm & 0xc0) >> 6) {
+ case 0:
+ if (modrm == 5)
+ disp = 4;
+ break;
+ case 1:
+ disp = 1;
+ break;
+ case 2:
+ disp = 4;
+ break;
+ }
+ if ((modrm & 0xc0) != 0xc0 && (modrm & 0x7) == 4) {
+ /* SIB byte */
+ if (modrm == 4 && (ptr[insn_size] & 0x7) == 5) {
+ disp = 4;
+ is_pcrel = 1;
+ }
+ insn_size = eat_bytes(name, flags, insn, insn_size, 1);
+ }
+ insn_size = eat_bytes(name, flags, insn, insn_size, disp);
+ }
+ insn_size = eat_bytes(name, flags, insn, insn_size, immed);
+ if (is_condjmp || is_jmp) {
+ if (immed == 1) {
+ disp = (int8_t)*(ptr + insn_size - 1);
+ } else {
+ disp = (((int32_t)*(ptr + insn_size - 1)) << 24)
+ | (((int32_t)*(ptr + insn_size - 2)) << 16)
+ | (((int32_t)*(ptr + insn_size - 3)) << 8)
+ | *(ptr + insn_size - 4);
+ }
+ disp += insn_size;
+ /* Jumps to external symbols point to the address of the offset
+ before relocation. */
+ /* ??? These are probably a tailcall. We could fix them up by
+ replacing them with jmp to EOB + call, but it's easier to just
+ prevent the compiler generating them. */
+ if (disp == 1)
+ error("Unconditional jump (sibcall?) in %s", name);
+ disp += insn;
+ if (disp < 0 || disp > len)
+ error("Jump outside instruction in %s", name);
+
+ if ((flags[disp] & (FLAG_INSN | FLAG_SCANNED)) == FLAG_SCANNED)
+ error("Overlapping instructions in %s", name);
+
+ flags[disp] |= (FLAG_INSN | FLAG_TARGET);
+ is_pcrel = 1;
+ }
+ if (is_pcrel) {
+ /* Mark the following insn as a jump target. This will stop
+ this instruction being moved. */
+ flags[insn + insn_size] |= FLAG_TARGET;
+ }
+ if (is_ret)
+ flags[insn] |= FLAG_RET;
+
+ if (is_exit)
+ flags[insn] |= FLAG_EXIT;
+
+ if (!(is_jmp || is_ret || is_exit))
+ flags[insn + insn_size] |= FLAG_INSN;
+}
+
+/* Scan a function body. Returns the position of the return sequence.
+ Sets *patch_bytes to the number of bytes that need to be copied from that
+ location. If no patching is required (ie. the return is the last insn)
+ *patch_bytes will be set to -1. *plen is the number of code bytes to copy.
+ */
+static int trace_i386_op(const char * name, uint8_t *start_p, int *plen,
+ int *patch_bytes, int *exit_addrs)
+{
+ char *flags;
+ int more;
+ int insn;
+ int retpos;
+ int bytes;
+ int num_exits;
+ int len;
+ int last_insn;
+
+ len = *plen;
+ flags = malloc(len + 1);
+ memset(flags, 0, len + 1);
+ flags[0] |= FLAG_INSN;
+ more = 1;
+ while (more) {
+ more = 0;
+ for (insn = 0; insn < len; insn++) {
+ if ((flags[insn] & (FLAG_INSN | FLAG_SCANNED)) == FLAG_INSN) {
+ trace_i386_insn(name, start_p, flags, insn, len);
+ more = 1;
+ }
+ }
+ }
+
+ /* Strip any unused code at the end of the function. */
+ while (len > 0 && flags[len - 1] == 0)
+ len--;
+
+ retpos = -1;
+ num_exits = 0;
+ last_insn = 0;
+ for (insn = 0; insn < len; insn++) {
+ if (flags[insn] & FLAG_RET) {
+ /* ??? In theory it should be possible to handle multiple return
+ points. In practice it's not worth the effort. */
+ if (retpos != -1)
+ error("Multiple return instructions in %s", name);
+ retpos = insn;
+ }
+ if (flags[insn] & FLAG_EXIT) {
+ if (num_exits == MAX_EXITS)
+ error("Too many block exits in %s", name);
+ exit_addrs[num_exits] = insn;
+ num_exits++;
+ }
+ if (flags[insn] & FLAG_INSN)
+ last_insn = insn;
+ }
+
+ exit_addrs[num_exits] = -1;
+ if (retpos == -1) {
+ if (num_exits == 0) {
+ error ("No return instruction found in %s", name);
+ } else {
+ retpos = len;
+ last_insn = len;
+ }
+ }
+
+ /* If the return instruction is the last instruction we can just
+ remove it. */
+ if (retpos == last_insn)
+ *patch_bytes = -1;
+ else
+ *patch_bytes = 0;
+
+ /* Back up over any nop instructions. */
+ while (retpos > 0
+ && (flags[retpos] & FLAG_TARGET) == 0
+ && (flags[retpos - 1] & FLAG_INSN) != 0
+ && start_p[retpos - 1] == 0x90) {
+ retpos--;
+ }
+
+ if (*patch_bytes == -1) {
+ *plen = retpos;
+ free (flags);
+ return retpos;
+ }
+ *plen = len;
+
+ /* The ret is in the middle of the function. Find four more bytes that
+ so the ret can be replaced by a jmp. */
+ /* ??? Use a short jump where possible. */
+ bytes = 4;
+ insn = retpos + 1;
+ /* We can clobber everything up to the next jump target. */
+ while (insn < len && bytes > 0 && (flags[insn] & FLAG_TARGET) == 0) {
+ insn++;
+ bytes--;
+ }
+ if (bytes > 0) {
+ /* ???: Strip out nop blocks. */
+ /* We can't do the replacement without clobbering anything important.
+ Copy preceeding instructions(s) to give us some space. */
+ while (retpos > 0) {
+ /* If this byte is the target of a jmp we can't move it. */
+ if (flags[retpos] & FLAG_TARGET)
+ break;
+
+ (*patch_bytes)++;
+ bytes--;
+ retpos--;
+
+ /* Break out of the loop if we have enough space and this is either
+ the first byte of an instruction or a pad byte. */
+ if ((flags[retpos] & (FLAG_INSN | FLAG_SCANNED)) != FLAG_SCANNED
+ && bytes <= 0) {
+ break;
+ }
+ }
+ }
+
+ if (bytes > 0)
+ error("Unable to replace ret with jmp in %s\n", name);
+
+ free(flags);
+ return retpos;
+}
+
+#endif
+
#define MAX_ARGS 3
/* generate op code */
@@ -1356,6 +1996,11 @@ void gen_code(const char *name, host_ulo
uint8_t args_present[MAX_ARGS];
const char *sym_name, *p;
EXE_RELOC *rel;
+#if defined(HOST_I386) || defined(HOST_X86_64)
+ int patch_bytes;
+ int retpos;
+ int exit_addrs[MAX_EXITS];
+#endif
/* Compute exact size excluding prologue and epilogue instructions.
* Increment start_offset to skip epilogue instructions, then compute
@@ -1366,33 +2011,12 @@ void gen_code(const char *name, host_ulo
p_end = p_start + size;
start_offset = offset;
#if defined(HOST_I386) || defined(HOST_X86_64)
-#ifdef CONFIG_FORMAT_COFF
- {
- uint8_t *p;
- p = p_end - 1;
- if (p == p_start)
- error("empty code for %s", name);
- while (*p != 0xc3) {
- p--;
- if (p <= p_start)
- error("ret or jmp expected at the end of %s", name);
- }
- copy_size = p - p_start;
- }
-#else
{
int len;
len = p_end - p_start;
- if (len == 0)
- error("empty code for %s", name);
- if (p_end[-1] == 0xc3) {
- len--;
- } else {
- error("ret or jmp expected at the end of %s", name);
- }
+ retpos = trace_i386_op(name, p_start, &len, &patch_bytes, exit_addrs);
copy_size = len;
}
-#endif
#elif defined(HOST_PPC)
{
uint8_t *p;
@@ -1559,6 +2183,13 @@ void gen_code(const char *name, host_ulo
}
if (gen_switch == 2) {
+#if defined(HOST_I386) || defined(HOST_X86_64)
+ if (patch_bytes != -1)
+ copy_size += patch_bytes;
+#ifdef DEBUG_OP
+ copy_size += 2;
+#endif
+#endif
fprintf(outfile, "DEF(%s, %d, %d)\n", name + 3, nb_args, copy_size);
} else if (gen_switch == 1) {
@@ -1761,7 +2392,43 @@ void gen_code(const char *name, host_ulo
#error unsupport object format
#endif
}
+ }
+ /* Replace the marker instructions with the actual opcodes. */
+ for (i = 0; exit_addrs[i] != -1; i++) {
+ int op;
+ switch (p_start[exit_addrs[i]])
+ {
+ case 0xf4: op = 0xc3; break; /* hlt -> ret */
+ case 0xfa: op = 0xe9; break; /* cli -> jmp */
+ case 0xfb: op = 0xe9; break; /* sti -> jmp */
+ default: error("Internal error");
+ }
+ fprintf(outfile,
+ " *(uint8_t *)(gen_code_ptr + %d) = 0x%x;\n",
+ exit_addrs[i], op);
}
+ /* Fix up the return instruction. */
+ if (patch_bytes != -1) {
+ if (patch_bytes) {
+ fprintf(outfile, " memcpy(gen_code_ptr + %d,"
+ "gen_code_ptr + %d, %d);\n",
+ copy_size, retpos, patch_bytes);
+ }
+ fprintf(outfile,
+ " *(uint8_t *)(gen_code_ptr + %d) = 0xe9;\n",
+ retpos);
+ fprintf(outfile,
+ " *(uint32_t *)(gen_code_ptr + %d) = 0x%x;\n",
+ retpos + 1, copy_size - (retpos + 5));
+
+ copy_size += patch_bytes;
+ }
+#ifdef DEBUG_OP
+ fprintf(outfile,
+ " *(uint16_t *)(gen_code_ptr + %d) = 0x9090;\n",
+ copy_size);
+ copy_size += 2;
+#endif
}
#elif defined(HOST_X86_64)
{
@@ -1793,6 +2460,42 @@ void gen_code(const char *name, host_ulo
}
}
}
+ /* Replace the marker instructions with the actual opcodes. */
+ for (i = 0; exit_addrs[i] != -1; i++) {
+ int op;
+ switch (p_start[exit_addrs[i]])
+ {
+ case 0xf4: op = 0xc3; break; /* hlt -> ret */
+ case 0xfa: op = 0xe9; break; /* cli -> jmp */
+ case 0xfb: op = 0xe9; break; /* sti -> jmp */
+ default: error("Internal error");
+ }
+ fprintf(outfile,
+ " *(uint8_t *)(gen_code_ptr + %d) = 0x%x;\n",
+ exit_addrs[i], op);
+ }
+ /* Fix up the return instruction. */
+ if (patch_bytes != -1) {
+ if (patch_bytes) {
+ fprintf(outfile, " memcpy(gen_code_ptr + %d,"
+ "gen_code_ptr + %d, %d);\n",
+ copy_size, retpos, patch_bytes);
+ }
+ fprintf(outfile,
+ " *(uint8_t *)(gen_code_ptr + %d) = 0xe9;\n",
+ retpos);
+ fprintf(outfile,
+ " *(uint32_t *)(gen_code_ptr + %d) = 0x%x;\n",
+ retpos + 1, copy_size - (retpos + 5));
+
+ copy_size += patch_bytes;
+ }
+#ifdef DEBUG_OP
+ fprintf(outfile,
+ " *(uint16_t *)(gen_code_ptr + %d) = 0x9090;\n",
+ copy_size);
+ copy_size += 2;
+#endif
}
#elif defined(HOST_PPC)
{
--- qemu-0.7.0/exec-all.h.gcc4 2005-04-27 22:52:05.000000000 +0200
+++ qemu-0.7.0/exec-all.h 2005-06-02 21:41:51.000000000 +0200
@@ -335,14 +335,15 @@ do {\
#elif defined(__i386__) && defined(USE_DIRECT_JUMP)
-/* we patch the jump instruction directly */
+/* we patch the jump instruction directly. Use sti in place of the actual
+ jmp instruction so that dyngen can patch in the correct result. */
#define GOTO_TB(opname, tbparam, n)\
do {\
asm volatile (".section .data\n"\
ASM_OP_LABEL_NAME(n, opname) ":\n"\
".long 1f\n"\
ASM_PREVIOUS_SECTION \
- "jmp " ASM_NAME(__op_jmp) #n "\n"\
+ "sti;.long " ASM_NAME(__op_jmp) #n " - 1f\n"\
"1:\n");\
} while (0)

26
qemu/patches/qemu-0.9.0-i386-FORCE_RET.patch
View file

@ -1,26 +0,0 @@
2007-02-01 Mike Kronenberg <mike.kronenberg@kronenberg.org>
* Fix for QEMU 0.9.0.
2006-06-12 Gwenole Beauchesne <gbeauchesne@mandriva.com>
* Try to enforce one exit point per synthetic opcode (gcc4).
--- qemu-0.8.0/target-i386/op.c.i386-FORCE_RET 2005-12-19 23:51:53.000000000 +0100
+++ qemu-0.8.0/target-i386/op.c 2006-02-12 17:51:40.000000000 +0100
@@ -1032,6 +1032,7 @@ void OPPROTO op_aaa(void)
}
EAX = (EAX & ~0xffff) | al | (ah << 8);
CC_SRC = eflags;
+ FORCE_RET();
}
void OPPROTO op_aas(void)
@@ -1056,6 +1057,7 @@ void OPPROTO op_aas(void)
}
EAX = (EAX & ~0xffff) | al | (ah << 8);
CC_SRC = eflags;
+ FORCE_RET();
}
/* segment handling */

329
qemu/patches/qemu-0.9.0-osx-intel-port.patch
View file

@ -1,329 +0,0 @@
2007-02-01 Mike Kronenberg <mike.kronenberg@kronenberg.org>
* Fix for QEMU 0.9.0.
2006-02-12 Gwenole Beauchesne <gb.public@free.fr>
* Port to MacOS X for Intel.
TODO:
- try test-i386
- use 80-bit long double?
--- qemu-0.8.0/target-i386/exec.h.osx-intel-port 2005-12-19 23:51:53.000000000 +0100
+++ qemu-0.8.0/target-i386/exec.h 2006-02-13 07:20:25.000000000 +0100
@@ -457,8 +457,6 @@ static inline void helper_fstt(CPU86_LDo
#define FPUC_EM 0x3f
-extern const CPU86_LDouble f15rk[7];
-
void helper_fldt_ST0_A0(void);
void helper_fstt_ST0_A0(void);
void fpu_raise_exception(void);
@@ -492,10 +490,6 @@ float approx_rsqrt(float a);
float approx_rcp(float a);
void update_fp_status(void);
-extern const uint8_t parity_table[256];
-extern const uint8_t rclw_table[32];
-extern const uint8_t rclb_table[32];
-
static inline uint32_t compute_eflags(void)
{
return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
--- qemu-0.8.0/target-i386/op.c.osx-intel-port 2006-02-13 01:25:58.000000000 +0100
+++ qemu-0.8.0/target-i386/op.c 2006-02-13 07:20:25.000000000 +0100
@@ -21,6 +21,19 @@
#define ASM_SOFTMMU
#include "exec.h"
+#if defined(__APPLE__)
+/* XXX avoid indirect symbols, correct address patched at code generation time. */
+static const uint8_t parity_table[256];
+static const uint8_t rclw_table[32];
+static const uint8_t rclb_table[32];
+static const CPU86_LDouble f15rk[7];
+#else
+extern const uint8_t parity_table[256];
+extern const uint8_t rclw_table[32];
+extern const uint8_t rclb_table[32];
+extern const CPU86_LDouble f15rk[7];
+#endif
+
/* n must be a constant to be efficient */
static inline target_long lshift(target_long x, int n)
{
--- qemu-0.8.0/Makefile.target.osx-intel-port 2006-02-13 01:25:58.000000000 +0100
+++ qemu-0.8.0/Makefile.target 2006-02-13 01:25:58.000000000 +0100
@@ -18,6 +18,9 @@ CPPFLAGS+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH)
endif
BASE_CFLAGS=
BASE_LDFLAGS=
+ifeq ($(CONFIG_DARWIN),yes)
+CFLAGS+=-mdynamic-no-pic
+endif
#CFLAGS+=-Werror
LDFLAGS=-g
LIBS=
--- qemu-0.8.0/dyngen.c.osx-intel-port 2006-02-13 01:25:58.000000000 +0100
+++ qemu-0.8.0/dyngen.c 2006-02-13 01:25:58.000000000 +0100
@@ -183,6 +183,20 @@ typedef struct coff_rel {
#include <mach-o/reloc.h>
#include <mach-o/ppc/reloc.h>
+#ifdef HOST_PPC
+
+#define MACH_CPU_TYPE CPU_TYPE_POWERPC
+#define mach_check_cputype(x) ((x) == CPU_TYPE_POWERPC)
+
+#elif defined(HOST_I386)
+
+#define MACH_CPU_TYPE CPU_TYPE_I386
+#define mach_check_cputype(x) ((x) == CPU_TYPE_I386)
+
+#else
+#error unsupported CPU - please update the code
+#endif
+
# define check_mach_header(x) (x.magic == MH_MAGIC)
typedef int32_t host_long;
typedef uint32_t host_ulong;
@@ -981,22 +995,23 @@ static const char * find_reloc_name_in_s
{
unsigned int tocindex, symindex, size;
const char *name = 0;
+ int section_type;
/* Sanity check */
if(!( address >= sec_hdr->addr && address < (sec_hdr->addr + sec_hdr->size) ) )
return (char*)0;
-
- if( sec_hdr->flags & S_SYMBOL_STUBS ){
+
+ section_type = sec_hdr->flags & SECTION_TYPE;
+ if( section_type == S_SYMBOL_STUBS ){
size = sec_hdr->reserved2;
if(size == 0)
error("size = 0");
-
}
- else if( sec_hdr->flags & S_LAZY_SYMBOL_POINTERS ||
- sec_hdr->flags & S_NON_LAZY_SYMBOL_POINTERS)
+ else if( section_type == S_LAZY_SYMBOL_POINTERS ||
+ section_type == S_NON_LAZY_SYMBOL_POINTERS)
size = sizeof(unsigned long);
else
- return 0;
+ return NULL;
/* Compute our index in toc */
tocindex = (address - sec_hdr->addr)/size;
@@ -1030,8 +1045,27 @@ static const char * get_reloc_name(EXE_R
/* init the slide value */
*sslide = 0;
- if(R_SCATTERED & rel->r_address)
- return (char *)find_reloc_name_given_its_address(sca_rel->r_value);
+ if (R_SCATTERED & rel->r_address) {
+ char *name = (char *)find_reloc_name_given_its_address(sca_rel->r_value);
+
+ /* search it in the full symbol list, if not found */
+ if (!name) {
+ int i;
+ for (i = 0; i < nb_syms; i++) {
+ EXE_SYM *sym = &symtab[i];
+ if (sym->st_value == sca_rel->r_value) {
+ name = get_sym_name(sym);
+ switch (sca_rel->r_type) {
+ case GENERIC_RELOC_VANILLA:
+ *sslide = *(uint32_t *)(text + sca_rel->r_address) - sca_rel->r_value;
+ break;
+ }
+ break;
+ }
+ }
+ }
+ return name;
+ }
if(rel->r_extern)
{
@@ -1063,14 +1097,21 @@ static const char * get_reloc_name(EXE_R
sectoffset = ( *(uint32_t *)(text + rel->r_address) & 0x03fffffc );
if (sectoffset & 0x02000000) sectoffset |= 0xfc000000;
break;
+ case GENERIC_RELOC_VANILLA:
+ sectoffset = *(uint32_t *)(text + rel->r_address);
+ break;
default:
- error("switch(rel->type) not found");
+ error("switch(rel->type=%d) not found", rel->r_type);
}
- if(rel->r_pcrel)
+ if(rel->r_pcrel) {
sectoffset += rel->r_address;
-
- if (rel->r_type == PPC_RELOC_BR24)
+#ifdef HOST_I386
+ sectoffset += (1 << rel->r_length);
+#endif
+ }
+
+ if (rel->r_type == PPC_RELOC_BR24 || rel->r_pcrel)
name = (char *)find_reloc_name_in_sec_ptr((int)sectoffset, &section_hdr[sectnum-1]);
/* search it in the full symbol list, if not found */
@@ -1122,7 +1163,7 @@ int load_object(const char *filename)
error("bad Mach header");
}
- if (mach_hdr.cputype != CPU_TYPE_POWERPC)
+ if (!mach_check_cputype(mach_hdr.cputype))
error("Unsupported CPU");
if (mach_hdr.filetype != MH_OBJECT)
@@ -2413,6 +2454,82 @@ void gen_code(const char *name, host_ulo
/* patch relocations */
#if defined(HOST_I386)
{
+#ifdef CONFIG_FORMAT_MACH
+ struct scattered_relocation_info *scarel;
+ struct relocation_info * rel;
+ char final_sym_name[256];
+ const char *sym_name;
+ const char *p;
+ int slide, sslide;
+ int i;
+
+ for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) {
+ unsigned int offset, length, value = 0;
+ unsigned int type, pcrel, isym = 0;
+ unsigned int usesym = 0;
+
+ if (R_SCATTERED & rel->r_address) {
+ scarel = (struct scattered_relocation_info*)rel;
+ offset = (unsigned int)scarel->r_address;
+ length = scarel->r_length;
+ pcrel = scarel->r_pcrel;
+ type = scarel->r_type;
+ value = scarel->r_value;
+ }
+ else {
+ value = isym = rel->r_symbolnum;
+ usesym = (rel->r_extern);
+ offset = rel->r_address;
+ length = rel->r_length;
+ pcrel = rel->r_pcrel;
+ type = rel->r_type;
+ }
+
+ slide = offset - start_offset;
+
+ if (!(offset >= start_offset && offset < start_offset + size))
+ continue; /* not in our range */
+
+ sym_name = get_reloc_name(rel, &sslide);
+
+ if (usesym && symtab[isym].n_type & N_STAB)
+ continue; /* don't handle STAB (debug sym) */
+
+ if (sym_name && strstart(sym_name, "__op_jmp", &p)) {
+ int n;
+ n = strtol(p, NULL, 10);
+ fprintf(outfile, " jmp_offsets[%d] = %d + (gen_code_ptr - gen_code_buf);\n", n, slide);
+ continue; /* Nothing more to do */
+ }
+
+ if (!sym_name) {
+ fprintf(outfile, "/* #warning relocation not handled in %s (value 0x%x, %s, offset 0x%x, length 0x%x, %s, type 0x%x) */\n",
+ name, value, usesym ? "use sym" : "don't use sym", offset, length, pcrel ? "pcrel":"", type);
+ continue; /* dunno how to handle without final_sym_name */
+ }
+
+ get_reloc_expr(final_sym_name, sizeof(final_sym_name),
+ sym_name);
+
+ if (length != 2)
+ error("unsupported %d-bit relocation", 8 * (1 << length));
+
+ switch (type) {
+ case GENERIC_RELOC_VANILLA:
+ if (pcrel || strstart(sym_name,"__op_gen_label",&p)) {
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s - (long)(gen_code_ptr + %d) - 4;\n",
+ slide, final_sym_name, slide);
+ }
+ else {
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = (%s + %d);\n",
+ slide, final_sym_name, sslide);
+ }
+ break;
+ default:
+ error("unsupported i386 relocation (%d)", type);
+ }
+ }
+#else
char name[256];
int type;
int addend;
@@ -2482,6 +2599,7 @@ void gen_code(const char *name, host_ulo
#endif
}
}
+#endif
/* Replace the marker instructions with the actual opcodes. */
for (i = 0; exit_addrs[i] != -1; i++) {
int op;
--- qemu-0.8.0/dyngen-exec.h.osx-intel-port 2006-02-13 01:25:58.000000000 +0100
+++ qemu-0.8.0/dyngen-exec.h 2006-02-13 01:25:58.000000000 +0100
@@ -215,9 +215,16 @@ extern int __op_jmp0, __op_jmp1, __op_jm
#define EXIT_TB() asm volatile ("hlt")
/* Dyngen will replace cli with 0x9e (jmp).
We generate the offset manually. */
+#if defined(__APPLE__)
+/* XXX Different relocations are generated for MacOS X for Intel
+ (please as from cctools). */
+#define GOTO_LABEL_PARAM(n) \
+ asm volatile ("cli;.long " ASM_NAME(__op_gen_label) #n)
+#else
#define GOTO_LABEL_PARAM(n) \
asm volatile ("cli;.long " ASM_NAME(__op_gen_label) #n " - 1f;1:")
#endif
+#endif
#ifdef __x86_64__
/* The same as i386. */
#define EXIT_TB() asm volatile ("hlt")
--- qemu-0.8.0/exec-all.h.osx-intel-port 2006-02-13 01:25:58.000000000 +0100
+++ qemu-0.8.0/exec-all.h 2006-02-13 01:25:58.000000000 +0100
@@ -321,15 +321,29 @@ do {\
/* we patch the jump instruction directly. Use sti in place of the actual
jmp instruction so that dyngen can patch in the correct result. */
+#if defined(__APPLE__)
+/* XXX Different relocations are generated for MacOS X for Intel
+ (please as from cctools). */
#define GOTO_TB(opname, tbparam, n)\
do {\
- asm volatile (".section .data\n"\
+ asm volatile (ASM_DATA_SECTION\
+ ASM_OP_LABEL_NAME(n, opname) ":\n"\
+ ".long 1f\n"\
+ ASM_PREVIOUS_SECTION \
+ "sti;.long " ASM_NAME(__op_jmp) #n "\n"\
+ "1:\n");\
+} while (0)
+#else
+#define GOTO_TB(opname, tbparam, n)\
+do {\
+ asm volatile (ASM_DATA_SECTION\
ASM_OP_LABEL_NAME(n, opname) ":\n"\
".long 1f\n"\
ASM_PREVIOUS_SECTION \
"sti;.long " ASM_NAME(__op_jmp) #n " - 1f\n"\
"1:\n");\
} while (0)
+#endif
#else

26
qemu/patches/qemu-0.9.0-qcow2.diff
View file

@ -1,26 +0,0 @@
--- block-qcow2.c 2006/08/07 02:38:06 1.4
+++ block-qcow2.c 2007/04/02 12:48:47 1.6
@@ -1886,6 +1886,8 @@
int64_t table_offset;
uint64_t data64;
uint32_t data32;
+ int old_table_size;
+ int64_t old_table_offset;
if (min_size <= s->refcount_table_size)
return 0;
@@ -1931,10 +1933,14 @@
&data32, sizeof(data32)) != sizeof(data32))
goto fail;
qemu_free(s->refcount_table);
+ old_table_offset = s->refcount_table_offset;
+ old_table_size = s->refcount_table_size;
s->refcount_table = new_table;
s->refcount_table_size = new_table_size;
+ s->refcount_table_offset = table_offset;
update_refcount(bs, table_offset, new_table_size2, 1);
+ free_clusters(bs, old_table_offset, old_table_size * sizeof(uint64_t));
return 0;
fail:
free_clusters(bs, table_offset, new_table_size2);

10
qemu/patches/qemu-0.9.0-sparc-clobber.patch
View file

@ -1,10 +0,0 @@
--- qemu-0.9.0/cpu-exec.c 2007-07-22 18:05:41.000000000 +0200
+++ qemu/cpu-exec.c 2007-07-22 18:04:24.000000000 +0200
@@ -645,6 +645,7 @@
: /* no outputs */
: "r" (gen_func)
: "i0", "i1", "i2", "i3", "i4", "i5",
+ "o0", "o1", "o2", "o3", "o4", "o5",
"l0", "l1", "l2", "l3", "l4", "l5",
"l6", "l7");
#elif defined(__arm__)

23
qemu/patches/qemu-0.9.0-sparc-compile-flags.patch
View file

@ -1,23 +0,0 @@
diff -ur qemu/Makefile.target qemu-ecd/Makefile.target
--- qemu/Makefile.target 2007-07-22 19:35:11.000000000 +0200
+++ qemu-ecd/Makefile.target 2007-07-22 19:33:00.000000000 +0200
@@ -122,14 +122,14 @@
ifeq ($(ARCH),sparc)
ifeq ($(CONFIG_SOLARIS),yes)
-BASE_CFLAGS+=-mcpu=ultrasparc -m32 -ffixed-g2 -ffixed-g3
+BASE_CFLAGS+=-mcpu=ultrasparc -m32 -U__sparc_v9__
BASE_LDFLAGS+=-m32
-OP_CFLAGS+=-fno-delayed-branch -fno-omit-frame-pointer -ffixed-i0
+OP_CFLAGS+=-fno-delayed-branch -fno-omit-frame-pointer -Wa,-Av9a
else
-BASE_CFLAGS+=-mcpu=ultrasparc -m32 -ffixed-g1 -ffixed-g2 -ffixed-g3 -ffixed-g6
+BASE_CFLAGS+=-mcpu=ultrasparc -m32 -U__sparc_v9__
BASE_LDFLAGS+=-m32
-OP_CFLAGS+=-fno-delayed-branch -ffixed-i0
-HELPER_CFLAGS=$(CFLAGS) -ffixed-i0 -mflat
+OP_CFLAGS+=-fno-delayed-branch -Wa,-Av9a
+HELPER_CFLAGS=$(CFLAGS)
# -static is used to avoid g1/g3 usage by the dynamic linker
BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld -static
endif

67
qemu/patches/qemu-0.9.0-sparc-load-store-le.patch
View file

@ -1,67 +0,0 @@
diff -ur qemu/cpu-all.h qemu-0.9.0/cpu-all.h
--- qemu/cpu-all.h 2007-07-21 11:53:24.000000000 +0200
+++ qemu-0.9.0/cpu-all.h 2007-07-04 09:48:06.000000000 +0200
@@ -24,6 +24,12 @@
#define WORDS_ALIGNED
#endif
+#if defined(__sparc__)
+#ifndef ASI_PL
+#define ASI_PL 0x88
+#endif
+#endif
+
/* some important defines:
*
* WORDS_ALIGNED : if defined, the host cpu can only make word aligned
@@ -197,6 +203,10 @@
int val;
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return val;
+#elif defined(__sparc__)
+ uint16_t val;
+ __asm__ __volatile__ ("lduha [%1] %2, %0" : "=r" (val) : "r" (ptr), "i" (ASI_PL));
+ return val;
#else
uint8_t *p = ptr;
return p[0] | (p[1] << 8);
@@ -209,6 +219,10 @@
int val;
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return (int16_t)val;
+#elif defined(__sparc__)
+ int16_t val;
+ __asm__ __volatile__ ("lduha [%1] %2, %0" : "=r" (val) : "r" (ptr), "i" (ASI_PL));
+ return val;
#else
uint8_t *p = ptr;
return (int16_t)(p[0] | (p[1] << 8));
@@ -221,6 +235,10 @@
int val;
__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return val;
+#elif defined(__sparc__)
+ uint32_t val;
+ __asm__ __volatile__ ("lduwa [%1] %2, %0" : "=r" (val) : "r" (ptr), "i" (ASI_PL));
+ return val;
#else
uint8_t *p = ptr;
return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
@@ -240,6 +258,8 @@
{
#ifdef __powerpc__
__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
+#elif defined(__sparc__)
+ __asm__ __volatile__ ("stha %0, [%1] %2" : : "r" (v), "r" (ptr), "i" (ASI_PL));
#else
uint8_t *p = ptr;
p[0] = v;
@@ -251,6 +271,8 @@
{
#ifdef __powerpc__
__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
+#elif defined(__sparc__)
+ __asm__ __volatile__ ("stwa %0, [%1] %2" : : "r" (v), "r" (ptr), "i" (ASI_PL));
#else
uint8_t *p = ptr;
p[0] = v;

173
qemu/patches/qemu-0.9.0-sparc-register.patch
View file

@ -1,173 +0,0 @@
diff -ur qemu/cpu-exec.c qemu-ecd/cpu-exec.c
--- qemu/cpu-exec.c 2007-07-22 19:35:11.000000000 +0200
+++ qemu-ecd/cpu-exec.c 2007-07-22 19:26:22.000000000 +0200
@@ -233,10 +233,6 @@
uint32_t *saved_regwptr;
#endif
#endif
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- int saved_i7;
- target_ulong tmp_T0;
-#endif
int ret, interrupt_request;
void (*gen_func)(void);
TranslationBlock *tb;
@@ -300,10 +296,6 @@
#define SAVE_HOST_REGS 1
#include "hostregs_helper.h"
env = env1;
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- /* we also save i7 because longjmp may not restore it */
- asm volatile ("mov %%i7, %0" : "=r" (saved_i7));
-#endif
#if defined(TARGET_I386)
env_to_regs();
@@ -403,10 +395,6 @@
T0 = 0; /* force lookup of first TB */
for(;;) {
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- /* g1 can be modified by some libc? functions */
- tmp_T0 = T0;
-#endif
interrupt_request = env->interrupt_request;
if (__builtin_expect(interrupt_request, 0)) {
#if defined(TARGET_I386)
@@ -414,11 +402,7 @@
!(env->hflags & HF_SMM_MASK)) {
env->interrupt_request &= ~CPU_INTERRUPT_SMI;
do_smm_enter();
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- tmp_T0 = 0;
-#else
T0 = 0;
-#endif
} else if ((interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK) &&
!(env->hflags & HF_INHIBIT_IRQ_MASK)) {
@@ -431,11 +415,7 @@
do_interrupt(intno, 0, 0, 0, 1);
/* ensure that no TB jump will be modified as
the program flow was changed */
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- tmp_T0 = 0;
-#else
T0 = 0;
-#endif
}
#elif defined(TARGET_PPC)
#if 0
@@ -450,22 +430,14 @@
env->error_code = 0;
do_interrupt(env);
env->interrupt_request &= ~CPU_INTERRUPT_HARD;
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- tmp_T0 = 0;
-#else
T0 = 0;
-#endif
} else if ((interrupt_request & CPU_INTERRUPT_TIMER)) {
/* Raise it */
env->exception_index = EXCP_DECR;
env->error_code = 0;
do_interrupt(env);
env->interrupt_request &= ~CPU_INTERRUPT_TIMER;
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- tmp_T0 = 0;
-#else
T0 = 0;
-#endif
}
}
#elif defined(TARGET_MIPS)
@@ -479,11 +451,7 @@
env->exception_index = EXCP_EXT_INTERRUPT;
env->error_code = 0;
do_interrupt(env);
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- tmp_T0 = 0;
-#else
T0 = 0;
-#endif
}
#elif defined(TARGET_SPARC)
if ((interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -497,11 +465,7 @@
env->interrupt_request &= ~CPU_INTERRUPT_HARD;
do_interrupt(env->interrupt_index);
env->interrupt_index = 0;
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- tmp_T0 = 0;
-#else
T0 = 0;
-#endif
}
} else if (interrupt_request & CPU_INTERRUPT_TIMER) {
//do_interrupt(0, 0, 0, 0, 0);
@@ -532,11 +496,7 @@
env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
/* ensure that no TB jump will be modified as
the program flow was changed */
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- tmp_T0 = 0;
-#else
T0 = 0;
-#endif
}
if (interrupt_request & CPU_INTERRUPT_EXIT) {
env->interrupt_request &= ~CPU_INTERRUPT_EXIT;
@@ -606,9 +566,6 @@
lookup_symbol(tb->pc));
}
#endif
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- T0 = tmp_T0;
-#endif
/* see if we can patch the calling TB. When the TB
spans two pages, we cannot safely do a direct
jump. */
@@ -800,9 +757,6 @@
#endif
/* restore global registers */
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
- asm volatile ("mov %0, %%i7" : : "r" (saved_i7));
-#endif
#include "hostregs_helper.h"
/* fail safe : never use cpu_single_env outside cpu_exec() */
diff -ur qemu/dyngen-exec.h qemu-ecd/dyngen-exec.h
--- qemu/dyngen-exec.h 2007-07-22 19:35:11.000000000 +0200
+++ qemu-ecd/dyngen-exec.h 2007-07-22 19:26:22.000000000 +0200
@@ -142,19 +142,6 @@
#define AREG1 "g4"
#define AREG2 "g5"
#define AREG3 "g7"
-#else
-#define AREG0 "g6"
-#define AREG1 "g1"
-#define AREG2 "g2"
-#define AREG3 "g3"
-#define AREG4 "l0"
-#define AREG5 "l1"
-#define AREG6 "l2"
-#define AREG7 "l3"
-#define AREG8 "l4"
-#define AREG9 "l5"
-#define AREG10 "l6"
-#define AREG11 "l7"
#endif
#endif
#define USE_FP_CONVERT
diff -ur qemu/target-arm/exec.h qemu-ecd/target-arm/exec.h
--- qemu/target-arm/exec.h 2007-02-06 00:01:54.000000000 +0100
+++ qemu-ecd/target-arm/exec.h 2007-07-22 19:30:15.000000000 +0200
@@ -17,6 +17,7 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+#include "config.h"
#include "dyngen-exec.h"
#if defined(__sparc__)

37
qemu/patches/qemu-0.9.0-x49gp-arm-dump-state.patch
View file

@ -1,37 +0,0 @@
diff -ur qemu/target-arm/translate.c qemu-0.9.0/target-arm/translate.c
--- qemu/target-arm/translate.c 2007-02-06 00:01:54.000000000 +0100
+++ qemu-0.9.0/target-arm/translate.c 2007-07-10 09:15:56.000000000 +0200
@@ -2536,7 +2536,9 @@
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
int flags)
{
+ uint32_t psr;
int i;
+#ifndef X49GP
union {
uint32_t i;
float s;
@@ -2548,7 +2550,7 @@
float64 f64;
double d;
} d0;
- uint32_t psr;
+#endif
for(i=0;i<16;i++) {
cpu_fprintf(f, "R%02d=%08x", i, env->regs[i]);
@@ -2567,6 +2567,7 @@
psr & CPSR_T ? 'T' : 'A',
cpu_mode_names[psr & 0xf], (psr & 0x10) ? 32 : 26);
+#ifndef X49GP
for (i = 0; i < 16; i++) {
d.d = env->vfp.regs[i];
s0.i = d.l.lower;
@@ -2579,5 +2580,6 @@
d0.d);
}
cpu_fprintf(f, "FPSCR: %08x\n", (int)env->vfp.xregs[ARM_VFP_FPSCR]);
+#endif
}

192
qemu/patches/qemu-0.9.0-x49gp-arm-mmu.patch
View file

@ -1,192 +0,0 @@
diff -ur qemu-0.9.0/target-arm/helper.c qemu/target-arm/helper.c
--- qemu-0.9.0/target-arm/helper.c 2007-07-30 16:48:18.000000000 +0200
+++ qemu/target-arm/helper.c 2007-07-30 16:46:50.000000000 +0200
@@ -278,87 +280,101 @@
static int get_phys_addr(CPUState *env, uint32_t address, int access_type,
int is_user, uint32_t *phys_ptr, int *prot)
{
- int code;
- uint32_t table;
- uint32_t desc;
- int type;
- int ap;
- int domain;
- uint32_t phys_addr;
+ int code;
+ uint32_t pgdp, ptep;
+ uint32_t pgd, pte = 0;
+ uint32_t index;
+ int ap = 0;
+ int domain = 0;
+ uint32_t phys_addr = 0;
+
+ /* Fast Context Switch Extension. */
+ if (address < 0x02000000)
+ address += env->cp15.c13_fcse;
+
+ if ((env->cp15.c1_sys & 1) == 0) {
+ /* MMU disabled. */
+ *phys_ptr = address;
+ *prot = PAGE_READ | PAGE_WRITE;
+ return 0;
+ }
+
+ /* Pagetable walk. */
+
+ /* Lookup l1 descriptor. */
+ pgdp = (env->cp15.c2 & 0xffffc000) | ((address >> 18) & 0x3ffc);
+
+ pgd = ldl_phys(pgdp);
+
+ switch (pgd & 3) {
+ case 0: /* Section translation fault. */
+ code = 5;
+ goto do_fault;
+
+ case 1: /* Coarse page table. */
+ index = (address >> 10) & 0x3fc;
+ ptep = (pgd & 0xfffffc00) | index;
+
+ pte = ldl_phys(ptep);
+ break;
+
+ case 2: /* Section. */
+ phys_addr = (pgd & 0xfff00000) | (address & 0x000fffff);
+
+ domain = (pgd >> 5) & 0x0f;
+ ap = (pgd >> 10) & 0x03;
+ code = 13;
+
+ goto do_check;
+
+ case 3: /* Fine page table. */
+ index = (address >> 8) & 0xffc;
+ ptep = (pgd & 0xfffff000) | index;
+
+ pte = ldl_phys(ptep);
+ break;
+ }
+
+ code = 15;
+ switch (pte & 3) {
+ case 0: /* Page translation fault. */
+ code = 7;
+ goto do_fault;
+
+ case 1: /* Large page. */
+ phys_addr = (pte & 0xffff0000) | (address & 0x0000ffff);
+
+ domain = (pgd >> 5) & 0x0f;
+ ap = (pte >> (4 + ((address >> 13) & 6))) & 3;
+ break;
+
+ case 2: /* Small page. */
+ phys_addr = (pte & 0xfffff000) | (address & 0x00000fff);
+
+ domain = (pgd >> 5) & 0x0f;
+ ap = (pte >> (4 + ((address >> 13) & 6))) & 3;
+ break;
+
+ case 3: /* Tiny page. */
+ phys_addr = (pte & 0xfffffc00) | (address & 0x000003ff);
+
+ domain = (pgd >> 5) & 0x0f;
+ ap = (pte >> 4) & 3;
+ break;
+ }
+
+do_check:
+ *prot = check_ap(env, ap, domain, access_type, is_user);
+ if (!*prot) {
+ /* Access permission fault. */
+ goto do_fault;
+ }
- /* Fast Context Switch Extension. */
- if (address < 0x02000000)
- address += env->cp15.c13_fcse;
-
- if ((env->cp15.c1_sys & 1) == 0) {
- /* MMU diusabled. */
- *phys_ptr = address;
- *prot = PAGE_READ | PAGE_WRITE;
- } else {
- /* Pagetable walk. */
- /* Lookup l1 descriptor. */
- table = (env->cp15.c2 & 0xffffc000) | ((address >> 18) & 0x3ffc);
- desc = ldl_phys(table);
- type = (desc & 3);
- domain = (env->cp15.c3 >> ((desc >> 4) & 0x1e)) & 3;
- if (type == 0) {
- /* Secton translation fault. */
- code = 5;
- goto do_fault;
- }
- if (domain == 0 || domain == 2) {
- if (type == 2)
- code = 9; /* Section domain fault. */
- else
- code = 11; /* Page domain fault. */
- goto do_fault;
- }
- if (type == 2) {
- /* 1Mb section. */
- phys_addr = (desc & 0xfff00000) | (address & 0x000fffff);
- ap = (desc >> 10) & 3;
- code = 13;
- } else {
- /* Lookup l2 entry. */
- table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc);
- desc = ldl_phys(table);
- switch (desc & 3) {
- case 0: /* Page translation fault. */
- code = 7;
- goto do_fault;
- case 1: /* 64k page. */
- phys_addr = (desc & 0xffff0000) | (address & 0xffff);
- ap = (desc >> (4 + ((address >> 13) & 6))) & 3;
- break;
- case 2: /* 4k page. */
- phys_addr = (desc & 0xfffff000) | (address & 0xfff);
- ap = (desc >> (4 + ((address >> 13) & 6))) & 3;
- break;
- case 3: /* 1k page. */
- if (type == 1) {
- /* Page translation fault. */
- code = 7;
- goto do_fault;
- }
- phys_addr = (desc & 0xfffffc00) | (address & 0x3ff);
- ap = (desc >> 4) & 3;
- break;
- default:
- /* Never happens, but compiler isn't smart enough to tell. */
- abort();
- }
- code = 15;
- }
- *prot = check_ap(env, ap, domain, access_type, is_user);
- if (!*prot) {
- /* Access permission fault. */
- goto do_fault;
- }
*phys_ptr = phys_addr;
- }
- return 0;
+ return 0;
+
do_fault:
- return code | (domain << 4);
+ return code | (domain << 4);
}
int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address,
@@ -532,7 +548,7 @@
return;
bad_reg:
/* ??? For debugging only. Should raise illegal instruction exception. */
- cpu_abort(env, "Unimplemented cp15 register read\n");
+ cpu_abort(env, "Unimplemented cp15 register write\n");
}
uint32_t helper_get_cp15(CPUState *env, uint32_t insn)

50
qemu/patches/qemu-0.9.0-x49gp-arm-semihosting.patch
View file

@ -1,50 +0,0 @@
diff -ur qemu/arm-semi.c qemu-0.9.0/arm-semi.c
--- qemu/arm-semi.c 2007-02-06 00:01:54.000000000 +0100
+++ qemu-0.9.0/arm-semi.c 2007-07-03 21:52:52.000000000 +0200
@@ -196,7 +196,7 @@
#define ARG(n) tget32(args + (n) * 4)
#define SET_ARG(n, val) tput32(args + (n) * 4,val)
-uint32_t do_arm_semihosting(CPUState *env)
+int do_arm_semihosting(CPUState *env, uint32_t mask)
{
target_ulong args;
char * s;
diff -ur qemu/linux-user/arm/syscall.h qemu-0.9.0/linux-user/arm/syscall.h
--- qemu/linux-user/arm/syscall.h 2007-02-06 00:01:54.000000000 +0100
+++ qemu-0.9.0/linux-user/arm/syscall.h 2007-07-03 21:54:32.000000000 +0200
@@ -39,4 +39,4 @@
#define UNAME_MACHINE "armv5tel"
#endif
-uint32_t do_arm_semihosting(CPUState *);
+int do_arm_semihosting(CPUState *, uint32_t);
diff -ur qemu/target-arm/helper.c qemu-0.9.0/target-arm/helper.c
--- qemu/target-arm/helper.c 2007-02-06 00:01:54.000000000 +0100
+++ qemu-0.9.0/target-arm/helper.c 2007-07-21 11:44:15.000000000 +0200
@@ -5,6 +5,8 @@
#include "cpu.h"
#include "exec-all.h"
+extern int do_arm_semihosting(CPUARMState *env, uint32_t mask);
+
void cpu_reset(CPUARMState *env)
{
#if defined (CONFIG_USER_ONLY)
@@ -184,14 +184,8 @@
} else {
mask = ldl_code(env->regs[15] - 4) & 0xffffff;
}
- /* Only intercept calls from privileged modes, to provide some
- semblance of security. */
- if (((mask == 0x123456 && !env->thumb)
- || (mask == 0xab && env->thumb))
- && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) {
- env->regs[0] = do_arm_semihosting(env);
- return;
- }
+ if (do_arm_semihosting(env, mask))
+ return;
}
new_mode = ARM_CPU_MODE_SVC;
addr = 0x08;

1302
qemu/patches/qemu-0.9.0-x49gp-block.patch
View file

File diff suppressed because it is too large Load diff

15
qemu/patches/qemu-0.9.0-x49gp-build-libqemu.patch
View file

@ -1,15 +0,0 @@
--- qemu-0.9.0/Makefile 2007-07-26 11:10:25.000000000 +0200
+++ qemu/Makefile 2007-07-26 11:10:38.000000000 +0200
@@ -32,10 +32,10 @@
endif
endif
-all: $(TOOLS) $(DOCS) recurse-all
+all: recurse-all
subdir-%: dyngen$(EXESUF)
- $(MAKE) -C $(subst subdir-,,$@) all
+ $(MAKE) -C $(subst subdir-,,$@) libqemu.a
recurse-all: $(patsubst %,subdir-%, $(TARGET_DIRS))

36
qemu/patches/qemu-0.9.0-x49gp-debug-unassigned.patch
View file

@ -1,36 +0,0 @@
diff -ur qemu/exec.c qemu-0.9.0/exec.c
--- qemu/exec.c 2007-02-06 00:01:54.000000000 +0100
+++ qemu-0.9.0/exec.c 2007-07-10 09:14:31.000000000 +0200
@@ -41,7 +41,7 @@
//#define DEBUG_TB_INVALIDATE
//#define DEBUG_FLUSH
//#define DEBUG_TLB
-//#define DEBUG_UNASSIGNED
+#define DEBUG_UNASSIGNED
/* make various TB consistency checks */
//#define DEBUG_TB_CHECK
@@ -1812,10 +1812,14 @@
return p->phys_offset;
}
+CPUState *__GLOBAL_env;
+
static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr)
{
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem read 0x%08x\n", (int)addr);
+ cpu_dump_state(__GLOBAL_env, stdout, fprintf, 0);
+ abort();
#endif
return 0;
}
@@ -1824,6 +1828,8 @@
{
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem write 0x%08x = 0x%x\n", (int)addr, val);
+ cpu_dump_state(__GLOBAL_env, stdout, fprintf, 0);
+ abort();
#endif
}

17
qemu/patches/qemu-0.9.0-x49gp-phys_ram_dirty.patch
View file

@ -1,17 +0,0 @@
--- qemu-0.9.0/exec.c 2007-07-23 13:57:29.000000000 +0200
+++ qemu/exec.c 2007-07-23 13:53:06.000000000 +0200
@@ -1942,9 +1942,11 @@
cpu_register_io_memory(IO_MEM_NOTDIRTY >> IO_MEM_SHIFT, error_mem_read, notdirty_mem_write, NULL);
io_mem_nb = 5;
- /* alloc dirty bits array */
- phys_ram_dirty = qemu_vmalloc(phys_ram_size >> TARGET_PAGE_BITS);
- memset(phys_ram_dirty, 0xff, phys_ram_size >> TARGET_PAGE_BITS);
+ if (phys_ram_size) {
+ /* alloc dirty bits array */
+ phys_ram_dirty = qemu_vmalloc(phys_ram_size >> TARGET_PAGE_BITS);
+ memset(phys_ram_dirty, 0xff, phys_ram_size >> TARGET_PAGE_BITS);
+ }
}
/* mem_read and mem_write are arrays of functions containing the

165
qemu/patches/qemu-2ndbootdevice_04.diff
View file

@ -1,165 +0,0 @@
--- vl.h 2007-02-05 21:20:30.000000000 +0100
+++ vl.h_2 2007-03-14 16:22:14.000000000 +0100
@@ -683,6 +683,9 @@
typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
int boot_device,
+#ifdef TARGET_I386
+ int boot_device_2,
+#endif
DisplayState *ds, const char **fd_filename, int snapshot,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename);
--- vl.c 2007-02-05 21:46:05.000000000 +0100
+++ vl.c_2.c 2007-03-14 15:16:49.000000000 +0100
@@ -131,6 +131,7 @@
const char* keyboard_layout = NULL;
int64_t ticks_per_sec;
int boot_device = 'c';
+int boot_device_2 = 'd';
int ram_size;
int pit_min_timer_count = 0;
int nb_nics;
@@ -6021,7 +6022,11 @@
"-hda/-hdb file use 'file' as IDE hard disk 0/1 image\n"
"-hdc/-hdd file use 'file' as IDE hard disk 2/3 image\n"
"-cdrom file use 'file' as IDE cdrom image (cdrom is ide1 master)\n"
+#ifdef TARGET_I386
+ "-boot d1(,d2) boot on floppy (a), hard disk (c), CD-ROM (d), or network (n)\n"
+#else
"-boot [a|c|d|n] boot on floppy (a), hard disk (c), CD-ROM (d), or network (n)\n"
+#endif
"-snapshot write to temporary files instead of disk image files\n"
#ifdef CONFIG_SDL
"-no-quit disable SDL window close capability\n"
@@ -6721,6 +6734,15 @@
break;
case QEMU_OPTION_boot:
boot_device = optarg[0];
+#ifdef TARGET_I386
+ if (strlen(optarg) == 3) { //we have a second bootdevice
+ boot_device_2 = optarg[2];
+ if (boot_device_2 != 'a' && boot_device_2 != 'c' && boot_device_2 != 'd') {
+ fprintf(stderr, "qemu: invalid second boot device '%c'\n", boot_device_2);
+ exit(1);
+ }
+ }
+#endif
if (boot_device != 'a' &&
#if defined(TARGET_SPARC) || defined(TARGET_I386)
// Network boot
@@ -7199,8 +7220,11 @@
qemu_chr_printf(parallel_hds[i], "parallel%d console\r\n", i);
}
}
-
+#ifdef TARGET_I386
+ machine->init(ram_size, vga_ram_size, boot_device, boot_device_2,
+#else
machine->init(ram_size, vga_ram_size, boot_device,
+#endif
ds, fd_filename, snapshot,
kernel_filename, kernel_cmdline, initrd_filename);
--- hw/pc.c 2007-02-02 04:13:18.000000000 +0100
+++ hw/pc.c_2 2007-03-14 15:58:38.000000000 +0100
@@ -154,7 +154,7 @@
}
/* hd_table must contain 4 block drivers */
-static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
+static void cmos_init(int ram_size, int boot_device, int boot_device_2, BlockDriverState **hd_table)
{
RTCState *s = rtc_state;
int val;
@@ -185,19 +185,32 @@
rtc_set_memory(s, 0x34, val);
rtc_set_memory(s, 0x35, val >> 8);
+ int bd2_val;
+ switch(boot_device_2) {
+ case 'a':
+ bd2_val = 0x10;
+ break;
+ case 'c':
+ bd2_val = 0x20;
+ break;
+ case 'd':
+ bd2_val = 0x30;
+ break;
+ }
+
switch(boot_device) {
case 'a':
case 'b':
- rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
+ rtc_set_memory(s, 0x3d, bd2_val | 0x01); /* floppy boot */
if (!fd_bootchk)
- rtc_set_memory(s, 0x38, 0x01); /* disable signature check */
+ rtc_set_memory(s, 0x38, bd2_val | 0x01); /* disable signature check */
break;
default:
case 'c':
- rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
+ rtc_set_memory(s, 0x3d, bd2_val | 0x02); /* hard drive boot */
break;
case 'd':
- rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
+ rtc_set_memory(s, 0x3d, bd2_val | 0x03); /* CD-ROM boot */
break;
}
@@ -443,7 +459,8 @@
}
/* PC hardware initialisation */
-static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
+static void pc_init1(int ram_size, int vga_ram_size,
+ int boot_device, int boot_device_2,
DisplayState *ds, const char **fd_filename, int snapshot,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename,
@@ -692,7 +709,7 @@
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
- cmos_init(ram_size, boot_device, bs_table);
+ cmos_init(ram_size, boot_device, boot_device_2, bs_table);
if (pci_enabled && usb_enabled) {
usb_uhci_init(pci_bus, piix3_devfn + 2);
@@ -730,27 +747,29 @@
#endif
}
-static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
+static void pc_init_pci(int ram_size, int vga_ram_size,
+ int boot_device, int boot_device_2,
DisplayState *ds, const char **fd_filename,
int snapshot,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename)
{
- pc_init1(ram_size, vga_ram_size, boot_device,
+ pc_init1(ram_size, vga_ram_size, boot_device, boot_device_2,
ds, fd_filename, snapshot,
kernel_filename, kernel_cmdline,
initrd_filename, 1);
}
-static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
+static void pc_init_isa(int ram_size, int vga_ram_size,
+ int boot_device, int boot_device_2,
DisplayState *ds, const char **fd_filename,
int snapshot,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename)
{
- pc_init1(ram_size, vga_ram_size, boot_device,
+ pc_init1(ram_size, vga_ram_size, boot_device, boot_device_2,
ds, fd_filename, snapshot,
kernel_filename, kernel_cmdline,
initrd_filename, 0);

61
qemu/prepare.sh
View file

@ -1,61 +0,0 @@
# get/update QEMU
# export CVS_RSH="ssh"
# cvs -z3 -d:pserver:anonymous@cvs.savannah.nongnu.org:/sources/qemu co -r "release_0_9_0" qemu
rm -rf qemu
tar xzvf qemu-0.9.0.tar.gz
mv qemu-0.9.0 qemu
# patch qemu sources
cd qemu
#qemu hotfix for qcow2
patch -p0 -u < ../patches/qemu-0.9.0-qcow2.diff
#qemu gcc4 patches
patch -p1 -u < ../patches/qemu-0.9.0-gcc4.patch
patch -p1 -u < ../patches/qemu-0.7.2-dyngen-check-stack-clobbers.patch
patch -p1 -u < ../patches/qemu-0.7.2-gcc4-opts.patch
patch -p1 -u < ../patches/qemu-0.8.0-gcc4-hacks.patch
#qemu OS X86 patches
patch -p1 -u < ../patches/qemu-0.9.0-enforce-16byte-stack-boundary.patch
patch -p1 -u -f < ../patches/qemu-0.9.0-i386-FORCE_RET.patch
patch -p1 -u < ../patches/qemu-0.9.0-osx-intel-port.patch
patch -p1 -u < ../patches/qemu-0.8.0-osx-bugfix.patch
# arm patches
patch -p1 -u < ../patches/qemu-0.9.0-arm-shift.patch
# x49gp patches
patch -p1 -u < ../patches/qemu-0.9.0-sparc-compile-flags.patch
patch -p1 -u < ../patches/qemu-0.9.0-sparc-load-store-le.patch
patch -p1 -u < ../patches/qemu-0.9.0-sparc-clobber.patch
patch -p1 -u < ../patches/qemu-0.9.0-sparc-register.patch
patch -p1 -u < ../patches/qemu-0.9.0-x49gp-arm-dump-state.patch
patch -p1 -u < ../patches/qemu-0.9.0-x49gp-arm-mmu.patch
patch -p1 -u < ../patches/qemu-0.9.0-x49gp-arm-semihosting.patch
patch -p1 -u < ../patches/qemu-0.9.0-x49gp-debug-unassigned.patch
patch -p1 -u < ../patches/qemu-0.9.0-x49gp-phys_ram_dirty.patch
patch -p1 -u < ../patches/qemu-0.9.0-x49gp-block.patch
# only build libqemu.a
patch -p1 -u < ../patches/qemu-0.9.0-x49gp-build-libqemu.patch
# configure
if [ "`uname -m`" = "sparc64" ]; then
STUB=sparc32
fi
if [ "`uname -s`" = "Darwin" ]; then
OPTIONS="--disable-gcc-check"
fi
OPTIONS="${OPTIONS} --disable-gfx-check"
${STUB} ./configure ${OPTIONS} --target-list=arm-softmmu
cd ..

11
s3c2410_adc.c
View file

@ -56,9 +56,6 @@ s3c2410_adc_read(void *opaque, target_phys_addr_t offset)
s3c2410_adc_t *adc = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_ADC_BASE;
#endif
if (! S3C2410_OFFSET_OK(adc, offset)) {
return ~(0);
}
@ -89,9 +86,6 @@ s3c2410_adc_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_adc_t *adc = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_ADC_BASE;
#endif
if (! S3C2410_OFFSET_OK(adc, offset)) {
return;
}
@ -216,13 +210,8 @@ s3c2410_adc_init(x49gp_module_t *module)
module->user_data = adc;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_adc_readfn,
s3c2410_adc_writefn, adc);
#else
iotype = cpu_register_io_memory(s3c2410_adc_readfn,
s3c2410_adc_writefn, adc);
#endif
#ifdef DEBUG_S3C2410_ADC
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

26
s3c2410_arm.c
View file

@ -13,11 +13,7 @@
#include <x49gp.h>
#include <s3c2410.h>
#ifdef QEMU_OLD
extern void tlb_flush(struct CPUState *, int global);
#else
#include "cpu-all.h"
#endif
static int
s3c2410_arm_load(x49gp_module_t *module, GKeyFile *key)
@ -75,15 +71,10 @@ s3c2410_arm_load(x49gp_module_t *module, GKeyFile *key)
error = -EAGAIN;
if (x49gp_module_get_u32(module, key, "VF", 0, &env->VF))
error = -EAGAIN;
#ifdef QEMU_OLD
if (x49gp_module_get_u32(module, key, "NZF", 0, &env->NZF))
error = -EAGAIN;
#else
if (x49gp_module_get_u32(module, key, "NF", 0, &env->NF))
error = -EAGAIN;
if (x49gp_module_get_u32(module, key, "ZF", 0, &env->ZF))
error = -EAGAIN;
#endif
if (x49gp_module_get_u32(module, key, "QF", 0, &env->QF))
error = -EAGAIN;
if (x49gp_module_get_u32(module, key, "thumb", 0, &env->thumb))
@ -95,10 +86,6 @@ s3c2410_arm_load(x49gp_module_t *module, GKeyFile *key)
error = -EAGAIN;
if (x49gp_module_get_u32(module, key, "cp15-c1-coproc", 0, &env->cp15.c1_coproc))
error = -EAGAIN;
#ifdef QEMU_OLD
if (x49gp_module_get_u32(module, key, "cp15-c2", 0, &env->cp15.c2))
error = -EAGAIN;
#else
if (x49gp_module_get_u32(module, key, "cp15-c2-base0", 0, &env->cp15.c2_base0))
error = -EAGAIN;
if (x49gp_module_get_u32(module, key, "cp15-c2-base1", 0, &env->cp15.c2_base1))
@ -113,7 +100,6 @@ s3c2410_arm_load(x49gp_module_t *module, GKeyFile *key)
error = -EAGAIN;
if (x49gp_module_get_u32(module, key, "cp15-c2-insn", 0, &env->cp15.c2_insn))
error = -EAGAIN;
#endif
if (x49gp_module_get_u32(module, key, "cp15-c3", 0, &env->cp15.c3))
error = -EAGAIN;
if (x49gp_module_get_u32(module, key, "cp15-c5-insn", 0, &env->cp15.c5_insn))
@ -197,21 +183,14 @@ s3c2410_arm_save(x49gp_module_t *module, GKeyFile *key)
x49gp_module_set_u32(module, key, "CF", env->CF);
x49gp_module_set_u32(module, key, "VF", env->VF);
#ifdef QEMU_OLD
x49gp_module_set_u32(module, key, "NZF", env->NZF);
#else
x49gp_module_set_u32(module, key, "NF", env->NF);
x49gp_module_set_u32(module, key, "ZF", env->ZF);
#endif
x49gp_module_set_u32(module, key, "QF", env->QF);
x49gp_module_set_int(module, key, "thumb", env->thumb);
x49gp_module_set_u32(module, key, "cp15-c0-cpuid", env->cp15.c0_cpuid);
x49gp_module_set_u32(module, key, "cp15-c1-sys", env->cp15.c1_sys);
x49gp_module_set_u32(module, key, "cp15-c1-coproc", env->cp15.c1_coproc);
#ifdef QEMU_OLD
x49gp_module_set_u32(module, key, "cp15-c2", env->cp15.c2);
#else
x49gp_module_set_u32(module, key, "cp15-c2-base0", env->cp15.c2_base0);
x49gp_module_set_u32(module, key, "cp15-c2-base1", env->cp15.c2_base1);
x49gp_module_set_u32(module, key, "cp15-c2-control", env->cp15.c2_control);
@ -219,7 +198,6 @@ s3c2410_arm_save(x49gp_module_t *module, GKeyFile *key)
x49gp_module_set_u32(module, key, "cp15-c2-base-mask", env->cp15.c2_base_mask);
x49gp_module_set_u32(module, key, "cp15-c2-data", env->cp15.c2_data);
x49gp_module_set_u32(module, key, "cp15-c2-insn", env->cp15.c2_insn);
#endif
x49gp_module_set_u32(module, key, "cp15-c3", env->cp15.c3);
x49gp_module_set_u32(module, key, "cp15-c5-insn", env->cp15.c5_insn);
x49gp_module_set_u32(module, key, "cp15-c5-data", env->cp15.c5_data);
@ -263,10 +241,6 @@ s3c2410_arm_init(x49gp_module_t *module)
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
#endif
#ifdef QEMU_OLD
cpu_arm_set_model(x49gp->env, ARM_CPUID_ARM926);
#endif
module->user_data = x49gp->env;
return 0;
}

11
s3c2410_intc.c
View file

@ -495,9 +495,6 @@ s3c2410_intc_read(void *opaque, target_phys_addr_t offset)
s3c2410_offset_t *reg;
uint32_t data;
#ifdef QEMU_OLD
offset -= S3C2410_INTC_BASE;
#endif
if (! S3C2410_OFFSET_OK(intc, offset)) {
return ~(0);
}
@ -530,9 +527,6 @@ s3c2410_intc_write(void *opaque, target_phys_addr_t offset, uint32_t data)
#endif
s3c2410_intc_t *intc = opaque;
#ifdef QEMU_OLD
offset -= S3C2410_INTC_BASE;
#endif
if (! S3C2410_OFFSET_OK(intc, offset)) {
return;
}
@ -700,13 +694,8 @@ s3c2410_intc_init(x49gp_module_t *module)
intc->x49gp = module->x49gp;
intc->x49gp->s3c2410_intc = intc;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_intc_readfn,
s3c2410_intc_writefn, intc);
#else
iotype = cpu_register_io_memory(s3c2410_intc_readfn,
s3c2410_intc_writefn, intc);
#endif
#ifdef DEBUG_S3C2410_INTC
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_io_port.c
View file

@ -191,9 +191,6 @@ s3c2410_io_port_read(void *opaque, target_phys_addr_t offset)
s3c2410_io_port_t *io = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_IO_PORT_BASE;
#endif
if (! S3C2410_OFFSET_OK(io, offset)) {
fprintf(stderr, "%s:%u: offset %08lx not OK\n", __FUNCTION__, __LINE__, (unsigned long) offset);
abort();
@ -277,9 +274,6 @@ s3c2410_io_port_write(void *opaque, target_phys_addr_t offset, uint32_t data)
uint32_t change;
static uint32_t lcd_data = 0;
#ifdef QEMU_OLD
offset -= S3C2410_IO_PORT_BASE;
#endif
if (! S3C2410_OFFSET_OK(io, offset)) {
return;
}
@ -656,13 +650,8 @@ s3c2410_io_port_init(x49gp_module_t *module)
module->x49gp->s3c2410_io_port = io;
io->x49gp = module->x49gp;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_io_port_readfn,
s3c2410_io_port_writefn, io);
#else
iotype = cpu_register_io_memory(s3c2410_io_port_readfn,
s3c2410_io_port_writefn, io);
#endif
#ifdef DEBUG_S3C2410_IO_PORT
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_lcd.c
View file

@ -192,9 +192,6 @@ s3c2410_lcd_read(void *opaque, target_phys_addr_t offset)
s3c2410_offset_t *reg;
uint32_t linecnt;
#ifdef QEMU_OLD
offset -= S3C2410_LCD_BASE;
#endif
if (! S3C2410_OFFSET_OK(lcd, offset)) {
return ~(0);
}
@ -230,9 +227,6 @@ s3c2410_lcd_write(void *opaque, target_phys_addr_t offset, uint32_t data)
x49gp_t *x49gp = lcd->x49gp;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_LCD_BASE;
#endif
if (! S3C2410_OFFSET_OK(lcd, offset)) {
return;
}
@ -372,13 +366,8 @@ s3c2410_lcd_init(x49gp_module_t *module)
module->x49gp->s3c2410_lcd = lcd;
lcd->x49gp = module->x49gp;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_lcd_readfn,
s3c2410_lcd_writefn, lcd);
#else
iotype = cpu_register_io_memory(s3c2410_lcd_readfn,
s3c2410_lcd_writefn, lcd);
#endif
#ifdef DEBUG_S3C2410_LCD
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_memc.c
View file

@ -74,9 +74,6 @@ s3c2410_memc_read(void *opaque, target_phys_addr_t offset)
s3c2410_memc_t *memc = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_MEMC_BASE;
#endif
if (! S3C2410_OFFSET_OK(memc, offset)) {
return ~(0);
}
@ -98,9 +95,6 @@ s3c2410_memc_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_memc_t *memc = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_MEMC_BASE;
#endif
if (! S3C2410_OFFSET_OK(memc, offset)) {
return;
}
@ -230,13 +224,8 @@ s3c2410_memc_init(x49gp_module_t *module)
module->user_data = memc;
memc->x49gp = module->x49gp;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_memc_readfn,
s3c2410_memc_writefn, memc);
#else
iotype = cpu_register_io_memory(s3c2410_memc_readfn,
s3c2410_memc_writefn, memc);
#endif
#ifdef DEBUG_S3C2410_MEMC
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_nand.c
View file

@ -59,9 +59,6 @@ s3c2410_nand_read(void *opaque, target_phys_addr_t offset)
s3c2410_nand_t *nand = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_NAND_BASE;
#endif
if (! S3C2410_OFFSET_OK(nand, offset)) {
return ~(0);
}
@ -83,9 +80,6 @@ s3c2410_nand_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_nand_t *nand = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_NAND_BASE;
#endif
if (! S3C2410_OFFSET_OK(nand, offset)) {
return;
}
@ -211,13 +205,8 @@ s3c2410_nand_init(x49gp_module_t *module)
module->user_data = nand;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_nand_readfn,
s3c2410_nand_writefn, nand);
#else
iotype = cpu_register_io_memory(s3c2410_nand_readfn,
s3c2410_nand_writefn, nand);
#endif
#ifdef DEBUG_S3C2410_NAND
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_power.c
View file

@ -62,9 +62,6 @@ s3c2410_power_read(void *opaque, target_phys_addr_t offset)
s3c2410_power_t *power = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_POWER_BASE;
#endif
if (! S3C2410_OFFSET_OK(power, offset)) {
return ~(0);
}
@ -90,9 +87,6 @@ s3c2410_power_write(void *opaque, target_phys_addr_t offset, uint32_t data)
uint32_t uMdiv, uPdiv, uSdiv;
uint32_t slow_bit, slow_val;
#ifdef QEMU_OLD
offset -= S3C2410_POWER_BASE;
#endif
if (! S3C2410_OFFSET_OK(power, offset)) {
return;
}
@ -322,13 +316,8 @@ s3c2410_power_init(x49gp_module_t *module)
module->user_data = power;
power->x49gp = module->x49gp;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_power_readfn,
s3c2410_power_writefn, power);
#else
iotype = cpu_register_io_memory(s3c2410_power_readfn,
s3c2410_power_writefn, power);
#endif
#ifdef DEBUG_S3C2410_POWER
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_rtc.c
View file

@ -252,9 +252,6 @@ s3c2410_rtc_read(void *opaque, target_phys_addr_t offset)
s3c2410_rtc_t *rtc = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_RTC_BASE;
#endif
if (! S3C2410_OFFSET_OK(rtc, offset)) {
return ~(0);
}
@ -308,9 +305,6 @@ s3c2410_rtc_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_rtc_t *rtc = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_RTC_BASE;
#endif
if (! S3C2410_OFFSET_OK(rtc, offset)) {
return;
}
@ -458,13 +452,8 @@ s3c2410_rtc_init(x49gp_module_t *module)
rtc->alarm_timer = x49gp_new_timer(X49GP_TIMER_REALTIME,
s3c2410_rtc_alarm, rtc);
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_rtc_readfn,
s3c2410_rtc_writefn, rtc);
#else
iotype = cpu_register_io_memory(s3c2410_rtc_readfn,
s3c2410_rtc_writefn, rtc);
#endif
#ifdef DEBUG_S3C2410_RTC
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_sdi.c
View file

@ -219,9 +219,6 @@ s3c2410_sdi_read(void *opaque, target_phys_addr_t offset)
s3c2410_offset_t *reg;
unsigned int read_avail, write_avail;
#ifdef QEMU_OLD
offset -= S3C2410_SDI_BASE;
#endif
if (! S3C2410_OFFSET_OK(sdi, offset)) {
return ~(0);
}
@ -307,9 +304,6 @@ s3c2410_sdi_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_offset_t *reg;
unsigned int read_avail, write_avail;
#ifdef QEMU_OLD
offset -= S3C2410_SDI_BASE;
#endif
if (! S3C2410_OFFSET_OK(sdi, offset)) {
return;
}
@ -731,13 +725,8 @@ s3c2410_sdi_init(x49gp_module_t *module)
module->x49gp->s3c2410_sdi = sdi;
sdi->x49gp = module->x49gp;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_sdi_readfn,
s3c2410_sdi_writefn, sdi);
#else
iotype = cpu_register_io_memory(s3c2410_sdi_readfn,
s3c2410_sdi_writefn, sdi);
#endif
#ifdef DEBUG_S3C2410_SDI
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_spi.c
View file

@ -74,9 +74,6 @@ s3c2410_spi_read(void *opaque, target_phys_addr_t offset)
s3c2410_spi_t *spi = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_SPI_BASE;
#endif
if (! S3C2410_OFFSET_OK(spi, offset)) {
return ~(0);
}
@ -109,9 +106,6 @@ s3c2410_spi_write(void *opaque, target_phys_addr_t offset, uint32_t data)
x49gp_t *x49gp = spi->x49gp;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_SPI_BASE;
#endif
if (! S3C2410_OFFSET_OK(spi, offset)) {
return;
}
@ -249,13 +243,8 @@ s3c2410_spi_init(x49gp_module_t *module)
module->user_data = spi;
spi->x49gp = module->x49gp;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_spi_readfn,
s3c2410_spi_writefn, spi);
#else
iotype = cpu_register_io_memory(s3c2410_spi_readfn,
s3c2410_spi_writefn, spi);
#endif
#ifdef DEBUG_S3C2410_SPI
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_timer.c
View file

@ -298,9 +298,6 @@ s3c2410_timer_read(void *opaque, target_phys_addr_t offset)
s3c2410_offset_t *reg;
uint32_t data;
#ifdef QEMU_OLD
offset -= S3C2410_TIMER_BASE;
#endif
if (! S3C2410_OFFSET_OK(timer, offset)) {
return ~(0);
}
@ -343,9 +340,6 @@ s3c2410_timer_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_timer_t *timer = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_TIMER_BASE;
#endif
if (! S3C2410_OFFSET_OK(timer, offset)) {
return;
}
@ -515,13 +509,8 @@ s3c2410_timer_init(x49gp_module_t *module)
t->timer = x49gp_new_timer(X49GP_TIMER_VIRTUAL, s3c2410_timer_timeout, t);
}
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_timer_readfn,
s3c2410_timer_writefn, timer);
#else
iotype = cpu_register_io_memory(s3c2410_timer_readfn,
s3c2410_timer_writefn, timer);
#endif
#ifdef DEBUG_S3C2410_TIMER
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

5
s3c2410_uart.c
View file

@ -381,13 +381,8 @@ s3c2410_uart_init(x49gp_module_t *module)
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
#endif
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_uart_readfn,
s3c2410_uart_writefn, uart_regs);
#else
iotype = cpu_register_io_memory(s3c2410_uart_readfn,
s3c2410_uart_writefn, uart_regs);
#endif
#ifdef DEBUG_S3C2410_UART
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_usbdev.c
View file

@ -138,9 +138,6 @@ s3c2410_usbdev_read(void *opaque, target_phys_addr_t offset)
s3c2410_usbdev_t *usbdev = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_USBDEV_BASE;
#endif
if (! S3C2410_OFFSET_OK(usbdev, offset)) {
return ~(0);
}
@ -162,9 +159,6 @@ s3c2410_usbdev_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_usbdev_t *usbdev = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_USBDEV_BASE;
#endif
if (! S3C2410_OFFSET_OK(usbdev, offset)) {
return;
}
@ -289,13 +283,8 @@ s3c2410_usbdev_init(x49gp_module_t *module)
module->user_data = usbdev;
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_usbdev_readfn,
s3c2410_usbdev_writefn, usbdev);
#else
iotype = cpu_register_io_memory(s3c2410_usbdev_readfn,
s3c2410_usbdev_writefn, usbdev);
#endif
#ifdef DEBUG_S3C2410_USBDEV
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

11
s3c2410_watchdog.c
View file

@ -164,9 +164,6 @@ s3c2410_watchdog_read(void *opaque, target_phys_addr_t offset)
s3c2410_watchdog_t *watchdog = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_WATCHDOG_BASE;
#endif
if (! S3C2410_OFFSET_OK(watchdog, offset)) {
return ~(0);
}
@ -189,9 +186,6 @@ s3c2410_watchdog_write(void *opaque, target_phys_addr_t offset, uint32_t data)
s3c2410_watchdog_t *watchdog = opaque;
s3c2410_offset_t *reg;
#ifdef QEMU_OLD
offset -= S3C2410_WATCHDOG_BASE;
#endif
if (! S3C2410_OFFSET_OK(watchdog, offset)) {
return;
}
@ -335,13 +329,8 @@ s3c2410_watchdog_init(x49gp_module_t *module)
watchdog->timer = x49gp_new_timer(X49GP_TIMER_VIRTUAL,
s3c2410_watchdog_tick, watchdog);
#ifdef QEMU_OLD
iotype = cpu_register_io_memory(0, s3c2410_watchdog_readfn,
s3c2410_watchdog_writefn, watchdog);
#else
iotype = cpu_register_io_memory(s3c2410_watchdog_readfn,
s3c2410_watchdog_writefn, watchdog);
#endif
#ifdef DEBUG_S3C2410_WATCHDOG
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
#endif

19
sram.c
View file

@ -387,9 +387,6 @@ sram_get_word(void *opaque, target_phys_addr_t offset)
x49gp_sram_t *sram = opaque;
uint32_t data;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t)phys_ram_base + sram->offset;
#endif
data = ldl_p(sram->data + offset);
#if 0
@ -423,9 +420,6 @@ sram_get_halfword(void *opaque, target_phys_addr_t offset)
x49gp_sram_t *sram = opaque;
unsigned short data;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t)phys_ram_base + sram->offset;
#endif
data = lduw_p(sram->data + offset);
#ifdef DEBUG_X49GP_SYSRAM_READ
@ -453,9 +447,6 @@ sram_get_byte(void *opaque, target_phys_addr_t offset)
x49gp_sram_t *sram = opaque;
unsigned char data;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t)phys_ram_base + sram->offset;
#endif
data = ldub_p(sram->data + offset);
#ifdef DEBUG_X49GP_SYSRAM_READ
@ -482,10 +473,6 @@ sram_put_word(void *opaque, target_phys_addr_t offset, uint32_t data)
{
x49gp_sram_t *sram = opaque;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t)phys_ram_base + sram->offset;
#endif
if (offset == 0x00000a1c) {
printf("write SRAM 4 at offset %08x: %08x (pc %08x)\n",
offset, data, sram->x49gp->env->regs[15]);
@ -532,9 +519,6 @@ sram_put_halfword(void *opaque, target_phys_addr_t offset, uint32_t data)
{
x49gp_sram_t *sram = opaque;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t)phys_ram_base + sram->offset;
#endif
data &= 0xffff;
#ifdef DEBUG_X49GP_SYSRAM_WRITE
@ -561,9 +545,6 @@ sram_put_byte(void *opaque, target_phys_addr_t offset, uint32_t data)
{
x49gp_sram_t *sram = opaque;
#ifdef QEMU_OLD
offset -= (target_phys_addr_t)phys_ram_base + sram->offset;
#endif
data &= 0xff;
#ifdef DEBUG_X49GP_SYSRAM_WRITE

10
timer.c
View file

@ -149,7 +149,7 @@ x49gp_timer_expired(x49gp_timer_t *timer_head, int64_t current_time)
return (timer_head->expires <= current_time);
}
#ifndef QEMU_OLD // LD TEMPO HACK
/* LD TEMPO HACK */
QEMUTimer *
qemu_new_timer(QEMUClock *clock, QEMUTimerCB cb, void *opaque)
@ -187,8 +187,6 @@ qemu_get_clock(QEMUClock *clock)
return x49gp_get_clock();
}
#endif /* QEMU_OLD */
static void
x49gp_run_timers(x49gp_timer_t **ptimer_head, int64_t current_time)
{
@ -218,15 +216,9 @@ x49gp_alarm_handler(int sig)
x49gp_get_clock()) ||
x49gp_timer_expired(x49gp_timer_lists[X49GP_TIMER_REALTIME],
x49gp_get_clock())) {
#ifdef QEMU_OLD
if (cpu_single_env && ! (cpu_single_env->interrupt_request & CPU_INTERRUPT_EXIT)) {
cpu_interrupt(cpu_single_env, CPU_INTERRUPT_EXIT);
}
#else
if (cpu_single_env && ! cpu_single_env->exit_request) {
cpu_exit(cpu_single_env);
}
#endif
}
}