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6957c46998
- Update to Softloat 3 from 2 - FREM and FMOD now generate the quotient bits in FPSR, required by Apple's SANE to do sin/cos/tan properly. - FMOVE of a float to a Dx integer register generates the exception status bits, fixing square roots in SANE - Rewrote how FMOVEM instructions are decoded and executed, fixing issues including skipping too few or too many opcode bytes and causing serious weird behavior. - FPU instructions all now have more realistic cycle timings for a 68881. - All FPU instructions now generate exception bits in FPSR. 3rdparty/softfloat3: Updates [R. Belmont] - Softfloat3 was always being built for a big-endian host, causing incorrect math on LE x64 and AArch64 machines. - Fixed up Softfloat3 to build properly as part of MAME and up-ported the Bochs extensions. In latest Bochs, they were only partially up-ported and Softfloat3 had been hacked up to be more like 2; here they're fixed to work with stock Softfloat3.
156 lines
5.5 KiB
C
156 lines
5.5 KiB
C
/*============================================================================
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This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
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Package, Release 3e, by John R. Hauser.
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Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
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California. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions, and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions, and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the University nor the names of its contributors may
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be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
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DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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=============================================================================*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "../source/include/softfloat.h"
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#include "../source/include/internals.h"
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#include "../source/8086/specialize.h"
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#include "fpu_constant.h"
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#include "softfloat-helpers.h"
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#include "softfloat-extra.h"
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#include "softfloat-specialize.h"
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/*----------------------------------------------------------------------------
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| Scales extended double-precision floating-point value in operand `a' by
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| value `b'. The function truncates the value in the second operand 'b' to
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| an integral value and adds that value to the exponent of the operand 'a'.
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| The operation performed according to the IEC/IEEE Standard for Binary
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| Floating-Point Arithmetic.
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*----------------------------------------------------------------------------*/
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extFloat80_t extFloat80_scale(extFloat80_t a, extFloat80_t b)
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{
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uint16_t uiA64;
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uint64_t uiA0;
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bool signA;
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int32_t expA;
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uint64_t sigA;
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uint16_t uiB64;
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uint64_t uiB0;
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bool signB;
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int32_t expB;
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uint64_t sigB;
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struct exp32_sig64 normExpSig;
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// handle unsupported extended double-precision floating encodings
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if (extF80_isUnsupported(a) || extF80_isUnsupported(b)) {
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invalid:
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softfloat_exceptionFlags |= softfloat_flag_invalid;
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return packToExtF80(defaultNaNExtF80UI64, defaultNaNExtF80UI0);
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}
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/*------------------------------------------------------------------------
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*------------------------------------------------------------------------*/
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uiA64 = a.signExp;
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uiA0 = a.signif;
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signA = signExtF80UI64(uiA64);
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expA = expExtF80UI64(uiA64);
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sigA = uiA0;
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uiB64 = b.signExp;
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uiB0 = b.signif;
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signB = signExtF80UI64(uiB64);
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expB = expExtF80UI64(uiB64);
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sigB = uiB0;
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/*------------------------------------------------------------------------
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*------------------------------------------------------------------------*/
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if (expA == 0x7FFF) {
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if ((sigA<<1) || ((expB == 0x7FFF) && (sigB<<1))) {
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const uint128 nan = softfloat_propagateNaNExtF80UI(uiA64, uiA0, uiB64, uiB0);
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extFloat80_t rv;
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rv.signExp = nan.v64;
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rv.signif = nan.v0;
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return rv;
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}
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if ((expB == 0x7FFF) && signB) goto invalid;
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if (sigB && !expB)
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softfloat_exceptionFlags |= softfloat_flag_invalid; // actally denormal
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return a;
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}
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if (expB == 0x7FFF) {
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if (sigB<<1) {
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const uint128 nan = softfloat_propagateNaNExtF80UI(uiA64, uiA0, uiB64, uiB0);
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extFloat80_t rv;
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rv.signExp = nan.v64;
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rv.signif = nan.v0;
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return rv;
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}
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if ((expA | sigA) == 0) {
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if (! signB) goto invalid;
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return a;
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}
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if (sigA && !expA)
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softfloat_exceptionFlags |= softfloat_flag_invalid; // actually denormal
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if (signB) return packToExtF80(signA, 0, 0);
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return packToExtF80(signA, 0x7FFF, uint64_t(0x8000000000000000));
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}
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if (! expA) {
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if (sigB && !expB)
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softfloat_exceptionFlags |= softfloat_flag_invalid; // actually denormal
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if (! sigA) return a;
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softfloat_exceptionFlags |= softfloat_flag_invalid; // actually denormal
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normExpSig = softfloat_normSubnormalExtF80Sig(sigA);
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expA = normExpSig.exp + 1;
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sigA = normExpSig.sig;
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if (expB < 0x3FFF)
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return softfloat_normRoundPackToExtF80(signA, expA, sigA, 0, 80);
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}
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if (!expB) {
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if (!sigB) return a;
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softfloat_exceptionFlags |= softfloat_flag_invalid; // actually denormal
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normExpSig = softfloat_normSubnormalExtF80Sig(sigB);
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expB = normExpSig.exp + 1;
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sigB = normExpSig.sig;
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}
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if (expB > 0x400E) {
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/* generate appropriate overflow/underflow */
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return softfloat_roundPackToExtF80(signA, signB ? -0x3FFF : 0x7FFF, sigA, 0, 80);
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}
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if (expB < 0x3FFF) return a;
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int shiftCount = 0x403E - expB;
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sigB >>= shiftCount;
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int32_t scale = (int32_t) sigB;
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if (signB) scale = -scale; /* -32768..32767 */
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return softfloat_roundPackToExtF80(signA, expA + scale, sigA, 0, 80);
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}
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