mirror of
https://github.com/mamedev/mame.git
synced 2024-11-18 10:06:19 +01:00
moved sm510/11/12 specifics to their own files
This commit is contained in:
hap
parent
2b8c61e22b
commit
9c8b2c6a1a
6 changed files with 254 additions and 128 deletions
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@ -1555,6 +1555,8 @@ if (CPUS["SM510"]~=null) then
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MAME_DIR .. "src/emu/cpu/sm510/sm510.c",
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MAME_DIR .. "src/emu/cpu/sm510/sm510.h",
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MAME_DIR .. "src/emu/cpu/sm510/sm510op.c",
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MAME_DIR .. "src/emu/cpu/sm510/sm510core.c",
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MAME_DIR .. "src/emu/cpu/sm510/sm511core.c",
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}
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end
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@ -2,7 +2,10 @@
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// copyright-holders:hap
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/*
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Sharp SM510 MCU family cores
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Sharp SM510 MCU family - known chips:
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- SM510: x
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- SM511: x
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- SM512: x
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References:
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- 1990 Sharp Microcomputers Data Book
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@ -15,43 +18,6 @@
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#include "sm510.h"
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#include "debugger.h"
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// MCU types
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const device_type SM510 = &device_creator<sm510_device>;
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// internal memory maps
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static ADDRESS_MAP_START(program_2_7k, AS_PROGRAM, 8, sm510_base_device)
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AM_RANGE(0x0000, 0x02af) AM_ROM
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AM_RANGE(0x0400, 0x06af) AM_ROM
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AM_RANGE(0x0800, 0x0aaf) AM_ROM
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AM_RANGE(0x0c00, 0x0eaf) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(data_96_32x4, AS_DATA, 8, sm510_base_device)
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AM_RANGE(0x00, 0x5f) AM_RAM
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AM_RANGE(0x60, 0x7f) AM_RAM
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ADDRESS_MAP_END
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// device definitions
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sm510_device::sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: sm510_base_device(mconfig, SM510, "SM510", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_2_7k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm510", __FILE__)
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{ }
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// disasm
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offs_t sm510_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
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{
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extern CPU_DISASSEMBLE(sm510);
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return CPU_DISASSEMBLE_NAME(sm510)(this, buffer, pc, oprom, opram, options);
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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@ -130,7 +96,7 @@ void sm510_base_device::device_reset()
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// execute
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//-------------------------------------------------
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inline void sm510_base_device::increment_pc()
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void sm510_base_device::increment_pc()
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{
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// PL(program counter low 6 bits) is a simple LFSR: newbit = (bit0==bit1)
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// PU,PM(high bits) specify page, PL specifies steps within page
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@ -138,17 +104,6 @@ inline void sm510_base_device::increment_pc()
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m_pc = feed | (m_pc >> 1 & 0x1f) | (m_pc & ~0x3f);
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}
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void sm510_base_device::get_opcode_param()
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{
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// LBL, TL, TML opcodes are 2 bytes
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if (m_op == 0x5f || (m_op & 0xf0) == 0x70)
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{
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m_icount--;
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m_param = m_program->read_byte(m_pc);
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increment_pc();
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}
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}
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void sm510_base_device::execute_run()
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{
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while (m_icount > 0)
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@ -170,79 +125,7 @@ void sm510_base_device::execute_run()
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m_skip = false;
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m_op = 0; // fake nop
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}
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else //execute_one();
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switch (m_op & 0xf0)
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{
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case 0x20: op_lax(); break;
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case 0x30: op_adx(); break;
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case 0x40: op_lb(); break;
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case 0x80: case 0x90: case 0xa0: case 0xb0:
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op_t(); break;
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case 0xc0: case 0xd0: case 0xe0: case 0xf0:
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op_tm(); break;
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default:
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switch (m_op & 0xfc)
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{
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case 0x04: op_rm(); break;
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case 0x0c: op_sm(); break;
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case 0x10: op_exc(); break;
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case 0x14: op_exci(); break;
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case 0x18: op_lda(); break;
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case 0x1c: op_excd(); break;
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case 0x54: op_tmi(); break;
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case 0x70: case 0x74: case 0x78: op_tl(); break;
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case 0x7c: op_tml(); break;
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default:
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switch (m_op)
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{
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case 0x00: op_skip(); break;
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case 0x01: op_atbp(); break;
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case 0x02: op_sbm(); break;
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case 0x03: op_atpl(); break;
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case 0x08: op_add(); break;
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case 0x09: op_add11(); break;
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case 0x0a: op_coma(); break;
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case 0x0b: op_exbla(); break;
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case 0x51: op_tb(); break;
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case 0x52: op_tc(); break;
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case 0x53: op_tam(); break;
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case 0x58: op_tis(); break;
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case 0x59: op_atl(); break;
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case 0x5a: op_ta0(); break;
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case 0x5b: op_tabl(); break;
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case 0x5d: op_cend(); break;
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case 0x5e: op_tal(); break;
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case 0x5f: op_lbl(); break;
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case 0x60: op_atfc(); break;
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case 0x61: op_atr(); break;
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case 0x62: op_wr(); break;
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case 0x63: op_ws(); break;
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case 0x64: op_incb(); break;
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case 0x65: op_idiv(); break;
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case 0x66: op_rc(); break;
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case 0x67: op_sc(); break;
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case 0x68: op_tf1(); break;
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case 0x69: op_tf4(); break;
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case 0x6a: op_kta(); break;
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case 0x6b: op_rot(); break;
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case 0x6c: op_decb(); break;
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case 0x6d: op_bdc(); break;
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case 0x6e: op_rtn0(); break;
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case 0x6f: op_rtn1(); break;
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default: op_illegal(); break;
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}
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break; // 0xff
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}
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break; // 0xfc
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} // big switch
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else
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execute_one();
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}
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}
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@ -49,6 +49,7 @@ protected:
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virtual UINT32 execute_input_lines() const { return 1; }
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//virtual void execute_set_input(int line, int state);
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virtual void execute_run();
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virtual void execute_one() { } // -> child class
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : NULL); }
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@ -56,7 +57,6 @@ protected:
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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address_space_config m_program_config;
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address_space_config m_data_config;
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@ -88,7 +88,7 @@ protected:
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// misc internal helpers
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void increment_pc();
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virtual void get_opcode_param();
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virtual void get_opcode_param() { } // -> child class
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UINT8 ram_r();
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void ram_w(UINT8 data);
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@ -156,14 +156,42 @@ protected:
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void op_illegal();
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};
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class sm510_device : public sm510_base_device
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{
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public:
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sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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protected:
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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virtual void execute_one();
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virtual void get_opcode_param();
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};
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class sm511_device : public sm510_base_device
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{
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public:
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sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
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protected:
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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virtual void execute_one();
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virtual void get_opcode_param();
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};
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class sm512_device : public sm511_device
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{
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public:
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sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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extern const device_type SM510;
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extern const device_type SM511;
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extern const device_type SM512;
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#endif /* _SM510_H_ */
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134
src/emu/cpu/sm510/sm510core.c
Normal file
134
src/emu/cpu/sm510/sm510core.c
Normal file
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@ -0,0 +1,134 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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/*
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Sharp SM510 MCU core implementation
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*/
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#include "sm510.h"
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#include "debugger.h"
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// MCU types
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const device_type SM510 = &device_creator<sm510_device>;
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// internal memory maps
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static ADDRESS_MAP_START(program_2_7k, AS_PROGRAM, 8, sm510_base_device)
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AM_RANGE(0x0000, 0x02af) AM_ROM
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AM_RANGE(0x0400, 0x06af) AM_ROM
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AM_RANGE(0x0800, 0x0aaf) AM_ROM
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AM_RANGE(0x0c00, 0x0eaf) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(data_96_32x4, AS_DATA, 8, sm510_base_device)
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AM_RANGE(0x00, 0x5f) AM_RAM
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AM_RANGE(0x60, 0x7f) AM_RAM
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ADDRESS_MAP_END
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// device definitions
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sm510_device::sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: sm510_base_device(mconfig, SM510, "SM510", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_2_7k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm510", __FILE__)
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{ }
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// disasm
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offs_t sm510_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
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{
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extern CPU_DISASSEMBLE(sm510);
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return CPU_DISASSEMBLE_NAME(sm510)(this, buffer, pc, oprom, opram, options);
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}
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//-------------------------------------------------
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// execute
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//-------------------------------------------------
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void sm510_device::get_opcode_param()
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{
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// LBL, TL, TML opcodes are 2 bytes
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if (m_op == 0x5f || (m_op & 0xf0) == 0x70)
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{
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m_icount--;
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m_param = m_program->read_byte(m_pc);
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increment_pc();
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}
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}
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void sm510_device::execute_one()
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{
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switch (m_op & 0xf0)
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{
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case 0x20: op_lax(); break;
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case 0x30: op_adx(); break;
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case 0x40: op_lb(); break;
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case 0x80: case 0x90: case 0xa0: case 0xb0:
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op_t(); break;
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case 0xc0: case 0xd0: case 0xe0: case 0xf0:
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op_tm(); break;
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default:
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switch (m_op & 0xfc)
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{
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case 0x04: op_rm(); break;
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case 0x0c: op_sm(); break;
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case 0x10: op_exc(); break;
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case 0x14: op_exci(); break;
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case 0x18: op_lda(); break;
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case 0x1c: op_excd(); break;
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case 0x54: op_tmi(); break;
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case 0x70: case 0x74: case 0x78: op_tl(); break;
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case 0x7c: op_tml(); break;
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default:
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switch (m_op)
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{
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case 0x00: op_skip(); break;
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case 0x01: op_atbp(); break;
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case 0x02: op_sbm(); break;
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case 0x03: op_atpl(); break;
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case 0x08: op_add(); break;
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case 0x09: op_add11(); break;
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case 0x0a: op_coma(); break;
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case 0x0b: op_exbla(); break;
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case 0x51: op_tb(); break;
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case 0x52: op_tc(); break;
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case 0x53: op_tam(); break;
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case 0x58: op_tis(); break;
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case 0x59: op_atl(); break;
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case 0x5a: op_ta0(); break;
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case 0x5b: op_tabl(); break;
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case 0x5d: op_cend(); break;
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case 0x5e: op_tal(); break;
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case 0x5f: op_lbl(); break;
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case 0x60: op_atfc(); break;
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case 0x61: op_atr(); break;
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case 0x62: op_wr(); break;
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case 0x63: op_ws(); break;
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case 0x64: op_incb(); break;
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case 0x65: op_idiv(); break;
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case 0x66: op_rc(); break;
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case 0x67: op_sc(); break;
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case 0x68: op_tf1(); break;
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case 0x69: op_tf4(); break;
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case 0x6a: op_kta(); break;
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case 0x6b: op_rot(); break;
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case 0x6c: op_decb(); break;
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case 0x6d: op_bdc(); break;
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case 0x6e: op_rtn0(); break;
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case 0x6f: op_rtn1(); break;
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default: op_illegal(); break;
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}
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break; // 0xff
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}
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break; // 0xfc
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} // big switch
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}
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@ -11,6 +11,8 @@
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#include "sm510.h"
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// common
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enum e_mnemonics
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{
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mILL,
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@ -73,6 +75,9 @@ static const INT8 s_next_pc[0x40] =
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};
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// SM510 disasm
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static const UINT8 sm510_mnemonic[0x100] =
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{
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/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
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@ -97,8 +102,6 @@ static const UINT8 sm510_mnemonic[0x100] =
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mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM // F
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};
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CPU_DISASSEMBLE(sm510)
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{
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// get raw opcode
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@ -142,3 +145,12 @@ CPU_DISASSEMBLE(sm510)
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return len | s_flags[instr] | DASMFLAG_SUPPORTED;
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}
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// SM511 disasm
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CPU_DISASSEMBLE(sm511)
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{
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return 1;
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}
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67
src/emu/cpu/sm510/sm511core.c
Normal file
67
src/emu/cpu/sm510/sm511core.c
Normal file
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@ -0,0 +1,67 @@
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// license:BSD-3-Clause
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// copyright-holders:hap
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/*
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Sharp SM511 MCU core implementation
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*/
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#include "sm510.h"
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#include "debugger.h"
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// MCU types
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const device_type SM511 = &device_creator<sm511_device>;
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const device_type SM512 = &device_creator<sm512_device>;
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// internal memory maps
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static ADDRESS_MAP_START(program_4k, AS_PROGRAM, 8, sm510_base_device)
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AM_RANGE(0x0000, 0x0fff) AM_ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(data_96_32x4, AS_DATA, 8, sm510_base_device)
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AM_RANGE(0x00, 0x5f) AM_RAM
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AM_RANGE(0x60, 0x7f) AM_RAM
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ADDRESS_MAP_END
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|
||||
static ADDRESS_MAP_START(data_80_48x4, AS_DATA, 8, sm510_base_device)
|
||||
AM_RANGE(0x00, 0x4f) AM_RAM
|
||||
AM_RANGE(0x50, 0x7f) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
// disasm
|
||||
offs_t sm511_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
|
||||
{
|
||||
extern CPU_DISASSEMBLE(sm511);
|
||||
return CPU_DISASSEMBLE_NAME(sm511)(this, buffer, pc, oprom, opram, options);
|
||||
}
|
||||
|
||||
|
||||
// device definitions
|
||||
sm511_device::sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: sm510_base_device(mconfig, SM511, "SM511", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_4k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm511", __FILE__)
|
||||
{ }
|
||||
|
||||
sm511_device::sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
|
||||
: sm510_base_device(mconfig, type, name, tag, owner, clock, stack_levels, prgwidth, program, datawidth, data, shortname, source)
|
||||
{ }
|
||||
|
||||
sm512_device::sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: sm511_device(mconfig, SM512, "SM512", tag, owner, clock, 2, 12, ADDRESS_MAP_NAME(program_4k), 7, ADDRESS_MAP_NAME(data_80_48x4), "sm512", __FILE__)
|
||||
{ }
|
||||
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// execute
|
||||
//-------------------------------------------------
|
||||
|
||||
void sm511_device::get_opcode_param()
|
||||
{
|
||||
}
|
||||
|
||||
void sm511_device::execute_one()
|
||||
{
|
||||
}
|
||||
Loading…
Reference in a new issue