diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 324d6910bd4..fba4b569059 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -1555,6 +1555,8 @@ if (CPUS["SM510"]~=null) then MAME_DIR .. "src/emu/cpu/sm510/sm510.c", MAME_DIR .. "src/emu/cpu/sm510/sm510.h", MAME_DIR .. "src/emu/cpu/sm510/sm510op.c", + MAME_DIR .. "src/emu/cpu/sm510/sm510core.c", + MAME_DIR .. "src/emu/cpu/sm510/sm511core.c", } end diff --git a/src/emu/cpu/sm510/sm510.c b/src/emu/cpu/sm510/sm510.c index 502eb41b7f6..ca8db4635f7 100644 --- a/src/emu/cpu/sm510/sm510.c +++ b/src/emu/cpu/sm510/sm510.c @@ -2,7 +2,10 @@ // copyright-holders:hap /* - Sharp SM510 MCU family cores + Sharp SM510 MCU family - known chips: + - SM510: x + - SM511: x + - SM512: x References: - 1990 Sharp Microcomputers Data Book @@ -15,43 +18,6 @@ #include "sm510.h" #include "debugger.h" -// MCU types - -const device_type SM510 = &device_creator; - - -// internal memory maps -static ADDRESS_MAP_START(program_2_7k, AS_PROGRAM, 8, sm510_base_device) - AM_RANGE(0x0000, 0x02af) AM_ROM - AM_RANGE(0x0400, 0x06af) AM_ROM - AM_RANGE(0x0800, 0x0aaf) AM_ROM - AM_RANGE(0x0c00, 0x0eaf) AM_ROM -ADDRESS_MAP_END - - -static ADDRESS_MAP_START(data_96_32x4, AS_DATA, 8, sm510_base_device) - AM_RANGE(0x00, 0x5f) AM_RAM - AM_RANGE(0x60, 0x7f) AM_RAM -ADDRESS_MAP_END - - - -// device definitions - -sm510_device::sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : sm510_base_device(mconfig, SM510, "SM510", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_2_7k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm510", __FILE__) -{ } - - - -// disasm -offs_t sm510_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) -{ - extern CPU_DISASSEMBLE(sm510); - return CPU_DISASSEMBLE_NAME(sm510)(this, buffer, pc, oprom, opram, options); -} - - //------------------------------------------------- // device_start - device-specific startup @@ -130,7 +96,7 @@ void sm510_base_device::device_reset() // execute //------------------------------------------------- -inline void sm510_base_device::increment_pc() +void sm510_base_device::increment_pc() { // PL(program counter low 6 bits) is a simple LFSR: newbit = (bit0==bit1) // PU,PM(high bits) specify page, PL specifies steps within page @@ -138,17 +104,6 @@ inline void sm510_base_device::increment_pc() m_pc = feed | (m_pc >> 1 & 0x1f) | (m_pc & ~0x3f); } -void sm510_base_device::get_opcode_param() -{ - // LBL, TL, TML opcodes are 2 bytes - if (m_op == 0x5f || (m_op & 0xf0) == 0x70) - { - m_icount--; - m_param = m_program->read_byte(m_pc); - increment_pc(); - } -} - void sm510_base_device::execute_run() { while (m_icount > 0) @@ -170,79 +125,7 @@ void sm510_base_device::execute_run() m_skip = false; m_op = 0; // fake nop } - else //execute_one(); - - switch (m_op & 0xf0) - { - case 0x20: op_lax(); break; - case 0x30: op_adx(); break; - case 0x40: op_lb(); break; - - case 0x80: case 0x90: case 0xa0: case 0xb0: - op_t(); break; - case 0xc0: case 0xd0: case 0xe0: case 0xf0: - op_tm(); break; - - default: - switch (m_op & 0xfc) - { - case 0x04: op_rm(); break; - case 0x0c: op_sm(); break; - case 0x10: op_exc(); break; - case 0x14: op_exci(); break; - case 0x18: op_lda(); break; - case 0x1c: op_excd(); break; - case 0x54: op_tmi(); break; - case 0x70: case 0x74: case 0x78: op_tl(); break; - case 0x7c: op_tml(); break; - - default: - switch (m_op) - { - case 0x00: op_skip(); break; - case 0x01: op_atbp(); break; - case 0x02: op_sbm(); break; - case 0x03: op_atpl(); break; - case 0x08: op_add(); break; - case 0x09: op_add11(); break; - case 0x0a: op_coma(); break; - case 0x0b: op_exbla(); break; - - case 0x51: op_tb(); break; - case 0x52: op_tc(); break; - case 0x53: op_tam(); break; - case 0x58: op_tis(); break; - case 0x59: op_atl(); break; - case 0x5a: op_ta0(); break; - case 0x5b: op_tabl(); break; - case 0x5d: op_cend(); break; - case 0x5e: op_tal(); break; - case 0x5f: op_lbl(); break; - - case 0x60: op_atfc(); break; - case 0x61: op_atr(); break; - case 0x62: op_wr(); break; - case 0x63: op_ws(); break; - case 0x64: op_incb(); break; - case 0x65: op_idiv(); break; - case 0x66: op_rc(); break; - case 0x67: op_sc(); break; - case 0x68: op_tf1(); break; - case 0x69: op_tf4(); break; - case 0x6a: op_kta(); break; - case 0x6b: op_rot(); break; - case 0x6c: op_decb(); break; - case 0x6d: op_bdc(); break; - case 0x6e: op_rtn0(); break; - case 0x6f: op_rtn1(); break; - - default: op_illegal(); break; - } - break; // 0xff - - } - break; // 0xfc - - } // big switch + else + execute_one(); } } diff --git a/src/emu/cpu/sm510/sm510.h b/src/emu/cpu/sm510/sm510.h index 379bc13c314..0b37d76eef3 100644 --- a/src/emu/cpu/sm510/sm510.h +++ b/src/emu/cpu/sm510/sm510.h @@ -49,6 +49,7 @@ protected: virtual UINT32 execute_input_lines() const { return 1; } //virtual void execute_set_input(int line, int state); virtual void execute_run(); + virtual void execute_one() { } // -> child class // device_memory_interface overrides virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : NULL); } @@ -56,7 +57,6 @@ protected: // device_disasm_interface overrides virtual UINT32 disasm_min_opcode_bytes() const { return 1; } virtual UINT32 disasm_max_opcode_bytes() const { return 2; } - virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); address_space_config m_program_config; address_space_config m_data_config; @@ -88,7 +88,7 @@ protected: // misc internal helpers void increment_pc(); - virtual void get_opcode_param(); + virtual void get_opcode_param() { } // -> child class UINT8 ram_r(); void ram_w(UINT8 data); @@ -156,14 +156,42 @@ protected: void op_illegal(); }; + class sm510_device : public sm510_base_device { public: sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + +protected: + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); + virtual void execute_one(); + virtual void get_opcode_param(); }; +class sm511_device : public sm510_base_device +{ +public: + sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source); + +protected: + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); + virtual void execute_one(); + virtual void get_opcode_param(); +}; + +class sm512_device : public sm511_device +{ +public: + sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); +}; + + + extern const device_type SM510; +extern const device_type SM511; +extern const device_type SM512; #endif /* _SM510_H_ */ diff --git a/src/emu/cpu/sm510/sm510core.c b/src/emu/cpu/sm510/sm510core.c new file mode 100644 index 00000000000..791c44f4a24 --- /dev/null +++ b/src/emu/cpu/sm510/sm510core.c @@ -0,0 +1,134 @@ +// license:BSD-3-Clause +// copyright-holders:hap +/* + + Sharp SM510 MCU core implementation + +*/ + +#include "sm510.h" +#include "debugger.h" + + +// MCU types +const device_type SM510 = &device_creator; + + +// internal memory maps +static ADDRESS_MAP_START(program_2_7k, AS_PROGRAM, 8, sm510_base_device) + AM_RANGE(0x0000, 0x02af) AM_ROM + AM_RANGE(0x0400, 0x06af) AM_ROM + AM_RANGE(0x0800, 0x0aaf) AM_ROM + AM_RANGE(0x0c00, 0x0eaf) AM_ROM +ADDRESS_MAP_END + +static ADDRESS_MAP_START(data_96_32x4, AS_DATA, 8, sm510_base_device) + AM_RANGE(0x00, 0x5f) AM_RAM + AM_RANGE(0x60, 0x7f) AM_RAM +ADDRESS_MAP_END + + +// device definitions +sm510_device::sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : sm510_base_device(mconfig, SM510, "SM510", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_2_7k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm510", __FILE__) +{ } + + +// disasm +offs_t sm510_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) +{ + extern CPU_DISASSEMBLE(sm510); + return CPU_DISASSEMBLE_NAME(sm510)(this, buffer, pc, oprom, opram, options); +} + + +//------------------------------------------------- +// execute +//------------------------------------------------- + +void sm510_device::get_opcode_param() +{ + // LBL, TL, TML opcodes are 2 bytes + if (m_op == 0x5f || (m_op & 0xf0) == 0x70) + { + m_icount--; + m_param = m_program->read_byte(m_pc); + increment_pc(); + } +} + +void sm510_device::execute_one() +{ + switch (m_op & 0xf0) + { + case 0x20: op_lax(); break; + case 0x30: op_adx(); break; + case 0x40: op_lb(); break; + + case 0x80: case 0x90: case 0xa0: case 0xb0: + op_t(); break; + case 0xc0: case 0xd0: case 0xe0: case 0xf0: + op_tm(); break; + + default: + switch (m_op & 0xfc) + { + case 0x04: op_rm(); break; + case 0x0c: op_sm(); break; + case 0x10: op_exc(); break; + case 0x14: op_exci(); break; + case 0x18: op_lda(); break; + case 0x1c: op_excd(); break; + case 0x54: op_tmi(); break; + case 0x70: case 0x74: case 0x78: op_tl(); break; + case 0x7c: op_tml(); break; + + default: + switch (m_op) + { + case 0x00: op_skip(); break; + case 0x01: op_atbp(); break; + case 0x02: op_sbm(); break; + case 0x03: op_atpl(); break; + case 0x08: op_add(); break; + case 0x09: op_add11(); break; + case 0x0a: op_coma(); break; + case 0x0b: op_exbla(); break; + + case 0x51: op_tb(); break; + case 0x52: op_tc(); break; + case 0x53: op_tam(); break; + case 0x58: op_tis(); break; + case 0x59: op_atl(); break; + case 0x5a: op_ta0(); break; + case 0x5b: op_tabl(); break; + case 0x5d: op_cend(); break; + case 0x5e: op_tal(); break; + case 0x5f: op_lbl(); break; + + case 0x60: op_atfc(); break; + case 0x61: op_atr(); break; + case 0x62: op_wr(); break; + case 0x63: op_ws(); break; + case 0x64: op_incb(); break; + case 0x65: op_idiv(); break; + case 0x66: op_rc(); break; + case 0x67: op_sc(); break; + case 0x68: op_tf1(); break; + case 0x69: op_tf4(); break; + case 0x6a: op_kta(); break; + case 0x6b: op_rot(); break; + case 0x6c: op_decb(); break; + case 0x6d: op_bdc(); break; + case 0x6e: op_rtn0(); break; + case 0x6f: op_rtn1(); break; + + default: op_illegal(); break; + } + break; // 0xff + + } + break; // 0xfc + + } // big switch +} diff --git a/src/emu/cpu/sm510/sm510d.c b/src/emu/cpu/sm510/sm510d.c index dffd5e1530c..43651e52015 100644 --- a/src/emu/cpu/sm510/sm510d.c +++ b/src/emu/cpu/sm510/sm510d.c @@ -11,6 +11,8 @@ #include "sm510.h" +// common + enum e_mnemonics { mILL, @@ -73,6 +75,9 @@ static const INT8 s_next_pc[0x40] = }; + +// SM510 disasm + static const UINT8 sm510_mnemonic[0x100] = { /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ @@ -97,8 +102,6 @@ static const UINT8 sm510_mnemonic[0x100] = mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM // F }; - - CPU_DISASSEMBLE(sm510) { // get raw opcode @@ -142,3 +145,12 @@ CPU_DISASSEMBLE(sm510) return len | s_flags[instr] | DASMFLAG_SUPPORTED; } + + + +// SM511 disasm + +CPU_DISASSEMBLE(sm511) +{ + return 1; +} diff --git a/src/emu/cpu/sm510/sm511core.c b/src/emu/cpu/sm510/sm511core.c new file mode 100644 index 00000000000..237e5b72d7b --- /dev/null +++ b/src/emu/cpu/sm510/sm511core.c @@ -0,0 +1,67 @@ +// license:BSD-3-Clause +// copyright-holders:hap +/* + + Sharp SM511 MCU core implementation + +*/ + +#include "sm510.h" +#include "debugger.h" + + +// MCU types +const device_type SM511 = &device_creator; +const device_type SM512 = &device_creator; + + +// internal memory maps +static ADDRESS_MAP_START(program_4k, AS_PROGRAM, 8, sm510_base_device) + AM_RANGE(0x0000, 0x0fff) AM_ROM +ADDRESS_MAP_END + +static ADDRESS_MAP_START(data_96_32x4, AS_DATA, 8, sm510_base_device) + AM_RANGE(0x00, 0x5f) AM_RAM + AM_RANGE(0x60, 0x7f) AM_RAM +ADDRESS_MAP_END + +static ADDRESS_MAP_START(data_80_48x4, AS_DATA, 8, sm510_base_device) + AM_RANGE(0x00, 0x4f) AM_RAM + AM_RANGE(0x50, 0x7f) AM_RAM +ADDRESS_MAP_END + + +// disasm +offs_t sm511_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) +{ + extern CPU_DISASSEMBLE(sm511); + return CPU_DISASSEMBLE_NAME(sm511)(this, buffer, pc, oprom, opram, options); +} + + +// device definitions +sm511_device::sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : sm510_base_device(mconfig, SM511, "SM511", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_4k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm511", __FILE__) +{ } + +sm511_device::sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source) + : sm510_base_device(mconfig, type, name, tag, owner, clock, stack_levels, prgwidth, program, datawidth, data, shortname, source) +{ } + +sm512_device::sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : sm511_device(mconfig, SM512, "SM512", tag, owner, clock, 2, 12, ADDRESS_MAP_NAME(program_4k), 7, ADDRESS_MAP_NAME(data_80_48x4), "sm512", __FILE__) +{ } + + + +//------------------------------------------------- +// execute +//------------------------------------------------- + +void sm511_device::get_opcode_param() +{ +} + +void sm511_device::execute_one() +{ +}