mirror of
https://github.com/sxpert/hp-saturn
synced 2024-12-24 21:59:33 +01:00
Mirror of https://github.com/sxpert/hp-saturn
c62d562008
in the same cycle as the instruction modify the way jump and rtn are handled add some registers to the debugger |
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|---|---|---|
| attic | ||
| .gitignore | ||
| check.sh | ||
| compile | ||
| empty_lfe5u-85f.config | ||
| gen_rom_hex.py | ||
| ico | ||
| icoboard.pcf | ||
| make_saturn.ESP5.ys | ||
| make_saturn.ICE40.ys | ||
| Makefile | ||
| README.md | ||
| rom-gx-r.hex | ||
| run.sh | ||
| saturn_alu_module.v | ||
| saturn_bus.v | ||
| saturn_bus_controller.v | ||
| saturn_control_unit.v | ||
| saturn_debugger.v | ||
| saturn_def_alu.v | ||
| saturn_def_buscmd.v | ||
| saturn_def_debugger.v | ||
| saturn_hp48gx_rom.v | ||
| saturn_inst_decoder.v | ||
| saturn_regs_pc_rstk.v | ||
| saturn_serial.v | ||
| saturn_top.v | ||
| ulx3s_v20.lpf | ||
| view | ||
| z_test_rom-1.hex | ||
| z_test_rom-2.hex | ||
Verilog implementation of the HP saturn processor
licence: GPLv3 or later
timings:
___________
reset: |____________________________________________________
____ ____ ____ ____ ____ ____
clk : ____| |____| |____| |____| |____| |____| |____
_________ _________ _________ _________ _________
counter: ______________/____0____X____1____X____2____X____3____X____0____
_________ _________
phase_0: ______________| |_____________________________|
_________
phase_1: ________________________| |_____________________________
_________
phase_2: __________________________________| |___________________
_________
phase_3: ____________________________________________| |_________
notes for using the ULX3S
Maybe linux ujprog won't find port because of insufficient priviledge. Either run ujprog as root or have udev rule:# this is for usb-serial tty device
SUBSYSTEM=="tty", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015",
MODE="664", GROUP="dialout"
this is for ujprog libusb access
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015",
GROUP="dialout", MODE="666"