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19 lines
395 B
Verilog
19 lines
395 B
Verilog
/******************************************************************************
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* 3n[xxxxxx] LC (n) [xxxxxx]
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*
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*
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*/
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`include "decstates.v"
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`include "fields.v"
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`DEC_LC: begin
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alu_first <= P;
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alu_last <= (P + nb_in) & 4'hF;
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alu_reg_src1 <= `ALU_REG_M;
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alu_reg_dest <= `ALU_REG_C;
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alu_op <= `ALU_OP_COPY;
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decstate <= `DEC_ALU_INIT;
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alu_return <= `DEC_START;
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end
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