| .. |
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0x.v
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implement more stuff
|
2019-02-08 00:02:55 +01:00 |
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1[45]_memaccess_decode.v
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entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
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1[45]_memaccess_exec.v
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entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
|
1Bnnnnn_D0_EQ_5n.v
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entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
|
1x.v
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entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
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2n_P_EQ_n.v
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entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
|
03_RTNCC.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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3n[x...]_LC.v
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entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
|
04_SETHEX.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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05_SETDEC.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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6xxx_GOTO.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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8[45]n_ST_EQ_[01]_n.v
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implement more instructions, catch errors
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2019-02-07 23:31:35 +01:00 |
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8[DF]xxxxx_GO.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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8x.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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80A_RESET.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
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80Cn_C_EQ_P_n.v
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implement more instructions, catch errors
|
2019-02-07 23:31:35 +01:00 |
|
80x.v
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implement more stuff
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2019-02-08 00:02:55 +01:00 |
|
82x_CLRHST.v
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implement more stuff
|
2019-02-08 00:02:55 +01:00 |
|
805_CONFIG.v
|
entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
|
A[ab]x.v
|
entirely redesign the state machine
|
2019-02-07 22:54:06 +01:00 |
