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16 lines
301 B
Verilog
16 lines
301 B
Verilog
/******************************************************************************
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* 805 CONFIG
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*
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*
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*/
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`include "decstates.v"
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`DEC_CONFIG: begin
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execute_cycle <= 0;
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decstate <= `DEC_START;
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`ifdef SIM
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$display("%05h CONFIG\t\t\t<= NOT IMPLEMENTED YET", inst_start_PC);
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`endif
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end
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