mirror of
https://github.com/sxpert/hp-saturn
synced 2024-12-29 10:23:22 +01:00
396 lines
No EOL
9.8 KiB
Verilog
396 lines
No EOL
9.8 KiB
Verilog
`ifndef _SATURN_BUS_CTRL
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`define _SATURN_BUS_CTRL
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`include "def-clocks.v"
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`include "def-buscmd.v"
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module saturn_bus_ctrl (
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// basic stuff
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i_clk,
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i_reset,
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i_cycle_ctr,
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i_en_bus_send,
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i_en_bus_recv,
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i_en_bus_ecmd,
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i_stalled,
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i_read_stall,
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o_stalled_by_bus,
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// bus i/o
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i_bus_data,
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o_bus_data,
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o_bus_strobe,
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o_bus_cmd_data,
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// interface to the rest of the machine
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i_alu_pc,
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i_address,
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i_load_pc,
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i_cmd_load_dp,
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i_read_pc,
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i_cmd_dp_write,
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i_cmd_reset,
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i_cmd_config,
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i_nibble,
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o_nibble
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);
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input wire [0:0] i_clk;
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input wire [0:0] i_reset;
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input wire [31:0] i_cycle_ctr;
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input wire [0:0] i_en_bus_send;
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input wire [0:0] i_en_bus_recv;
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input wire [0:0] i_en_bus_ecmd;
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input wire [0:0] i_stalled;
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input wire [0:0] i_read_stall;
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output reg [0:0] o_stalled_by_bus;
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input wire [3:0] i_bus_data;
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output reg [3:0] o_bus_data;
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output reg [0:0] o_bus_strobe;
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output reg [0:0] o_bus_cmd_data;
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input wire [19:0] i_alu_pc;
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input wire [19:0] i_address;
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input wire [0:0] i_load_pc;
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input wire [0:0] i_cmd_load_dp;
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input wire [0:0] i_read_pc;
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input wire [0:0] i_cmd_dp_write;
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input wire [0:0] i_cmd_reset;
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input wire [0:0] i_cmd_config;
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input wire [3:0] i_nibble;
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output reg [3:0] o_nibble;
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/*
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* events
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*/
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wire en_bus_send;
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assign en_bus_send = i_en_bus_send && !i_stalled;
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wire en_bus_recv;
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assign en_bus_recv = i_en_bus_recv && !i_stalled;
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wire en_bus_ecmd;
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assign en_bus_ecmd = i_en_bus_ecmd && !i_stalled;
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/*
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* states
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*/
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wire [0:0] addr_s;
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assign addr_s = addr_cnt == 5;
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reg [0:0] cmd_pc_read_s;
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reg [0:0] cmd_dp_write_s;
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reg [0:0] cmd_load_dp_s;
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reg [0:0] cmd_config_s;
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reg [0:0] cmd_reset_s;
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wire [0:0] do_cmd_pc_read;
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wire [0:0] do_display_stalled;
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wire [0:0] do_cmd_load_dp;
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wire [0:0] do_cmd_dp_write;
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wire [0:0] do_dp_write_data;
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wire [0:0] do_pc_read_after_dp_write;
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wire [0:0] cmd_load_dp_dp_write_uc;
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wire [0:0] do_cmd_config;
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wire [0:0] do_pc_read_after_config;
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wire [0:0] cmd_config_sc;
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wire [0:0] cmd_config_uc;
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wire [0:0] do_cmd_reset;
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wire [0:0] do_pc_read_after_reset;
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wire [0:0] cmd_reset_sc;
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wire [0:0] cmd_reset_uc;
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wire [0:0] do_unstall;
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assign do_cmd_load_dp = i_cmd_load_dp && !cmd_load_dp_s;
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assign do_cmd_dp_write = i_cmd_dp_write && cmd_load_dp_s && addr_s && !cmd_dp_write_s;
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assign do_dp_write_data = i_cmd_dp_write && cmd_load_dp_s && addr_s && cmd_dp_write_s;
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assign do_pc_read_after_dp_write = !i_cmd_dp_write && cmd_load_dp_s && cmd_dp_write_s;
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assign cmd_load_dp_dp_write_uc = cmd_load_dp_s && cmd_dp_write_s && cmd_pc_read_s;
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assign do_cmd_config = i_cmd_config && !cmd_config_s;
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assign do_pc_read_after_config = i_cmd_config && cmd_config_s && addr_s;
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assign cmd_config_sc = !o_stalled_by_bus && i_cmd_config && !cmd_config_s;
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assign cmd_config_uc = cmd_config_s && cmd_pc_read_s;
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assign do_cmd_reset = i_cmd_reset && !cmd_reset_s;
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assign do_pc_read_after_reset = i_cmd_reset && cmd_reset_s;
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assign cmd_reset_sc = !o_stalled_by_bus && i_cmd_reset && !cmd_reset_s;
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assign cmd_reset_uc = cmd_reset_s && cmd_pc_read_s;
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assign do_cmd_pc_read = !cmd_pc_read_s &&
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(do_pc_read_after_dp_write ||
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do_pc_read_after_config ||
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do_pc_read_after_reset);
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assign do_display_stalled = i_read_stall && !o_stalled_by_bus &&
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!(do_cmd_pc_read ||
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do_cmd_dp_write ||
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do_dp_write_data ||
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do_pc_read_after_dp_write);
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assign do_unstall = cmd_load_dp_dp_write_uc ||
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cmd_config_uc ||
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cmd_reset_uc;
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/*
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* test rom...
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*/
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`ifdef SIM
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`define ROMBITS 20
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`else
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`define ROMBITS 10
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`endif
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reg [3:0] rom [0:2**`ROMBITS-1];
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initial begin
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`ifdef SIM
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$readmemh("rom-gx-r.hex", rom);
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// $readmemh( "testrom-2.hex", rom);
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// $monitor("addr %5h | strb %b | c/d %b | cnt %0d | odata %h | idata %h",
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// i_address, o_bus_strobe, o_bus_cmd_data, addr_cnt, o_bus_data, i_bus_data);
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// $monitor("MONITOR : strb %b | o_bus_data %h | i_bus_data %h", o_bus_strobe, o_bus_data, i_bus_data);
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// $monitor("MONITOR : i_cmd_dp_write %b | cmd_load_dp_s %b | addr_s %b | dp_write_reset %b",
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// i_cmd_dp_write, cmd_load_dp_s, addr_s, cmd_load_dp_dp_write_uc);
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`endif
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end
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reg [3:0] last_cmd;
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reg [2:0] addr_cnt;
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reg [0:0] send_addr;
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reg [19:0] local_pc;
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reg [19:0] local_dp;
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reg [0:0] reset_sent;
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reg [0:0] config_sent;
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reg [0:0] send_pc_read;
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always @(posedge i_clk) begin
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if (i_reset) begin
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last_cmd <= 0;
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o_stalled_by_bus <= 0;
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o_bus_strobe <= 0;
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o_bus_cmd_data <= 1; // 1 is the default level
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addr_cnt <= 0;
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send_addr <= 0;
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reset_sent <= 0;
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config_sent <= 0;
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send_pc_read <= 0;
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cmd_pc_read_s <= 0;
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cmd_dp_write_s <= 0;
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cmd_load_dp_s <= 0;
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cmd_config_s <= 0;
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cmd_reset_s <= 0;
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end
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/*
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*
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* sending commands or data to the bus
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*
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*/
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if (en_bus_send) begin
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/*
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* reset flags
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*/
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if (do_unstall) begin
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cmd_pc_read_s <= 0;
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cmd_dp_write_s <= 0;
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cmd_load_dp_s <= 0;
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cmd_config_s <= 0;
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cmd_reset_s <= 0;
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end
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/*
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* send the PC_READ command to restore the instruction flow
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* after a data transfer
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*/
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if (do_cmd_pc_read) begin
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$display("BUS_SEND %0d: [%d] PC_READ", `PH_BUS_SEND, i_cycle_ctr);
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o_bus_data <= `BUSCMD_PC_READ;
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last_cmd <= `BUSCMD_PC_READ;
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cmd_pc_read_s <= 1;
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o_bus_strobe <= 1;
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end
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if ((last_cmd == `BUSCMD_PC_READ) && !i_read_stall)
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o_bus_strobe <= 1;
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if (do_cmd_dp_write) begin
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$display("BUS_SEND %0d: [%d] DP_WRITE", `PH_BUS_SEND, i_cycle_ctr);
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o_bus_data <= `BUSCMD_DP_WRITE;
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last_cmd <= `BUSCMD_DP_WRITE;
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cmd_dp_write_s <= 1;
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o_bus_strobe <= 1;
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end
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/*
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* Sending LOAD_PC or LOAD_DP
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*/
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if (i_load_pc) begin
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$display("BUS_SEND %0d: [%d] LOAD_PC %h", `PH_BUS_SEND, i_cycle_ctr, i_address);
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o_bus_data <= `BUSCMD_LOAD_PC;
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last_cmd <= `BUSCMD_LOAD_PC;
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end
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if (do_cmd_load_dp) begin
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$display("BUS_SEND %0d: [%d] LOAD_DP %h", `PH_BUS_SEND, i_cycle_ctr, i_address);
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o_bus_data <= `BUSCMD_LOAD_DP;
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last_cmd <= `BUSCMD_LOAD_DP;
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cmd_load_dp_s <= 1;
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end
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if (do_cmd_config) begin
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$display("BUS_SEND %0d: [%d] CONFIGURE %h", `PH_BUS_SEND, i_cycle_ctr, i_address);
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o_bus_data <= `BUSCMD_CONFIGURE;
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last_cmd <= `BUSCMD_CONFIGURE;
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cmd_config_s <= 1;
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end
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if (do_cmd_reset) begin
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$display("BUS_SEND %0d: [%d] RESET", `PH_BUS_SEND, i_cycle_ctr);
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o_bus_data <= `BUSCMD_RESET;
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last_cmd <= `BUSCMD_RESET;
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cmd_reset_s <= 1;
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o_bus_strobe <= 1;
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end
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// configure loop to send i_address to the bus
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// used for LOAD_PC, LOAD_DP, CONFIGURE,
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if (i_load_pc || do_cmd_load_dp || do_cmd_config) begin
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o_stalled_by_bus <= 1;
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o_bus_cmd_data <= 0;
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addr_cnt <= 0;
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send_addr <= 1;
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o_bus_strobe <= 1;
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end
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// sending address bits
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if (send_addr) begin
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$display("BUS_SEND %0d: [%d] addr[%0d] %h =>",
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`PH_BUS_SEND, i_cycle_ctr, addr_cnt, i_address[addr_cnt*4+:4]);
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o_bus_data <= i_address[addr_cnt*4+:4];
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addr_cnt <= addr_cnt + 1;
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o_bus_strobe <= 1;
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end
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/*
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* writing data to the bus,
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* send DP_WRITE first if necessary
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*/
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if (do_dp_write_data) begin
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if (last_cmd != `BUSCMD_DP_WRITE) begin
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end else begin
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$display("BUS_SEND %0d: [%d] WRITE %h =>", `PH_BUS_SEND, i_cycle_ctr, i_nibble);
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o_bus_data <= i_nibble;
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o_bus_strobe <= 1;
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end
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end
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end
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/*
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*
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* reading data from the bus
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*
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*/
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if (en_bus_recv) begin
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if (!i_read_stall)
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case (last_cmd)
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`BUSCMD_PC_READ: begin
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$display("BUS_RECV %0d: [%d] <= READ [%5h] %h", `PH_BUS_RECV, i_cycle_ctr, local_pc, rom[local_pc[`ROMBITS-1:0]]);
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o_nibble <= rom[local_pc[`ROMBITS-1:0]];
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local_pc <= local_pc + 1;
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end
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endcase
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if (do_display_stalled) begin
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$display("BUS_RECV %0d: [%d] STALLED", `PH_BUS_RECV, i_cycle_ctr);
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end
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/*
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*
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* resets the bus automatically
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*
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*/
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o_bus_strobe <= 0;
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o_bus_cmd_data <= 1;
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end
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if (en_bus_ecmd) begin
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// stalling and unstalling stuff
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if (cmd_reset_sc)
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o_stalled_by_bus <= 1;
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if (cmd_config_sc) begin
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o_stalled_by_bus <= 1;
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end
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if (do_unstall) begin
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o_stalled_by_bus <= 0;
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addr_cnt <= 0;
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end
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if (addr_s) begin
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send_addr <= 0;
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end
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// command automatic switchover
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case (last_cmd)
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`BUSCMD_LOAD_PC,
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`BUSCMD_LOAD_DP:
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if (send_addr && (addr_cnt == 5)) begin
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// reset the addr count for next time
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$display("BUS_ECMD %0d: [%d] <= %s_READ mode",
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`PH_BUS_ECMD, i_cycle_ctr,
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(last_cmd == `BUSCMD_LOAD_PC)?"PC":"DP");
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last_cmd <= (last_cmd == `BUSCMD_LOAD_PC)?`BUSCMD_PC_READ:`BUSCMD_DP_READ;
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case (last_cmd)
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`BUSCMD_LOAD_PC: local_pc <= i_address;
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`BUSCMD_LOAD_DP: local_dp <= i_address;
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endcase
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send_addr <= 0;
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o_stalled_by_bus <= 0;
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end
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`BUSCMD_PC_READ: begin end
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`BUSCMD_DP_WRITE: begin end
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`BUSCMD_CONFIGURE: begin end
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`BUSCMD_RESET: begin end
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default: $display("------------ UNHANDLED BUSCMD %h", last_cmd);
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endcase
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end
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end
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endmodule
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`endif |