843 lines
22 KiB
C
843 lines
22 KiB
C
/* -------------------------------------------------------------------------
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saturn - A poor-man's emulator of some HP calculators
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Copyright (C) 1998-2000 Ivan Cibrario Bertolotti
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with the documentation of this program; if not, write to
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the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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For more information, please contact the author, preferably by email,
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at the following address:
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Ivan Cibrario Bertolotti
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IRITI - National Research Council
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c/o IEN "Galileo Ferraris"
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Strada delle Cacce, 91
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10135 - Torino (ITALY)
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email: cibrario@iriti.cnr.it
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------------------------------------------------------------------------- */
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/* +-+ */
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/* .+
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.identifier : $Id: romram49.c,v 4.1 2000/12/11 09:54:19 cibrario Rel $
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.context : SATURN, Saturn CPU / HPxx emulator
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.title : $RCSfile: romram49.c,v $
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.kind : C source
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.author : Ivan Cibrario B.
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.site : CSTV-CNR
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.creation : 21-Sep-2000
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.keywords : *
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.description :
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This module emulates the Internal Flash Rom/Ram peripheral modules of
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the HP49.
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Known deficiencies of the current Flash ROM emulation:
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- for efficiency reasons, the Flash ROM state machine is bypassed
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when the Flash is read through the ROM controller.
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- see flash49.h for additional, more specific information about
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Flash ROM emulation issues.
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References:
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Guide to the Saturn Processor Rev. 1.0b by Matthew Mastracci
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HP49 Memory Explained, USENET post, by Steve Sousa.
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Emu48 Service Pack 20, by Christoph Giesselink.
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28F160S5/28F320S5 Data Sheet, by Intel Corp.
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.include : config.h, machdep.h, cpu.h, modules.h
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.notes :
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$Log: romram49.c,v $
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Revision 4.1 2000/12/11 09:54:19 cibrario
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Public release.
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Revision 3.10 2000/10/24 16:14:55 cibrario
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Added/Replaced GPL header
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Revision 3.4 2000/09/27 10:05:55 cibrario
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Bug fix: MP bit of HST no longer set in Ce2Init49() and NCe3Init49(),
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to avoid spurious warmstarts of the HP39/40 firmware.
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* Revision 3.3 2000/09/26 14:56:43 cibrario
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* Revised to implement Flash ROM write access:
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* - mod_status_49 is no longer static; flash49.c needs access to the
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* Flash ROM array.
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* - implemented RomSave49(), RomWrite49().
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* - NCe3 controller now accesses the Flash ROM when the LCR_LED bit is set;
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* address translation is done here, the actual access is revectored to
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* FlashRead49() and FlashWrite49(). Notice that the NCe3 controller
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* must be registered with the MOD_MAP_FLAGS_ABS bit set in its map_flags.
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*
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* Revision 3.2 2000/09/22 14:48:13 cibrario
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* *** empty log message ***
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*
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.- */
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#ifndef lint
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static char rcs_id[] = "$Id: romram49.c,v 4.1 2000/12/11 09:54:19 cibrario Rel $";
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#endif
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#include <stdio.h>
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#include <stdlib.h>
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#include <setjmp.h>
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#include <string.h>
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#include <unistd.h> /* access() */
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#include <errno.h>
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#include "config.h"
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#include "machdep.h"
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#include "cpu.h"
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#include "modules.h"
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#include "flash49.h"
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#include "disk_io.h"
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#include "debug.h"
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#include "args.h"
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#define CHF_MODULE_ID MOD_CHF_MODULE_ID
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#include <Chf.h>
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#define FLASH_VIEW_SELECTOR 0x40000
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#define FLASH_BANK_MASK 0x3FFFF
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#define CE2_RAM_OFFSET 0x80000
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#define NCE3_RAM_OFFSET 0xC0000
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#define NCE3_RAM_MASK 0x3FFFF
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#define HDW_LCR_OFFSET 0x1C
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#define LCR_LED 0x8
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/* 3.3: This is no longer static, because flash49.c needs access to
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the Flash ROM array... yes, I know this is not particularly nice,
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*/
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struct ModStatus_49* mod_status_49;
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/*---------------------------------------------------------------------------
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Rom module
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---------------------------------------------------------------------------*/
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/* .+
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.title : RomInit49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function allocates the dynamically-allocated portion of the
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module status structure, and initializes the Flash Rom module.
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.call :
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RomInit49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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MOD_F_ROM_INIT
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MOD_F_MOD_STATUS_ALLOC
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void RomInit49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RomInit49" );
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if ( ( mod_status_49 = ( struct ModStatus_49* )malloc( sizeof( struct ModStatus_49 ) ) ) == ( struct ModStatus_49* )NULL ) {
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ChfErrnoCondition;
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ChfCondition MOD_F_MOD_STATUS_ALLOC, CHF_FATAL, sizeof( struct ModStatus_49 ) ChfEnd;
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ChfSignal();
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}
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if ( ReadNibblesFromFile( args.rom_file_name, N_FLASH_SIZE_49, mod_status_49->flash ) ) {
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ChfCondition MOD_F_ROM_INIT, CHF_FATAL ChfEnd;
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ChfSignal();
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}
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}
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/* .+
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.title : RomSave49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function saves the status of the Flash Rom.
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.call :
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RomSave49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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MOD_E_ROM_SAVE
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.notes :
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3.2, 21-Sep-2000, creation
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3.3, 25-Sep-2000, implemented
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.- */
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void RomSave49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RomSave49" );
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if ( WriteNibblesToFile( mod_status_49->flash, N_FLASH_SIZE_49, args.rom_file_name ) ) {
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ChfErrnoCondition;
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ChfCondition MOD_E_ROM_SAVE, CHF_ERROR ChfEnd;
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ChfSignal();
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}
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}
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/* .+
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.title : RomRead49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function reads a nibble from the internal Flash Rom address
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'rel_address' and returns it.
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.call :
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d = RomRead49(rel_address);
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.input :
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Address rel_address, memory address
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.output :
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Nibble *d, datum read from memory
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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Nibble RomRead49( Address rel_address )
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{
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register XAddress view;
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RomRead49" );
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view = mod_status.hdw.accel.a49.view[ ( rel_address & FLASH_VIEW_SELECTOR ) != 0 ];
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return mod_status_49->flash[ view | ( rel_address & FLASH_BANK_MASK ) ];
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}
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/* .+
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.title : RomWrite49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function writes the nibble 'datum' into the address 'rel_address'
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of the internal RAM.
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Flash ROM cannot be written using the ROM controller; however,
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the current (1.19-4) HP49 firmware apparently executes ROM
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write cycles through this controller when the ON key is pressed.
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Those cycles are silently ignored.
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.call :
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RomWrite49(rel_address, datum);
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.input :
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Address rel_address, memory address
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Nibble datum, datum to be written into memory
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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3.3, 26-Sep-2000, implemented
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.- */
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void RomWrite49( Address rel_address, Nibble datum )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RomWrite49" );
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/* Ignore write cycles through ROM controller; HP49 ROM 1.19-4
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can do this when to ON key is pressed.
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*/
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}
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/*---------------------------------------------------------------------------
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Main Ram module
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---------------------------------------------------------------------------*/
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/* .+
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.title : RamInit49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function initializes the Ram module.
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.call :
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RamInit49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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MOD_W_RAM_INIT
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void RamInit49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RamInit49" );
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if ( ReadNibblesFromFile( args.ram_file_name, N_RAM_SIZE_49, mod_status_49->ram ) ) {
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ChfCondition MOD_W_RAM_INIT, CHF_WARNING ChfEnd;
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ChfSignal();
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( void )memset( mod_status_49->ram, 0, sizeof( mod_status_49->ram ) );
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}
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}
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/* .+
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.title : RamSave49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function saves the status of the Ram module to disk.
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.call :
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RamSave49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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MOD_E_RAM_SAVE
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void RamSave49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RamSave49" );
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if ( WriteNibblesToFile( mod_status_49->ram, N_RAM_SIZE_49, args.ram_file_name ) ) {
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ChfErrnoCondition;
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ChfCondition MOD_E_RAM_SAVE, CHF_ERROR ChfEnd;
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ChfSignal();
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}
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}
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/* .+
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.title : RamRead49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function reads a nibble from the internal RAM address 'rel_address'
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and returns it.
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.call :
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d = RamRead49(rel_address);
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.input :
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Address rel_address, memory address
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.output :
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Nibble *d, datum read from memory
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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Nibble RamRead49( Address rel_address )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RamRead49" );
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return mod_status_49->ram[ rel_address ];
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}
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/* .+
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.title : RamWrite49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function writes the nibble 'datum' into the address 'rel_address'
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of the internal RAM.
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.call :
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RamWrite49(rel_address, datum);
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.input :
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Address rel_address, memory address
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Nibble datum, datum to be written into memory
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void RamWrite49( Address rel_address, Nibble datum )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "RamWrite49" );
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mod_status_49->ram[ rel_address ] = datum;
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}
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/*---------------------------------------------------------------------------
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Ce1 module
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---------------------------------------------------------------------------*/
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/* .+
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.title : Ce1Init49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function initializes the Ce1 module, corresponding to the
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Back Switcher.
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.call :
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Ce1Init49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void Ce1Init49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce1Init49" );
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/* Check if bank-switcher accelerators are valid; if not, initialize
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them to a reasonable value (that is, select Flash Rom bank 0 for
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both views).
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*/
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if ( !mod_status.hdw.accel_valid ) {
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mod_status.hdw.accel_valid = 1;
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mod_status.hdw.accel.a49.view[ 0 ] = mod_status.hdw.accel.a49.view[ 1 ] = ( XAddress )0;
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}
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}
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/* .+
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.title : Ce1Save49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function saves the status of the Ce1 module.
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.call :
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Ce1Save49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void Ce1Save49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce1Save49" );
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/* Nothing to be done here; the bank-switcher accelerators are saved
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by the hdw modules
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*/
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}
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/* This fragment of code is used by both Ce1Read49() and Ce1Write49();
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the macro definition is here to allow us to write the code once and
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use it many times without incurring a function call overhead.
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*/
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#define Ce1SetViews \
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{ \
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mod_status.hdw.accel.a49.view[ 0 ] = ( ( XAddress )( ( rel_address >> 5 ) & 0x03 ) << 18 ); \
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\
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mod_status.hdw.accel.a49.view[ 1 ] = ( ( XAddress )( ( rel_address >> 1 ) & 0x0F ) << 18 ); \
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}
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/* .+
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.title : Ce1Read49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function reads a nibble from the Ce1 module; the address of
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the access cycle is converted into a pair of XAddress
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(base addresses of Flash Rom views) and saved into
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mod_status_hdw.accel.a49.view[]. They will be used to supply the
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most significant bits of addresses when accessing Flash Rom.
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.call :
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d = Ce1Read49(rel_address);
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.input :
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Address rel_address, memory address
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.output :
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Nibble *d, datum read from memory
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.status_codes :
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MOD_I_CALLED
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MOD_I_BS_ADDRESS
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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Nibble Ce1Read49( Address rel_address )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce1Read49" );
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debug1( DEBUG_C_MODULES, MOD_I_BS_ADDRESS, rel_address );
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/* Save the ROM view base addresses address into the hdw accelerators.
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view[] can be directly or-ed with a relative port address to
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obtain a valid index in Flash Rom.
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*/
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Ce1SetViews;
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return ( Nibble )0x0;
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}
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/* .+
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.title : Ce1Write49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function reads a nibble from the Ce1 module; the address of
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the access cycle is converted into a pair of XAddress
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(base addresses of Flash Rom views) and saved into
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mod_status_hdw.accel.a49.view[]. They will be used to supply the
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most significant bits of addresses when accessing Flash Rom.
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.call :
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Ce1Write49(rel_address, datum);
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.input :
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Address rel_address, memory address
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Nibble datum, datum to be written into memory; ignored
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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MOD_I_BS_ADDRESS
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void Ce1Write49( Address rel_address, Nibble datum )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce1Write49" );
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debug1( DEBUG_C_MODULES, MOD_I_BS_ADDRESS, rel_address );
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/* Save the ROM view base addresses address into the hdw accelerators.
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view[] can be directly or-ed with a relative port address to
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obtain a valid index in Flash Rom.
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*/
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Ce1SetViews;
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}
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/*---------------------------------------------------------------------------
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Ce2 module
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---------------------------------------------------------------------------*/
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/* .+
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.title : Ce2Init49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function initializes the Ce2 module, corresponding to
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the first bank of ERAM.
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.call :
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Ce2Init49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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3.4, 27-Sep-2000, update:
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- MP bit in HST no longer set, to avoid spurious warmstarts of the
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HP39/40 firmware.
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.- */
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void Ce2Init49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce2Init49" );
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/* Set base of ce2 area */
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mod_status_49->ce2 = mod_status_49->ram + CE2_RAM_OFFSET;
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/* CE2 always present and write enabled */
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mod_status.hdw.card_status |= ( CE2_CARD_PRESENT | CE2_CARD_WE );
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#if 0
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/* card_status changed; update, set MP bit in HST and post
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interrupt request.
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*/
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cpu_status.HST |= HST_MP_MASK;
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CpuIntRequest(INT_REQUEST_IRQ);
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#endif
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}
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/* .+
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.title : Ce2Save49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function saves the status of the Ce2 module.
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.call :
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Ce2Save49();
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.input :
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void
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void Ce2Save49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce2Save49" );
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/* Do nothing; the whole RAM is saved by RamSave49() */
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}
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/* .+
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.title : Ce2Read49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function reads a nibble from the Ce2 module.
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.call :
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d = Ce2Read49(rel_address)
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.input :
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Address rel_address, memory address
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.output :
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Nibble *d, datum read from memory
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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Nibble Ce2Read49( Address rel_address )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce2Read49" );
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return mod_status_49->ce2[ rel_address ];
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}
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/* .+
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.title : Ce2Write49
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.kind : C function
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.creation : 21-Sep-2000
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.description :
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This function writes a nibble to the Ce2 module.
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.call :
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Ce2Write49(rel_address, datum);
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.input :
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Address rel_address, memory address
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Nibble datum, datum to be written into memory
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.output :
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void
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.status_codes :
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MOD_I_CALLED
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.notes :
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3.2, 21-Sep-2000, creation
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.- */
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void Ce2Write49( Address rel_address, Nibble datum )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "Ce2Write49" );
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mod_status_49->ce2[ rel_address ] = datum;
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}
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/*---------------------------------------------------------------------------
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NCe3 module
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---------------------------------------------------------------------------*/
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/* .+
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.title : NCe3Init49
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.kind : C function
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|
.creation : 21-Sep-2000
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.description :
|
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This function initializes the Ce2 module, corresponding to
|
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the first bank of ERAM.
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.call :
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NCe3Init49();
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.input :
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void
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.output :
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void
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.status_codes :
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|
MOD_I_CALLED
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.notes :
|
|
3.2, 21-Sep-2000, creation
|
|
3.4, 27-Sep-2000, update:
|
|
- MP bit in HST no longer set, to avoid spurious warmstarts of the
|
|
HP39/40 firmware.
|
|
|
|
.- */
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void NCe3Init49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "NCe3Init49" );
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/* Set base of nce3 area */
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mod_status_49->nce3 = mod_status_49->ram + NCE3_RAM_OFFSET;
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/* NCE3 always present and write enabled */
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mod_status.hdw.card_status |= ( NCE3_CARD_PRESENT | NCE3_CARD_WE );
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|
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#if 0
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/* card_status changed; update, set MP bit in HST and post
|
|
interrupt request.
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*/
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cpu_status.HST |= HST_MP_MASK;
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CpuIntRequest(INT_REQUEST_IRQ);
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#endif
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}
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/* .+
|
|
|
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.title : NCe3Save49
|
|
.kind : C function
|
|
.creation : 21-Sep-2000
|
|
.description :
|
|
This function saves the status of the NCe3 module.
|
|
|
|
.call :
|
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NCe3Save49();
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.input :
|
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void
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.output :
|
|
void
|
|
.status_codes :
|
|
MOD_I_CALLED
|
|
.notes :
|
|
3.2, 21-Sep-2000, creation
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|
|
|
.- */
|
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void NCe3Save49( void )
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{
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "NCe3Save49" );
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|
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/* Do nothing; the whole RAM is saved by RamSave49() */
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}
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|
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/* .+
|
|
|
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.title : NCe3Read49
|
|
.kind : C function
|
|
.creation : 21-Sep-2000
|
|
.description :
|
|
This function reads a nibble from the NCe3 module.
|
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If LCR_LED bit is not set, data comes from ERAM Bank 1, if LCR_LED is set,
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|
data comes from the Flash ROM.
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|
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In both cases, address translation is done here.
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This module must have the MOD_MAP_FLAGS_ABS set in
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|
its mod_description[].map_flags; this way, rel_address will be
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|
the ABSOLUTE address of the memory access.
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|
|
|
.call :
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d = NCe3Read49(rel_address)
|
|
.input :
|
|
Address rel_address, memory address (ABSOLUTE)
|
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.output :
|
|
Nibble *d, datum read from memory
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|
.status_codes :
|
|
MOD_I_CALLED
|
|
.notes :
|
|
3.2, 21-Sep-2000, creation
|
|
3.3, 25-Sep-2000, update
|
|
- added vectors into flash49 for FlashROM read ops
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|
|
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.- */
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Nibble NCe3Read49( Address rel_address )
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{
|
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debug1( DEBUG_C_TRACE, MOD_I_CALLED, "NCe3Read49" );
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|
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return ( mod_status.hdw.hdw[ HDW_LCR_OFFSET ] & LCR_LED )
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|
? FlashRead49( mod_status.hdw.accel.a49.view[ ( rel_address & FLASH_VIEW_SELECTOR ) != 0 ] |
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|
( rel_address & FLASH_BANK_MASK ) )
|
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: mod_status_49->nce3[ rel_address & NCE3_RAM_MASK ];
|
|
}
|
|
|
|
/* .+
|
|
|
|
.title : NCe3Write49
|
|
.kind : C function
|
|
.creation : 21-Sep-2000
|
|
.description :
|
|
This function writes a nibble to the NCe3 module.
|
|
If LCR_LED bit is not set, data goes to ERAM Bank 1, if LCR_LED is set,
|
|
data goes to the Flash ROM.
|
|
|
|
In both cases, address translation is done here.
|
|
|
|
This module must have the MOD_MAP_FLAGS_ABS set in
|
|
its mod_description[].map_flags; this way, rel_address will be
|
|
the ABSOLUTE address of the memory access.
|
|
|
|
|
|
.call :
|
|
NCe3Write49(rel_address, datum);
|
|
.input :
|
|
Address rel_address, memory address (ABSOLUTE)
|
|
Nibble datum, datum to be written into memory
|
|
.output :
|
|
void
|
|
.status_codes :
|
|
MOD_I_CALLED
|
|
.notes :
|
|
3.2, 21-Sep-2000, creation
|
|
3.3, 25-Sep-2000, update
|
|
- added vectors into flash49 for FlashROM write ops
|
|
|
|
.- */
|
|
void NCe3Write49( Address rel_address, Nibble datum )
|
|
{
|
|
debug1( DEBUG_C_TRACE, MOD_I_CALLED, "NCe3Write49" );
|
|
|
|
if ( mod_status.hdw.hdw[ HDW_LCR_OFFSET ] & LCR_LED )
|
|
FlashWrite49( mod_status.hdw.accel.a49.view[ ( rel_address & FLASH_VIEW_SELECTOR ) != 0 ] | ( rel_address & FLASH_BANK_MASK ),
|
|
datum );
|
|
else
|
|
mod_status_49->nce3[ rel_address & NCE3_RAM_MASK ] = datum;
|
|
}
|