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fa1412a6c8
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fa1412a6c8 | ||
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47027c375f | ||
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5f90d54c5e |
3 changed files with 252 additions and 249 deletions
137
src/cpu.c
137
src/cpu.c
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@ -1563,43 +1563,10 @@ static void ExecGroup_0( void )
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}
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}
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}
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}
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/* Instruction Group_1 */
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/* Instruction Group_13 */
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static void ExecGroup_1( void )
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static void ExecGroup_13( void )
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{
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{
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Nibble n = FetchNibble( cpu_status.PC++ );
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Nibble f;
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int rn, ac;
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int oc, is;
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Address ta;
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Address ta;
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecGroup_1" );
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switch ( n ) {
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case 0: /* Rn=A/C */
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n = FetchNibble( cpu_status.PC++ );
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rn = GET_Rn( n );
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ac = GET_AC( n );
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CopyRR( cpu_status.R[ rn ], ( ac ? cpu_status.C : cpu_status.A ), FS_W );
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break;
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case 1: /* A/C=Rn */
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n = FetchNibble( cpu_status.PC++ );
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rn = GET_Rn( n );
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ac = GET_AC( n );
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CopyRR( ( ac ? cpu_status.C : cpu_status.A ), cpu_status.R[ rn ], FS_W );
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break;
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case 2:
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/* ARnEX, CRnEX */
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n = FetchNibble( cpu_status.PC++ );
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rn = GET_Rn( n );
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ac = GET_AC( n );
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ExchRR( ( ac ? cpu_status.C : cpu_status.A ), cpu_status.R[ rn ], FS_W );
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break;
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case 3:
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/* Copy/Exchange A/C and D0/D1 */
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/* Copy/Exchange A/C and D0/D1 */
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switch ( FetchNibble( cpu_status.PC++ ) ) {
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switch ( FetchNibble( cpu_status.PC++ ) ) {
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case 0: /* D0=A */
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case 0: /* D0=A */
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@ -1682,9 +1649,11 @@ static void ExecGroup_1( void )
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Addr2RS( cpu_status.C, ta );
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Addr2RS( cpu_status.C, ta );
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break;
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break;
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}
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}
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break;
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}
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case 4:
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/* Instruction Group_14 */
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static void ExecGroup_14( void )
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{
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/* Load/Store A/C to @D0/@D1, Field selector A or B */
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/* Load/Store A/C to @D0/@D1, Field selector A or B */
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switch ( FetchNibble( cpu_status.PC++ ) ) {
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switch ( FetchNibble( cpu_status.PC++ ) ) {
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case 0: /* DAT0=A A */
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case 0: /* DAT0=A A */
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@ -1751,14 +1720,16 @@ static void ExecGroup_1( void )
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ReadDAT( cpu_status.C, cpu_status.D1, FS_B );
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ReadDAT( cpu_status.C, cpu_status.D1, FS_B );
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break;
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break;
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}
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}
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break;
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}
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case 5:
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/* Instruction Group_15 */
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static void ExecGroup_15( void )
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{
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/* Load/Store A/C to @D0/@D1, Other Field Selectors */
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/* Load/Store A/C to @D0/@D1, Other Field Selectors */
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n = FetchNibble( cpu_status.PC++ );
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Nibble n = FetchNibble( cpu_status.PC++ );
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f = FetchNibble( cpu_status.PC++ );
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Nibble f = FetchNibble( cpu_status.PC++ );
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oc = GET_OC_3b( n );
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int oc = GET_OC_3b( n );
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is = GET_IMMEDIATE_FS_FLAG( n );
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int is = GET_IMMEDIATE_FS_FLAG( n );
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switch ( oc ) {
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switch ( oc ) {
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case 0: /* DAT0=A */
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case 0: /* DAT0=A */
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@ -1822,67 +1793,102 @@ static void ExecGroup_1( void )
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ChfSignal( CPU_CHF_MODULE_ID );
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ChfSignal( CPU_CHF_MODULE_ID );
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break;
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break;
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}
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}
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}
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/* Instruction Group_1 */
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static void ExecGroup_1( void )
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{
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Nibble n = FetchNibble( cpu_status.PC++ );
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int rn, ac;
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Address ta;
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecGroup_1" );
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switch ( n ) {
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case 0: /* Rn=A/C */
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n = FetchNibble( cpu_status.PC++ );
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rn = GET_Rn( n );
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ac = GET_AC( n );
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CopyRR( cpu_status.R[ rn ], ( ac ? cpu_status.C : cpu_status.A ), FS_W );
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break;
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break;
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case 6:
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case 1: /* A/C=Rn */
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/* D0=D0+n+1 */
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n = FetchNibble( cpu_status.PC++ );
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rn = GET_Rn( n );
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ac = GET_AC( n );
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CopyRR( ( ac ? cpu_status.C : cpu_status.A ), cpu_status.R[ rn ], FS_W );
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break;
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case 2: /* ARnEX, CRnEX */
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n = FetchNibble( cpu_status.PC++ );
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rn = GET_Rn( n );
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ac = GET_AC( n );
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ExchRR( ( ac ? cpu_status.C : cpu_status.A ), cpu_status.R[ rn ], FS_W );
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break;
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case 3:
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ExecGroup_13();
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break;
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case 4:
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ExecGroup_14();
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break;
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case 5:
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ExecGroup_15();
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break;
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case 6: /* D0=D0+n+1 */
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n = FetchNibble( cpu_status.PC++ );
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n = FetchNibble( cpu_status.PC++ );
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ta = ( cpu_status.D0 + n + 1 ) & ADDRESS_MASK;
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ta = ( cpu_status.D0 + n + 1 ) & ADDRESS_MASK;
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cpu_status.carry = ( ta < cpu_status.D0 );
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cpu_status.carry = ( ta < cpu_status.D0 );
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cpu_status.D0 = ta;
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cpu_status.D0 = ta;
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break;
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break;
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case 7:
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case 7: /* D1=D1+n+1 */
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/* D1=D1+n+1 */
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n = FetchNibble( cpu_status.PC++ );
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n = FetchNibble( cpu_status.PC++ );
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ta = ( cpu_status.D1 + n + 1 ) & ADDRESS_MASK;
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ta = ( cpu_status.D1 + n + 1 ) & ADDRESS_MASK;
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cpu_status.carry = ( ta < cpu_status.D1 );
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cpu_status.carry = ( ta < cpu_status.D1 );
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cpu_status.D1 = ta;
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cpu_status.D1 = ta;
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break;
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break;
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case 8:
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case 8: /* D0=D0-(n+1) */
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/* D0=D0-(n+1) */
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n = FetchNibble( cpu_status.PC++ );
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n = FetchNibble( cpu_status.PC++ );
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ta = ( cpu_status.D0 - n - 1 ) & ADDRESS_MASK;
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ta = ( cpu_status.D0 - n - 1 ) & ADDRESS_MASK;
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cpu_status.carry = ( ta > cpu_status.D0 );
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cpu_status.carry = ( ta > cpu_status.D0 );
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cpu_status.D0 = ta;
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cpu_status.D0 = ta;
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break;
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break;
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case 9:
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case 9: /* D0=(2) nn */
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/* D0=(2) nn */
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FetchD( &cpu_status.D0, 2 );
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FetchD( &cpu_status.D0, 2 );
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break;
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break;
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case 0xA:
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case 0xA: /* D0=(4) nn */
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/* D0=(4) nn */
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FetchD( &cpu_status.D0, 4 );
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FetchD( &cpu_status.D0, 4 );
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break;
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break;
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case 0xB:
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case 0xB: /* D0=(5) nn */
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/* D0=(5) nn */
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FetchD( &cpu_status.D0, 5 );
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FetchD( &cpu_status.D0, 5 );
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break;
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break;
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case 0xC:
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case 0xC: /* D1=D1-(n+1) */
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/* D1=D1-(n+1) */
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n = FetchNibble( cpu_status.PC++ );
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n = FetchNibble( cpu_status.PC++ );
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ta = ( cpu_status.D1 - n - 1 ) & ADDRESS_MASK;
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ta = ( cpu_status.D1 - n - 1 ) & ADDRESS_MASK;
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cpu_status.carry = ( ta > cpu_status.D1 );
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cpu_status.carry = ( ta > cpu_status.D1 );
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cpu_status.D1 = ta;
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cpu_status.D1 = ta;
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break;
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break;
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case 0xD:
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case 0xD: /* D1=(2) nn */
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/* D1=(2) nn */
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FetchD( &cpu_status.D1, 2 );
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FetchD( &cpu_status.D1, 2 );
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break;
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break;
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case 0xE:
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case 0xE: /* D1=(4) nn */
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/* D1=(4) nn */
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FetchD( &cpu_status.D1, 4 );
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FetchD( &cpu_status.D1, 4 );
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break;
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break;
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case 0xF:
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case 0xF: /* D1=(5) nn */
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/* D1=(5) nn */
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FetchD( &cpu_status.D1, 5 );
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FetchD( &cpu_status.D1, 5 );
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break;
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break;
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@ -1997,12 +2003,13 @@ static void ExecGroup_808( void )
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/* Instruction Group_80 */
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/* Instruction Group_80 */
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static void ExecGroup_80B( void )
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static void ExecGroup_80B( void )
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{
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{
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecBUSCC" );
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// FIXME: 49g bugs here on display change
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// FIXME: 49g bugs here on display change
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// DEBUG_print_cpu_instruction();
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// DEBUG_print_cpu_instruction();
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ChfGenerate( CPU_CHF_MODULE_ID, __FILE__, __LINE__, CPU_F_INTERR, CHF_WARNING, "BUSCC" );
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ChfGenerate( CPU_CHF_MODULE_ID, __FILE__, __LINE__, CPU_F_INTERR, CHF_WARNING, "BUSCC not implemented" );
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ChfSignal( CPU_CHF_MODULE_ID );
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ChfSignal( CPU_CHF_MODULE_ID );
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecGroup_80B" );
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}
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}
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/* Instruction Group_80 */
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/* Instruction Group_80 */
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@ -161,9 +161,7 @@ static Address Get5NibblesAbs( Address pc )
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*/
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*/
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static Address DisHexConstant( Address start, char* ob, int m )
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static Address DisHexConstant( Address start, char* ob, int m )
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{
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{
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int i;
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for ( int i = 0; i < m; i++ )
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for ( i = 0; i < m; i++ )
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strcat( ob, hex_digit[ ( int )FetchNibble( start + m - i - 1 ) ] );
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strcat( ob, hex_digit[ ( int )FetchNibble( start + m - i - 1 ) ] );
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return start + m;
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return start + m;
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@ -2213,14 +2211,12 @@ static Address DisGroup_8( Address pc, char* ob )
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.- */
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.- */
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Address Disassemble( Address pc, char ob[ DISASSEMBLE_OB_SIZE ] )
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Address Disassemble( Address pc, char ob[ DISASSEMBLE_OB_SIZE ] )
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{
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{
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Nibble n;
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/* Disassemble current program counter */
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/* Disassemble current program counter */
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sprintf( ob, "A_%05X\t", pc );
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sprintf( ob, "A_%05X\t", pc );
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ob += strlen( ob );
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ob += strlen( ob );
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/* Get first instruction nibble */
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/* Get first instruction nibble */
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n = FetchNibble( pc++ );
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Nibble n = FetchNibble( pc++ );
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switch ( n ) {
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switch ( n ) {
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case 0:
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case 0:
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@ -328,7 +328,7 @@ config_t* config_init( int argc, char* argv[] )
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switch ( c ) {
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switch ( c ) {
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case 'h':
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case 'h':
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fprintf( stderr, help_text, config.progname );
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fprintf( stdout, help_text, config.progname );
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exit( EXIT_SUCCESS );
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exit( EXIT_SUCCESS );
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break;
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break;
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case 6110:
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case 6110:
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