Compare commits

...

4 commits

Author SHA1 Message Date
Gwenhael Le Moine
aa944ceead
use --debug-opcodes to print instruction in identified buggy cases 2024-10-09 14:07:24 +02:00
Gwenhael Le Moine
c9739ff601
typo 2024-10-09 14:07:09 +02:00
Gwenhael Le Moine
c765e78ab5
style 2024-10-09 14:06:58 +02:00
Gwenhael Le Moine
4467e3dcf3
inline some instructions 2024-10-09 14:06:24 +02:00
6 changed files with 43 additions and 48 deletions

View file

@ -316,36 +316,6 @@ static void Addr2RS( Nibble* d, Address a )
d[ 3 ] = ( Nibble )( a & NIBBLE_MASK );
}
/* Copy the 12 low-order bits of ST into C */
static void St2C( void )
{
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "St2C" );
cpu_status.C[ 0 ] = ( Nibble )( cpu_status.ST & NIBBLE_MASK );
cpu_status.C[ 1 ] = ( Nibble )( ( cpu_status.ST >> 4 ) & NIBBLE_MASK );
cpu_status.C[ 2 ] = ( Nibble )( ( cpu_status.ST >> 8 ) & NIBBLE_MASK );
}
/* Copy the 12 low-order bits of C into ST */
static void C2St( void )
{
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "C2St" );
cpu_status.ST = ( ProgramStatusRegister )cpu_status.C[ 0 ] | ( ( ProgramStatusRegister )cpu_status.C[ 1 ] << 4 ) |
( ( ProgramStatusRegister )cpu_status.C[ 2 ] << 8 ) | ( cpu_status.ST & CLRST_MASK );
}
/* Exchange the 12 low-order bits of C with the 12 low-order bits of ST */
static void CStExch( void )
{
ProgramStatusRegister tst = cpu_status.ST;
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "CStExch" );
cpu_status.ST = ( ProgramStatusRegister )cpu_status.C[ 0 ] | ( ( ProgramStatusRegister )cpu_status.C[ 1 ] << 4 ) |
( ( ProgramStatusRegister )cpu_status.C[ 2 ] << 8 ) | ( cpu_status.ST & CLRST_MASK );
cpu_status.C[ 0 ] = ( Nibble )( tst & NIBBLE_MASK );
cpu_status.C[ 1 ] = ( Nibble )( ( tst >> 4 ) & NIBBLE_MASK );
cpu_status.C[ 2 ] = ( Nibble )( ( tst >> 8 ) & NIBBLE_MASK );
}
/*---------------------------------------------------------------------------
Private functions: data memory read/write
---------------------------------------------------------------------------*/
@ -1473,7 +1443,6 @@ static void ExecGroup_0( void )
Nibble n = GetNibble( cpu_status.PC++ );
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecGroup_0" );
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
switch ( n ) {
case 0: /* RTNSXM */
cpu_status.HST |= HST_XM_MASK;
@ -1515,15 +1484,32 @@ static void ExecGroup_0( void )
break;
case 9: /* C=ST */
St2C();
/* Copy the 12 low-order bits of ST into C */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "St2C" );
cpu_status.C[ 0 ] = ( Nibble )( cpu_status.ST & NIBBLE_MASK );
cpu_status.C[ 1 ] = ( Nibble )( ( cpu_status.ST >> 4 ) & NIBBLE_MASK );
cpu_status.C[ 2 ] = ( Nibble )( ( cpu_status.ST >> 8 ) & NIBBLE_MASK );
break;
case 0xA: /* ST=C */
C2St();
/* Copy the 12 low-order bits of C into ST */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "C2St" );
cpu_status.ST = ( ProgramStatusRegister )cpu_status.C[ 0 ] | ( ( ProgramStatusRegister )cpu_status.C[ 1 ] << 4 ) |
( ( ProgramStatusRegister )cpu_status.C[ 2 ] << 8 ) | ( cpu_status.ST & CLRST_MASK );
break;
case 0xB: /* CSTEX */
CStExch();
/* Exchange the 12 low-order bits of C with the 12 low-order bits of ST */
{
ProgramStatusRegister tst = cpu_status.ST;
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "CStExch" );
cpu_status.ST = ( ProgramStatusRegister )cpu_status.C[ 0 ] | ( ( ProgramStatusRegister )cpu_status.C[ 1 ] << 4 ) |
( ( ProgramStatusRegister )cpu_status.C[ 2 ] << 8 ) | ( cpu_status.ST & CLRST_MASK );
cpu_status.C[ 0 ] = ( Nibble )( tst & NIBBLE_MASK );
cpu_status.C[ 1 ] = ( Nibble )( ( tst >> 4 ) & NIBBLE_MASK );
cpu_status.C[ 2 ] = ( Nibble )( ( tst >> 8 ) & NIBBLE_MASK );
}
break;
case 0xC: /* P=P+1 */
@ -1590,7 +1576,6 @@ static void ExecGroup_1( void )
Address ta;
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecGroup_1" );
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
switch ( n ) {
case 0: /* Rn=A/C */
n = GetNibble( cpu_status.PC++ );
@ -2072,6 +2057,8 @@ static void ExecGroup_80( void )
case 0xB: /* BUSCC */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecBUSCC" );
// FIXME: 49g bugs here on display change
DEBUG_print_cpu_instruction();
ChfGenerate( CPU_CHF_MODULE_ID, __FILE__, __LINE__, CPU_F_INTERR, CHF_WARNING, "BUSCC" );
ChfSignal( CPU_CHF_MODULE_ID );
break;
@ -2787,9 +2774,9 @@ void DumpCpuStatus( char ob[ DUMP_CPU_STATUS_OB_SIZE ] )
char dob[ DISASSEMBLE_OB_SIZE ];
int n;
/* Dump PC and current instruction */
/* Dump PC and current instruction */
( void )Disassemble( cpu_status.PC, dob );
sprintf( ob, "%s\n\n", dob );
sprintf( ob, "\n%s\n\n", dob );
ob += strlen( ob );
/* Dump A, B, C, D */
@ -2824,6 +2811,17 @@ void DumpCpuStatus( char ob[ DUMP_CPU_STATUS_OB_SIZE ] )
ob += strlen( ob );
}
void DEBUG_print_cpu_instruction( void )
{
if ( config.debug_level > 0 && config.debug_level & DEBUG_C_OPCODES ) {
char dob[ DISASSEMBLE_OB_SIZE ];
/* Dump PC and current instruction */
( void )Disassemble( cpu_status.PC, dob );
fprintf( stderr, "\n%s\n\n", dob );
}
}
/* .+
.title : OneStep
@ -2869,17 +2867,14 @@ void OneStep( void )
break;
case 2: /* P=n */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
SetP( GetNibble( cpu_status.PC++ ) );
break;
case 3: /* LC(m) n...n */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
FetchR( cpu_status.C, GetNibble( cpu_status.PC++ ) );
break;
case 4: /* RTNC/GOC */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
if ( cpu_status.carry ) {
offset = Get2Nibbles2C( cpu_status.PC );
if ( offset == 0 )
@ -2892,7 +2887,6 @@ void OneStep( void )
break;
case 5: /* RTNNC/GONC */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
if ( !cpu_status.carry ) {
offset = Get2Nibbles2C( cpu_status.PC );
if ( offset == 0 )
@ -2905,12 +2899,10 @@ void OneStep( void )
break;
case 6: /* GOTO */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
cpu_status.PC += Get3Nibbles2C( cpu_status.PC );
break;
case 7: /* GOSUB */
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
offset = Get3Nibbles2C( cpu_status.PC );
cpu_status.PC += 3;
PushRSTK( cpu_status.PC );
@ -2950,7 +2942,6 @@ void OneStep( void )
break;
default:
debug1( CPU_CHF_MODULE_ID, DEBUG_C_OPCODES, CPU_I_EXECUTING, n );
ChfGenerate( CPU_CHF_MODULE_ID, __FILE__, __LINE__, CPU_E_BAD_OPCODE, CHF_ERROR, cpu_status.PC, n );
ChfSignal( CPU_CHF_MODULE_ID );
break;

View file

@ -335,5 +335,6 @@ int CpuHaltAllowed( void ); /* 3.13 */
Address Disassemble( Address pc, char ob[ DISASSEMBLE_OB_SIZE ] ); /* dis.c */
void DumpCpuStatus( char ob[ DUMP_CPU_STATUS_OB_SIZE ] );
void DEBUG_print_cpu_instruction( void );
#endif /*!_CPU_H*/

View file

@ -151,7 +151,7 @@ static Address Get4Nibbles2C( Address pc )
return ( v & 0x8000 ) ? v - 0x10000 : v;
}
/* Read four nibbles in absolute form, starting from pc */
/* Read five nibbles in absolute form, starting from pc */
static Address Get5NibblesAbs( Address pc )
{
Address v = ( Address )GetNibble( pc ) | ( ( Address )GetNibble( pc + 1 ) << 4 ) | ( ( Address )GetNibble( pc + 2 ) << 8 ) |

View file

@ -1251,6 +1251,8 @@ void ModConfig( Address config_info )
if ( mod == N_MOD ) {
/* All modules are configured - Signal a warning */
// FIXME: 48gx bugs here when running VERSION
DEBUG_print_cpu_instruction();
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_W_BAD_CONFIG, CHF_WARNING, config_info );
ChfSignal( MOD_CHF_MODULE_ID );
} else {

View file

@ -287,8 +287,7 @@ static int InvokeCommand( char* tk )
/* Print help information */
static int Help( void )
{
int i;
for ( i = 0; i < ( int )TableSize( table ); i++ )
for ( int i = 0; i < ( int )TableSize( table ); i++ )
printf( "%s\t\t%s\n", table[ i ].name, table[ i ].desc );
return OK;
@ -335,7 +334,7 @@ void Monitor( void )
signal( SIGINT, sigint_handler );
/* Infinite loop; it's exited only when a condition is signalled */
while ( 1 ) {
while ( true ) {
/* Write prompt */
fputs( PROMPT, stdout );
fflush( stdout );

View file

@ -233,6 +233,8 @@ void RomWrite( Address rel_address, Nibble datum )
debug1( MOD_CHF_MODULE_ID, DEBUG_C_TRACE, MOD_I_CALLED, "RomWrite" );
// FIXME: 48gx: saturn48gx-Mid <12>d (src/romram.c,235)-E-Write into ROM A[1B632] D[9]
DEBUG_print_cpu_instruction();
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_E_ROM_WRITE, CHF_ERROR, rel_address, datum );
ChfSignal( MOD_CHF_MODULE_ID );
}