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2076cfd1c9
Author | SHA1 | Date | |
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2076cfd1c9 | ||
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90b23a8613 |
5 changed files with 183 additions and 187 deletions
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@ -2057,7 +2057,7 @@ static void ExecGroup_80( void )
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case 0xB: /* BUSCC */
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case 0xB: /* BUSCC */
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecBUSCC" );
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecBUSCC" );
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// FIXME: 49g bugs here on display change
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// FIXME: 49g bugs here on display change
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DEBUG_print_cpu_instruction();
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// DEBUG_print_cpu_instruction();
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ChfGenerate( CPU_CHF_MODULE_ID, __FILE__, __LINE__, CPU_F_INTERR, CHF_WARNING, "BUSCC" );
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ChfGenerate( CPU_CHF_MODULE_ID, __FILE__, __LINE__, CPU_F_INTERR, CHF_WARNING, "BUSCC" );
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ChfSignal( CPU_CHF_MODULE_ID );
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ChfSignal( CPU_CHF_MODULE_ID );
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@ -2818,7 +2818,7 @@ void DEBUG_print_cpu_instruction( void )
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/* Dump PC and current instruction */
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/* Dump PC and current instruction */
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( void )Disassemble( cpu_status.PC, dob );
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( void )Disassemble( cpu_status.PC, dob );
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fprintf( stderr, "\n%s\n\n", dob );
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fprintf( stderr, "%s\n", dob );
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}
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}
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}
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}
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@ -2853,6 +2853,7 @@ void OneStep( void )
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Address offset;
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Address offset;
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_EXECUTING, cpu_status.PC );
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_EXECUTING, cpu_status.PC );
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DEBUG_print_cpu_instruction();
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/* Get first instruction nibble */
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/* Get first instruction nibble */
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n = GetNibble( cpu_status.PC++ );
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n = GetNibble( cpu_status.PC++ );
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352
src/emulator.c
352
src/emulator.c
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@ -258,6 +258,180 @@ static void EmulatorLoop( void )
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}
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}
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}
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}
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static ChfAction do_SHUTDN( void )
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{
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/* 3.1: CPU_SPIN_SHUTDN is not defined, and the cpu emulator
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has just executed a shutdown instruction.
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Let's do something a little tricky here:
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1- redraw the LCD
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2- handle serial port activities
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3- determine which timer will expire first, and
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compute an approximate value of the maximum duration
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of the shutdown --> ms
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4- handle serial port activities
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5- enter the inner idle loop; it breaks when either an
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X Event occurred (possibly clearing the shutdown) or
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the shutdown timeout elapses
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6- determine the actual time we spend in the idle loop
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(X timeouts are not accurate enough for this purpose)
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7- update T1 and T2, check their state and wake/interrupt
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the CPU if necessary
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Activities 3-7 above are enclosed in an outer loop because we
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cannot be absolutely sure of the actual time spent
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in the idle loop; moreover, not all X Events actually
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spool up the CPU. The outer loop breaks when the CPU is
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actually brought out of shutdown.
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frac_t1 and frac_t2 contain the number of microseconds
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not accounted for in the last T1/T2 update, respectively;
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they help minimize the cumulative timing error induced
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by executing the outer idle loop more than once.
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*/
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struct timeval start_idle, end_idle;
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int frac_t1 = 0, frac_t2 = 0;
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gettimeofday( &start_idle, NULL );
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/* Redraw the LCD immediately before entering idle loop;
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this ensures that the latest LCD updated actually
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get to the screen.
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*/
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// ui_update_display();
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/* Handle serial port activity before entering the outer idle
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loop, because this could possibly bring the cpu out of
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shutdown right now.
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*/
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HandleSerial();
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/* XXX
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If either timer has a pending service request,
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process it immediately. It is not clear why it was
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not processed *before* shutdown, though.
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*/
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_SREQ ) {
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_WAKE )
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CpuWake();
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_INT )
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CpuIntRequest( INT_REQUEST_IRQ );
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}
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_SREQ ) {
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_WAKE )
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CpuWake();
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_INT )
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CpuIntRequest( INT_REQUEST_IRQ );
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}
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while ( cpu_status.shutdn ) {
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unsigned long ms = MAX_IDLE_X_LOOP_TIMEOUT;
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unsigned long mst;
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int ela;
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int ela_ticks;
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debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T1 (during SHUTDN)", mod_status.hdw.t1_ctrl, mod_status.hdw.t1_val );
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debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T2 (during SHUTDN)", mod_status.hdw.t2_ctrl, mod_status.hdw.t2_val );
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/* Determine which timer will expire first */
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if ( mod_status.hdw.t1_ctrl & ( T1_CTRL_INT | T1_CTRL_WAKE ) ) {
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/* T1 will do something on expiration */
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mst = ( ( unsigned long )mod_status.hdw.t1_val + 1 ) * T1_MS_MULTIPLIER;
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debug2( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_EXP, "T1", mst );
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if ( mst < ms )
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ms = mst;
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}
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if ( ( mod_status.hdw.t2_ctrl & T2_CTRL_TRUN ) && ( mod_status.hdw.t2_ctrl & ( T2_CTRL_INT | T2_CTRL_WAKE ) ) ) {
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/* T2 is running and will do something on expiration */
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mst = ( ( unsigned long )mod_status.hdw.t2_val + 1 ) / T2_MS_DIVISOR;
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debug2( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_EXP, "T2", mst );
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if ( mst < ms )
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ms = mst;
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}
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/* Handle serial port activities at each iteration of
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the outer idle loop; this ensures that the serial
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port emulation will not starve.
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*/
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HandleSerial();
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/* Enter idle loop, possibly with timeout;
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The loop breaks when:
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- any X Event occurs (possibly clearing the shutdown)
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- the given timeout expires
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*/
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_IDLE_X_LOOP, ms );
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// IdleXLoop( ms );
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usleep( ms );
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/* End of idle loop; compute actual elapsed time */
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gettimeofday( &end_idle, NULL );
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ela = ( end_idle.tv_sec - start_idle.tv_sec ) * 1000000 + ( end_idle.tv_usec - start_idle.tv_usec );
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/* Update start_idle here to contain lag */
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start_idle = end_idle;
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_ELAPSED, ela );
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/* Update timers and act accordingly */
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ela_ticks = ( ( ela + frac_t1 ) + T1_INTERVAL / 2 ) / T1_INTERVAL;
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frac_t1 = ( ela + frac_t1 ) - ela_ticks * T1_INTERVAL;
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if ( ela_ticks > mod_status.hdw.t1_val ) {
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER1_EX, mod_status.hdw.t1_ctrl );
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mod_status.hdw.t1_ctrl |= T1_CTRL_SREQ;
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_WAKE )
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CpuWake();
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_INT )
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CpuIntRequest( INT_REQUEST_IRQ );
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}
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mod_status.hdw.t1_val = ( mod_status.hdw.t1_val - ela_ticks ) & T1_OVF_MASK;
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_TRUN ) {
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ela_ticks = ( ( ela + frac_t2 ) + T2_INTERVAL / 2 ) / T2_INTERVAL;
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frac_t2 = ( ela + frac_t2 ) - ela_ticks * T2_INTERVAL;
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if ( ela_ticks > mod_status.hdw.t2_val ) {
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debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER2_EX, mod_status.hdw.t2_ctrl );
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mod_status.hdw.t2_ctrl |= T2_CTRL_SREQ;
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_WAKE )
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CpuWake();
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_INT )
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CpuIntRequest( INT_REQUEST_IRQ );
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}
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mod_status.hdw.t2_val = ( mod_status.hdw.t2_val - ela_ticks ) & T2_OVF_MASK;
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}
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}
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debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T1 (after SHUTDN)", mod_status.hdw.t1_ctrl, mod_status.hdw.t1_val );
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debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T2 (after SHUTDN)", mod_status.hdw.t2_ctrl, mod_status.hdw.t2_val );
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return CHF_CONTINUE;
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}
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/* Condition handler for the EmulatorLoop */
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/* Condition handler for the EmulatorLoop */
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static ChfAction EmulatorLoopHandler( const ChfDescriptor* d, const ChfState s, void* _ctx )
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static ChfAction EmulatorLoopHandler( const ChfDescriptor* d, const ChfState s, void* _ctx )
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{
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{
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@ -272,183 +446,7 @@ static ChfAction EmulatorLoopHandler( const ChfDescriptor* d, const ChfState s,
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/* Condition from CPU modules; check Condition Code */
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/* Condition from CPU modules; check Condition Code */
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switch ( d->condition_code ) {
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switch ( d->condition_code ) {
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case CPU_I_SHUTDN:
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case CPU_I_SHUTDN:
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{
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act = do_SHUTDN();
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/* 3.1: CPU_SPIN_SHUTDN is not defined, and the cpu emulator
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has just executed a shutdown instruction.
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Let's do something a little tricky here:
|
|
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|
|
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1- redraw the LCD
|
|
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|
|
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2- handle serial port activities
|
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|
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3- determine which timer will expire first, and
|
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compute an approximate value of the maximum duration
|
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of the shutdown --> ms
|
|
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|
|
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4- handle serial port activities
|
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|
|
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5- enter the inner idle loop; it breaks when either an
|
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X Event occurred (possibly clearing the shutdown) or
|
|
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the shutdown timeout elapses
|
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|
|
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6- determine the actual time we spend in the idle loop
|
|
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(X timeouts are not accurate enough for this purpose)
|
|
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|
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7- update T1 and T2, check their state and wake/interrupt
|
|
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the CPU if necessary
|
|
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|
|
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Activities 3-7 above are enclosed in an outer loop because we
|
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cannot be absolutely sure of the actual time spent
|
|
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in the idle loop; moreover, not all X Events actually
|
|
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spool up the CPU. The outer loop breaks when the CPU is
|
|
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actually brought out of shutdown.
|
|
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|
|
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frac_t1 and frac_t2 contain the number of microseconds
|
|
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not accounted for in the last T1/T2 update, respectively;
|
|
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they help minimize the cumulative timing error induced
|
|
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by executing the outer idle loop more than once.
|
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*/
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struct timeval start_idle, end_idle;
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int frac_t1 = 0, frac_t2 = 0;
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gettimeofday( &start_idle, NULL );
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/* Redraw the LCD immediately before entering idle loop;
|
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this ensures that the latest LCD updated actually
|
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get to the screen.
|
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*/
|
|
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// ui_update_display();
|
|
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|
|
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/* Handle serial port activity before entering the outer idle
|
|
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loop, because this could possibly bring the cpu out of
|
|
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shutdown right now.
|
|
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*/
|
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HandleSerial();
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/* XXX
|
|
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If either timer has a pending service request,
|
|
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process it immediately. It is not clear why it was
|
|
||||||
not processed *before* shutdown, though.
|
|
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*/
|
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_SREQ ) {
|
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_WAKE )
|
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CpuWake();
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if ( mod_status.hdw.t1_ctrl & T1_CTRL_INT )
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CpuIntRequest( INT_REQUEST_IRQ );
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}
|
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_SREQ ) {
|
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_WAKE )
|
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CpuWake();
|
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|
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if ( mod_status.hdw.t2_ctrl & T2_CTRL_INT )
|
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CpuIntRequest( INT_REQUEST_IRQ );
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}
|
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|
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while ( cpu_status.shutdn ) {
|
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unsigned long ms = MAX_IDLE_X_LOOP_TIMEOUT;
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unsigned long mst;
|
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int ela;
|
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int ela_ticks;
|
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|
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debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T1 (during SHUTDN)", mod_status.hdw.t1_ctrl,
|
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mod_status.hdw.t1_val );
|
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debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T2 (during SHUTDN)", mod_status.hdw.t2_ctrl,
|
|
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mod_status.hdw.t2_val );
|
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|
|
||||||
/* Determine which timer will expire first */
|
|
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if ( mod_status.hdw.t1_ctrl & ( T1_CTRL_INT | T1_CTRL_WAKE ) ) {
|
|
||||||
/* T1 will do something on expiration */
|
|
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mst = ( ( unsigned long )mod_status.hdw.t1_val + 1 ) * T1_MS_MULTIPLIER;
|
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|
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debug2( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_EXP, "T1", mst );
|
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|
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if ( mst < ms )
|
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ms = mst;
|
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}
|
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||||||
|
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if ( ( mod_status.hdw.t2_ctrl & T2_CTRL_TRUN ) &&
|
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( mod_status.hdw.t2_ctrl & ( T2_CTRL_INT | T2_CTRL_WAKE ) ) ) {
|
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||||||
/* T2 is running and will do something on expiration */
|
|
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mst = ( ( unsigned long )mod_status.hdw.t2_val + 1 ) / T2_MS_DIVISOR;
|
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|
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debug2( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_EXP, "T2", mst );
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if ( mst < ms )
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ms = mst;
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}
|
|
||||||
|
|
||||||
/* Handle serial port activities at each iteration of
|
|
||||||
the outer idle loop; this ensures that the serial
|
|
||||||
port emulation will not starve.
|
|
||||||
*/
|
|
||||||
HandleSerial();
|
|
||||||
|
|
||||||
/* Enter idle loop, possibly with timeout;
|
|
||||||
The loop breaks when:
|
|
||||||
- any X Event occurs (possibly clearing the shutdown)
|
|
||||||
- the given timeout expires
|
|
||||||
*/
|
|
||||||
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_IDLE_X_LOOP, ms );
|
|
||||||
// IdleXLoop( ms );
|
|
||||||
usleep( ms );
|
|
||||||
|
|
||||||
/* End of idle loop; compute actual elapsed time */
|
|
||||||
gettimeofday( &end_idle, NULL );
|
|
||||||
|
|
||||||
ela = ( end_idle.tv_sec - start_idle.tv_sec ) * 1000000 + ( end_idle.tv_usec - start_idle.tv_usec );
|
|
||||||
|
|
||||||
/* Update start_idle here to contain lag */
|
|
||||||
start_idle = end_idle;
|
|
||||||
|
|
||||||
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_ELAPSED, ela );
|
|
||||||
|
|
||||||
/* Update timers and act accordingly */
|
|
||||||
ela_ticks = ( ( ela + frac_t1 ) + T1_INTERVAL / 2 ) / T1_INTERVAL;
|
|
||||||
frac_t1 = ( ela + frac_t1 ) - ela_ticks * T1_INTERVAL;
|
|
||||||
|
|
||||||
if ( ela_ticks > mod_status.hdw.t1_val ) {
|
|
||||||
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER1_EX, mod_status.hdw.t1_ctrl );
|
|
||||||
|
|
||||||
mod_status.hdw.t1_ctrl |= T1_CTRL_SREQ;
|
|
||||||
|
|
||||||
if ( mod_status.hdw.t1_ctrl & T1_CTRL_WAKE )
|
|
||||||
CpuWake();
|
|
||||||
|
|
||||||
if ( mod_status.hdw.t1_ctrl & T1_CTRL_INT )
|
|
||||||
CpuIntRequest( INT_REQUEST_IRQ );
|
|
||||||
}
|
|
||||||
|
|
||||||
mod_status.hdw.t1_val = ( mod_status.hdw.t1_val - ela_ticks ) & T1_OVF_MASK;
|
|
||||||
|
|
||||||
if ( mod_status.hdw.t2_ctrl & T2_CTRL_TRUN ) {
|
|
||||||
ela_ticks = ( ( ela + frac_t2 ) + T2_INTERVAL / 2 ) / T2_INTERVAL;
|
|
||||||
frac_t2 = ( ela + frac_t2 ) - ela_ticks * T2_INTERVAL;
|
|
||||||
|
|
||||||
if ( ela_ticks > mod_status.hdw.t2_val ) {
|
|
||||||
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER2_EX, mod_status.hdw.t2_ctrl );
|
|
||||||
|
|
||||||
mod_status.hdw.t2_ctrl |= T2_CTRL_SREQ;
|
|
||||||
|
|
||||||
if ( mod_status.hdw.t2_ctrl & T2_CTRL_WAKE )
|
|
||||||
CpuWake();
|
|
||||||
|
|
||||||
if ( mod_status.hdw.t2_ctrl & T2_CTRL_INT )
|
|
||||||
CpuIntRequest( INT_REQUEST_IRQ );
|
|
||||||
}
|
|
||||||
|
|
||||||
mod_status.hdw.t2_val = ( mod_status.hdw.t2_val - ela_ticks ) & T2_OVF_MASK;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T1 (after SHUTDN)", mod_status.hdw.t1_ctrl,
|
|
||||||
mod_status.hdw.t1_val );
|
|
||||||
debug3( CPU_CHF_MODULE_ID, DEBUG_C_TIMERS, CPU_I_TIMER_ST, "T2 (after SHUTDN)", mod_status.hdw.t2_ctrl,
|
|
||||||
mod_status.hdw.t2_val );
|
|
||||||
|
|
||||||
act = CHF_CONTINUE;
|
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CPU_I_EMULATOR_INT:
|
case CPU_I_EMULATOR_INT:
|
||||||
|
|
|
@ -201,9 +201,8 @@ void ModSelectDescription( int model )
|
||||||
ModRegisterDescription( hw49_description );
|
ModRegisterDescription( hw49_description );
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
/* ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_E_NO_MATCH, CHF_ERROR, config.hw ); */
|
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_E_NO_MATCH, CHF_ERROR, "Unknown model" );
|
||||||
/* ChfSignal( MOD_CHF_MODULE_ID ); */
|
ChfSignal( MOD_CHF_MODULE_ID );
|
||||||
fprintf( stderr, "Error: Unknown model %i\n", model );
|
|
||||||
exit( EXIT_FAILURE );
|
exit( EXIT_FAILURE );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -1251,7 +1251,7 @@ void ModConfig( Address config_info )
|
||||||
if ( mod == N_MOD ) {
|
if ( mod == N_MOD ) {
|
||||||
/* All modules are configured - Signal a warning */
|
/* All modules are configured - Signal a warning */
|
||||||
// FIXME: 48gx bugs here when running VERSION
|
// FIXME: 48gx bugs here when running VERSION
|
||||||
DEBUG_print_cpu_instruction();
|
// DEBUG_print_cpu_instruction();
|
||||||
|
|
||||||
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_W_BAD_CONFIG, CHF_WARNING, config_info );
|
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_W_BAD_CONFIG, CHF_WARNING, config_info );
|
||||||
ChfSignal( MOD_CHF_MODULE_ID );
|
ChfSignal( MOD_CHF_MODULE_ID );
|
||||||
|
|
|
@ -144,9 +144,7 @@ void RomInit( void )
|
||||||
}
|
}
|
||||||
|
|
||||||
if ( ReadNibblesFromFile( config.rom_file_name, N_ROM_SIZE, mod_status_rom ) ) {
|
if ( ReadNibblesFromFile( config.rom_file_name, N_ROM_SIZE, mod_status_rom ) ) {
|
||||||
/* ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_F_ROM_INIT, CHF_FATAL ); */
|
// To load 48SX ROM, try again with half the size this time.
|
||||||
/* ChfSignal( MOD_CHF_MODULE_ID ); */
|
|
||||||
// HACK: To load 48SX ROM, try again with half the size this time.
|
|
||||||
if ( ReadNibblesFromFile( config.rom_file_name, N_ROM_SIZE / 2, mod_status_rom ) ) {
|
if ( ReadNibblesFromFile( config.rom_file_name, N_ROM_SIZE / 2, mod_status_rom ) ) {
|
||||||
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_F_ROM_INIT, CHF_FATAL );
|
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_F_ROM_INIT, CHF_FATAL );
|
||||||
ChfSignal( MOD_CHF_MODULE_ID );
|
ChfSignal( MOD_CHF_MODULE_ID );
|
||||||
|
@ -233,7 +231,7 @@ void RomWrite( Address rel_address, Nibble datum )
|
||||||
debug1( MOD_CHF_MODULE_ID, DEBUG_C_TRACE, MOD_I_CALLED, "RomWrite" );
|
debug1( MOD_CHF_MODULE_ID, DEBUG_C_TRACE, MOD_I_CALLED, "RomWrite" );
|
||||||
|
|
||||||
// FIXME: 48gx: saturn48gx-Mid <12>d (src/romram.c,235)-E-Write into ROM A[1B632] D[9]
|
// FIXME: 48gx: saturn48gx-Mid <12>d (src/romram.c,235)-E-Write into ROM A[1B632] D[9]
|
||||||
DEBUG_print_cpu_instruction();
|
// DEBUG_print_cpu_instruction();
|
||||||
|
|
||||||
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_E_ROM_WRITE, CHF_ERROR, rel_address, datum );
|
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_E_ROM_WRITE, CHF_ERROR, rel_address, datum );
|
||||||
ChfSignal( MOD_CHF_MODULE_ID );
|
ChfSignal( MOD_CHF_MODULE_ID );
|
||||||
|
|
Loading…
Reference in a new issue