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4 commits

Author SHA1 Message Date
Gwenhael Le Moine
1efa7c89b4
"(BUSCC)" 2024-10-20 15:19:22 +02:00
Gwenhael Le Moine
b0fe2104c4
static-ify some functions 2024-10-20 15:17:50 +02:00
Gwenhael Le Moine
6183819cef
rename --implement-BUSCC to --enable-BUSCC 2024-10-20 15:17:03 +02:00
Gwenhael Le Moine
feac83a2aa
inline DEBUG_print_cpu_instruction() 2024-10-20 15:16:00 +02:00
6 changed files with 29 additions and 40 deletions

View file

@ -326,7 +326,7 @@ static void Addr2RS( Nibble* d, Address a )
---------------------------------------------------------------------------*/
/* Read a field of a DataRegister from memory */
void ReadDAT( Nibble* d, Address s, int fs )
static void ReadDAT( Nibble* d, Address s, int fs )
{
register int lo = cpu_status.fs_idx_lo[ fs ];
register int hi = cpu_status.fs_idx_hi[ fs ];
@ -336,14 +336,14 @@ void ReadDAT( Nibble* d, Address s, int fs )
}
/* Read a field of a DataRegister from memory, with immediate fs */
void ReadDATImm( Nibble* d, Address s, int imm_fs )
static void ReadDATImm( Nibble* d, Address s, int imm_fs )
{
for ( register int n = 0; n <= imm_fs; n++ )
d[ n ] = ReadNibble( s++ );
}
/* Write a field of a DataRegister into memory */
void WriteDAT( Address d, const Nibble* r, int fs )
static void WriteDAT( Address d, const Nibble* r, int fs )
{
register int lo = cpu_status.fs_idx_lo[ fs ];
register int hi = cpu_status.fs_idx_hi[ fs ];
@ -353,7 +353,7 @@ void WriteDAT( Address d, const Nibble* r, int fs )
}
/* Write a field of a DataRegister into memory, with immediate fs */
void WriteDATImm( Address d, const Nibble* r, int imm_fs )
static void WriteDATImm( Address d, const Nibble* r, int imm_fs )
{
for ( register int n = 0; n <= imm_fs; n++ )
WriteNibble( d++, r[ n ] );
@ -400,7 +400,7 @@ static Address Get5NibblesAbs( Address pc )
/* Fetch the lower 'n' nibbles of the D register pointed by 'd' from the
current instruction body
*/
void FetchD( Address* d, register int n )
static void FetchD( Address* d, register int n )
{
register Address mask = ADDRESS_MASK;
register Address v = 0x00000;
@ -418,7 +418,7 @@ void FetchD( Address* d, register int n )
/* Fetch 'n'+1 nibbles of the DataRegister r from the current instruction body,
starting from the nibble pointed by the P register.
*/
void FetchR( Nibble* r, register int n )
static void FetchR( Nibble* r, register int n )
{
register int p = ( int )cpu_status.P;
@ -432,7 +432,7 @@ void FetchR( Nibble* r, register int n )
/*---------------------------------------------------------------------------
Private functions: P register setting
---------------------------------------------------------------------------*/
void SetP( Nibble n )
static void SetP( Nibble n )
{
cpu_status.P = n;
@ -958,13 +958,13 @@ static void SubRImm( register Nibble* r, int fs, Nibble v )
/*---------------------------------------------------------------------------
Private functions: DataRegister bit operations
---------------------------------------------------------------------------*/
void ExecBIT0( Nibble* r, Nibble n ) { r[ n / 4 ] &= ~nibble_bit_mask[ n % 4 ]; }
static void ExecBIT0( Nibble* r, Nibble n ) { r[ n / 4 ] &= ~nibble_bit_mask[ n % 4 ]; }
void ExecBIT1( Nibble* r, Nibble n ) { r[ n / 4 ] |= nibble_bit_mask[ n % 4 ]; }
static void ExecBIT1( Nibble* r, Nibble n ) { r[ n / 4 ] |= nibble_bit_mask[ n % 4 ]; }
void TestBIT0( Nibble* r, Nibble n ) { cpu_status.carry = ( ( r[ n / 4 ] & nibble_bit_mask[ n % 4 ] ) == 0 ); }
static void TestBIT0( Nibble* r, Nibble n ) { cpu_status.carry = ( ( r[ n / 4 ] & nibble_bit_mask[ n % 4 ] ) == 0 ); }
void TestBIT1( Nibble* r, Nibble n ) { cpu_status.carry = ( ( r[ n / 4 ] & nibble_bit_mask[ n % 4 ] ) != 0 ); }
static void TestBIT1( Nibble* r, Nibble n ) { cpu_status.carry = ( ( r[ n / 4 ] & nibble_bit_mask[ n % 4 ] ) != 0 ); }
/*---------------------------------------------------------------------------
Private functions: jumps/subroutine calls
@ -2402,9 +2402,9 @@ static void ExecGroup_80BF( void )
static void ExecGroup_80B( void )
{
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecGroup_80B" );
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_CALLED, "ExecGroup_80B (BUSCC)" );
if ( config.implement_BUSCC ) {
if ( config.enable_BUSCC ) {
Nibble n = FetchNibble( cpu_status.PC++ );
switch ( n ) {
@ -2748,7 +2748,7 @@ static void ExecGroup_8( void )
Private functions: dump
---------------------------------------------------------------------------*/
const char* DumpR( Nibble* r )
static const char* DumpR( Nibble* r )
{
static char b[ NIBBLE_PER_REGISTER + 1 ];
static const char hex_char[ NIBBLE_PER_REGISTER ] = "0123456789ABCDEF";
@ -3240,17 +3240,6 @@ void DumpCpuStatus( char ob[ DUMP_CPU_STATUS_OB_SIZE ] )
ob += strlen( ob );
}
void DEBUG_print_cpu_instruction( void )
{
if ( config.debug_level > 0 && config.debug_level & DEBUG_C_OPCODES ) {
char dob[ DISASSEMBLE_OB_SIZE ];
/* Dump PC and current instruction */
( void )Disassemble( cpu_status.PC, dob );
fprintf( stderr, "%s\n", dob );
}
}
/* .+
.title : OneStep
@ -3279,13 +3268,18 @@ void DEBUG_print_cpu_instruction( void )
void OneStep( void )
{
debug1( CPU_CHF_MODULE_ID, DEBUG_C_TRACE, CPU_I_EXECUTING, cpu_status.PC );
DEBUG_print_cpu_instruction();
Nibble n;
if ( config.debug_level > 0 && config.debug_level & DEBUG_C_OPCODES ) {
char dob[ DISASSEMBLE_OB_SIZE ];
/* Dump PC and current instruction */
( void )Disassemble( cpu_status.PC, dob );
fprintf( stderr, "%s\n", dob );
}
Address offset;
/* Get first instruction nibble */
n = FetchNibble( cpu_status.PC++ );
Nibble n = FetchNibble( cpu_status.PC++ );
switch ( n ) {
case 0x0: /* Group_0 */

View file

@ -337,6 +337,5 @@ bool CpuHaltAllowed( void ); /* 3.13 */
Address Disassemble( Address pc, char ob[ DISASSEMBLE_OB_SIZE ] ); /* dis.c */
void DumpCpuStatus( char ob[ DUMP_CPU_STATUS_OB_SIZE ] );
void DEBUG_print_cpu_instruction( void );
#endif /*!_CPU_H*/

View file

@ -1246,8 +1246,6 @@ void ModConfig( Address config_info )
if ( mod == N_MOD ) {
/* All modules are configured - Signal a warning */
// FIXME: 48gx bugs here when running VERSION
// DEBUG_print_cpu_instruction();
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_W_BAD_CONFIG, CHF_WARNING, config_info );
ChfSignal( MOD_CHF_MODULE_ID );
} else {

View file

@ -230,8 +230,6 @@ void RomWrite( Address rel_address, Nibble datum )
debug1( MOD_CHF_MODULE_ID, DEBUG_C_TRACE, MOD_I_CALLED, "RomWrite" );
// FIXME: 48gx: saturn48gx-Mid <12>d (src/romram.c,235)-E-Write into ROM A[1B632] D[9]
// DEBUG_print_cpu_instruction();
ChfGenerate( MOD_CHF_MODULE_ID, __FILE__, __LINE__, MOD_E_ROM_WRITE, CHF_ERROR, rel_address, datum );
ChfSignal( MOD_CHF_MODULE_ID );
}

View file

@ -51,7 +51,7 @@ static config_t config = {
.state_dir_path = ( char* )".",
.debug_level = DEBUG_C_NONE,
.implement_BUSCC = false,
.enable_BUSCC = false,
};
lua_State* config_lua_values;
@ -224,7 +224,7 @@ config_t* config_init( int argc, char* argv[] )
int clopt_reset = -1;
int clopt_monitor = -1;
/* int clopt_batchXfer = -1; */
int clopt_implement_BUSCC = -1;
int clopt_enable_BUSCC = -1;
char* clopt_state_dir_path = ( char* )".";
@ -275,7 +275,7 @@ config_t* config_init( int argc, char* argv[] )
{"debug-modules", no_argument, NULL, 38611 },
{"debug-trace", no_argument, NULL, 38612 },
{"implement-BUSCC", no_argument, &clopt_implement_BUSCC, true },
{"implement-BUSCC", no_argument, &clopt_enable_BUSCC, true },
{0, 0, 0, 0 }
};
@ -517,8 +517,8 @@ config_t* config_init( int argc, char* argv[] )
config.monitor = clopt_monitor;
/* if ( clopt_batchXfer != -1 ) */
/* config.batchXfer = clopt_batchXfer; */
if ( clopt_implement_BUSCC != -1 )
config.implement_BUSCC = clopt_implement_BUSCC;
if ( clopt_enable_BUSCC != -1 )
config.enable_BUSCC = clopt_enable_BUSCC;
if ( config.model == MODEL_49G )
config.black_lcd = true;

View file

@ -51,7 +51,7 @@ typedef struct {
char* port_2_file_name;
int debug_level;
bool implement_BUSCC;
bool enable_BUSCC;
} config_t;
/*************/