include, don't duplicate
This commit is contained in:
Gwenhael Le Moine
parent
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1 changed files with 8 additions and 176 deletions
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#include <stdlib.h>
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#include <stdlib.h>
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#include "libChf/src/Chf.h"
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#include "libChf/src/Chf.h"
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// #include "../libChf/src/Chf.h"
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/* Chf Module Identifiers:
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#include "config.h"
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Each main module of the emulator has its own Chf Module Identifier; the
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#include "cpu.h"
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values defined here must match those actually used in the message catalogs.
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#include "debug.h"
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*/
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#include "disk_io.h"
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#define CPU_CHF_MODULE_ID 11
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#include "flash49.h"
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#define DEBUG_CHF_MODULE_ID 30
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#include "modules.h"
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#define DISK_IO_CHF_MODULE_ID 13
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#include "serial.h"
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#define FLASH_CHF_MODULE_ID 16 /* 3.3 */
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#include "x_func.h"
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#define MOD_CHF_MODULE_ID 12
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#define MAIN_CHF_MODULE_ID 10
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#define SERIAL_CHF_MODULE_ID 15 /* 2.5 */
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#define X_FUNC_CHF_MODULE_ID 18 /* 3.13 */
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/*---------------------------------------------------------------------------
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Chf condition codes
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---------------------------------------------------------------------------*/
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// cpu.h
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#define CPU_I_CALLED 101 /* Function %s called */
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#define CPU_I_EXECUTING 102 /* Executing @PC %X */
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#define CPU_I_SHUTDN 103 /* Shutdown */
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#define CPU_I_WAKE 104 /* Wake */
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#define CPU_I_INT 105 /* %s request accepted */
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#define CPU_I_INT_PENDING 106 /* %s request pending */
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#define CPU_I_RTI_LOOP 107 /* RTI loop to service %s */
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#define CPU_I_RTI_END 108 /* RTI returning */
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#define CPU_I_INTON 109 /* INTON servicing %s */
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#define CPU_I_REVISION 110 /* CPU emulation revision: %s */
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#define CPU_I_TIMER1_EX 111 /* Timer 1 expired; ctrl=%x */
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#define CPU_I_TIMER2_EX 112 /* Timer 1 expired; ctrl=%x */
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#define CPU_I_EMULATOR_INT 113 /* Emulator interrupt req. detected */
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#define CPU_I_TIMER_ST 114 /* 3.1: Timer %s st: ctrl %x, val %x */
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#define CPU_I_TIMER_EXP 115 /* 3.1: Timer %s expiration %d ms */
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#define CPU_I_IDLE_X_LOOP 116 /* 3.1: Start idle loop, t/out %d ms */
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#define CPU_I_ELAPSED 117 /* 3.1: Spent %d us in idle loop */
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#define CPU_I_HALT 118 /* 3.13: CPU halted */
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#define CPU_I_RUN 119 /* 3.13: CPU running */
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#define CPU_W_RESETTING 201 /* Resetting CPU */
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#define CPU_W_BAD_MONITOR_CMD 202 /* Bad monitor command: %s */
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#define CPU_E_BAD_OPCODE 301 /* Bad opc. pc=%x, value=%x */
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#define CPU_E_SAVE 302 /* Can't save CPU status */
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#define CPU_E_NO_HALT 303 /* 3.13: Halt/Run not allowed */
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#define CPU_F_INTERR 401 /* Internal error %s */
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#define CPU_F_BAD_SHUTDN 402 /* Unexpected CPU shutdown */
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// debug.h
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#define DEBUG_W_NOT_SUPPORTED 201 /* Debug not supported */
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#define DEBUG_W_BAD_CMD 202 /* Invalid command */
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// disk_io.h
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#define DISK_IO_S_OK 0 /* Function completed succesfully */
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#define DISK_IO_I_CALLED 101 /* Function %s called */
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#define DISK_IO_E_OPEN 401 /* Open file %s failed */
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#define DISK_IO_E_GETC 402 /* getc() from file %s failed */
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#define DISK_IO_E_PUTC 403 /* putc() to file %s failed */
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#define DISK_IO_E_READ 404 /* fread() from file %s failed */
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#define DISK_IO_E_WRITE 405 /* fwrite() to file %s failed */
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#define DISK_IO_E_CLOSE 406 /* Close file %s failed */
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#define DISK_IO_E_BAD_HDR 407 /* File %s has a bad header */
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#define DISK_IO_E_SIZE 408 /* File %s too large */
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// flash49.h
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#define FLASH_I_READ 101 /* Read from address %x: %d */
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#define FLASH_I_WRITE 102 /* Write address %x, datum %x */
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#define FLASH_I_FSM 103 /* FSM from state %d, cycle %d */
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#define FLASH_I_FSM_AD 104 /* FSM address %x, data %x */
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#define FLASH_I_FSM_RESULT 105 /* FSM next state %d, result %x */
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#define FLASH_I_FSM_OP 106 /* FSM operation %s */
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#define FLASH_W_BAD_CMD 201 /* Bad cmd st%d, cycle%d, a%x, d%d */
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#define FLASH_W_BAD_ADDRESS 202 /* Bad addr st%d, cycle%d, a%x, d%d */
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#define FLASH_E_xxx 301
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#define FLASH_F_xxx 401
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// modules.h
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#define MOD_I_CALLED 101 /* Function %s called */
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#define MOD_I_INITIALIZING 102 /* Initializing module %s */
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#define MOD_I_RESETTING 103 /* Resetting module %s */
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#define MOD_I_GET_ID 106 /* ModGetID returning %x */
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#define MOD_I_CONFIG 107 /* ModConfig %s %x %x completed */
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#define MOD_I_UNCONFIG 108 /* ModUnconfig %s %x %x completed */
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#define MOD_I_SAVING 109 /* Saving status of module %s */
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#define MOD_I_NOT_IMPLEMENTED 110 /* Function %s not implemented */
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#define MOD_I_REVISION 111 /* Modules revision: %s */
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#define MOD_I_BS_ADDRESS 112 /* 2.4: Bank Switcher address: %x */
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#define MOD_I_PORT_1_WP 113 /* 2.4: Port 1 is write protected */
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#define MOD_I_PORT_2_WP 114 /* 2.4: Port 2 is write protected */
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#define MOD_I_PERF_CTR 115 /* 2.7: Value of PerfCtr %s is %d */
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#define MOD_I_CACHED_UNCONFIG 116 /* 2.7: Cached ModUnconfig completed */
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#define MOD_I_CACHED_CONFIG 117 /* 2.7: Cached ModConfig %x comp. */
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#define MOD_I_UNCONFIG_L_HIT 118 /* 2.7: Late unconfig hit */
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#define MOD_I_UNCONFIG_L_MISS 119 /* 2.7: Late unconfig miss */
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#define MOD_W_BAD_CONFIG 202 /* Bad ModConfig %x ignored */
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#define MOD_W_BAD_UNCONFIG 203 /* Bad ModUnconfig %x ignored */
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#define MOD_W_HDW_WRITE 204 /* Bad HdwWrite %x, %x */
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#define MOD_W_HDW_READ 205 /* Bad HdwRead %x */
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#define MOD_W_RESETTING_ALL 206 /* Resetting all modules */
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#define MOD_W_RAM_INIT 207 /* Can't initialize internal RAM */
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#define MOD_W_HDW_INIT 208 /* Can't initialize HDW */
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#define MOD_W_BAD_KEY 209 /* 2.1: Bad key %s ignored */
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#define MOD_W_BAD_OUT_BIT 210 /* 2.1: Bad out_bit %x ignored */
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#define MOD_W_PORT_1_INIT 211 /* 2.4: Can't initialize Port 1 */
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#define MOD_W_PORT_2_INIT 212 /* 2.4: Can't initialize Port 2 */
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#define MOD_W_NO_VICTIM 213 /* 2.7: No cache victim; flush/retry */
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#define MOD_E_BAD_READ 301 /* Read unmapped addr %x */
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#define MOD_E_BAD_WRITE 302 /* Write unmapped addr %x datum %x */
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#define MOD_E_ROM_WRITE 303 /* Write into ROM addr %x datum %x */
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#define MOD_E_RAM_SAVE 304 /* Can't save internal RAM status */
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#define MOD_E_HDW_SAVE 305 /* Can't save HDW status */
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#define MOD_E_PORT_1_SAVE 306 /* 2.4: Can't save Port 1 status */
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#define MOD_E_CE1_WRITE 307 /* 2.4: Ce1Write addr %x datum %x */
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#define MOD_E_PORT_2_SAVE 308 /* 2.4: Can't save Port 2 status */
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#define MOD_E_NCE3_READ 309 /* 2.4: Read from NCE3 addr %x */
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#define MOD_E_NCE3_WRITE 310 /* 2.4: Wr. to NCE3 addr %x datum %x */
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#define MOD_E_NO_MATCH 311 /* 3.2: Hw desription %s not found */
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#define MOD_E_ROM_SAVE 312 /* 3.3: Can't save Flash ROM */
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#define MOD_F_MAP_SAVE 401 /* Can't save mod_map information */
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#define MOD_F_ROM_INIT 402 /* Can't initialize internal ROM */
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#define MOD_F_MAP_ALLOC 403 /* Dynamic map allocation failed */
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#define MOD_F_BAD_ALLOC_C 404 /* 2.7: Bad alloc_c %d aft FlushCache*/
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#define MOD_F_CHAIN_CORRUPTED 405 /* 2.7: ModMap chain corrupted */
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#define MOD_F_NO_VICTIM 406 /* 2.7: No cache victim after flush */
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#define MOD_F_MOD_STATUS_ALLOC 407 /* 3.2: ModStatus_xx alloc failed %d */
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#define MOD_F_NO_DESCRIPTION 408 /* 3.2: No module description */
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#define MOD_M_NOT_MAPPED 501 /* Address %x not mapped */
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#define MOD_M_MAPPED 502 /* Address %x mapped to %s:%x */
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#define MOD_M_MAP_TABLE_TITLE 503 /* */
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#define MOD_M_MAP_TABLE_ROW 504 /* %s %x %x %s */
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#define MOD_M_MAP_CONFIGURED 505 /* Configured */
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#define MOD_M_MAP_SZ_CONFIGURED 506 /* Size configured */
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#define MOD_M_MAP_UNCONFIGURED 507 /* Unconfigured */
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// main.c
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#define MAIN_M_COPYRIGHT 501
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#define MAIN_M_LICENSE 502
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// serial.h
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#define SERIAL_I_CALLED 101 /* Function %s called */
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#define SERIAL_I_REVISION 102 /* Serial port emulation rev. %s */
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#define SERIAL_I_READ 103 /* Read %s -> %x */
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#define SERIAL_I_WRITE 104 /* Write %s %x -> %x */
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#define SERIAL_I_RBR 105 /* Read RBR -> %x */
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#define SERIAL_I_TBR 106 /* Write TBR <- %x */
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#define SERIAL_I_PTY_NAME 107 /* pty name is %s */
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#define SERIAL_W_EMPTY_RRB 201 /* Read from empty RX buffer, rcs=%x */
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#define SERIAL_W_FULL_TRB 202 /* Write into full TX buffer, tcs=%x */
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#define SERIAL_W_NOPTY 203 /* 3.16: Pty support not available */
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#define SERIAL_E_TRB_DRAIN 301 /* Error draining TX buffer */
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#define SERIAL_E_RRB_CHARGE 302 /* Error charging RX buffer */
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#define SERIAL_E_PTY_CLOSE 303 /* Error closing pty */
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#define SERIAL_F_OPENPTY 401 /* openpty() failed on master pty */
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#define SERIAL_F_FCNTL 402 /* fcntl() failed on master pty */
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#define SERIAL_F_OPEN_MASTER 403 /* Can't open pty master %s */
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#define SERIAL_F_GRANTPT 404 /* grantpt() failed on master pty */
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#define SERIAL_F_UNLOCKPT 405 /* unlockpt() failed on master pty */
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#define SERIAL_F_OPEN_SLAVE 406 /* Can't open pty slave %s */
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#define SERIAL_F_PUSH 407 /* ioctl(I_PUSH,%s) failed on slave */
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#define SERIAL_F_TCGETATTR 408 /* tcgetattr() failed on master */
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#define SERIAL_F_TCSETATTR 409 /* tcsetattr() failed on master */
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// x_func.h
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#define X_FUNC_I_CALLED 101 /* Function %s called */
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#define X_FUNC_I_CODE 102 /* Function code %d */
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#define X_FUNC_I_SET_SPEED 103 /* Speed set to %dMhz (%d mult.) */
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#define X_FUNC_I_MAX_SPEED 104 /* Emulator at max speed */
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#define X_FUNC_I_FILE_NAME 105 /* Transferring file name %s */
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#define X_FUNC_I_KGET 106 /* Kget start:%x end:%x hdr:%s */
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#define X_FUNC_I_SEND 107 /* Send start:%x end:%x hdr:%s */
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#define X_FUNC_W_BAD_CODE 201 /* Bad function code %d ignored */
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#define X_FUNC_W_ABORTED 202 /* Aborted by user */
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#define X_FUNC_W_FAILED 203 /* Operation failed */
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#define X_FUNC_E_NO_HALT 301 /* Cpu halt not allowed */
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#define X_FUNC_E_NO_SPEED 302 /* No speed control available */
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#define X_FUNC_E_NO_BIN_HDR 303 /* Can't determine hdr for hw %s */
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#define X_FUNC_F_xxx 401
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#define X_FUNC_M_KGET 501 /* FSB title for Kget function */
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#define X_FUNC_M_SEND 502 /* FSB title for Send function */
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extern ChfTable message_table[];
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extern ChfTable message_table[];
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extern size_t message_table_size;
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extern size_t message_table_size;
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