1104 lines
27 KiB
C
1104 lines
27 KiB
C
/*
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* DebugDll.c
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*
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* This file is part of Emu48
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*
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* Copyright (C) 2000 Christoph Gießelink
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*
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*/
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#include "pch.h"
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#include "resource.h"
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#include "emu48.h"
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#include "opcodes.h"
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#include "ops.h"
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#include "debugger.h"
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#include "emu48dll.h"
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#define MAXBREAKPOINTS 256 // max. number of breakpoints
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typedef struct // type of breakpoint table
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{
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UINT nType; // breakpoint type
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DWORD dwAddr; // breakpoint address
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} BP_T;
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static DWORD *pdwLinArray; // last instruction linear array
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static DWORD dwRefRstkp; // reference stack pointer content
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static WORD wBreakpointCount = 0; // number of breakpoints
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static BP_T sBreakpoint[MAXBREAKPOINTS]; // breakpoint table
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static BOOL bDbgNotify = FALSE; // debugger notify flag
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static BOOL bDbgRpl; // Flag for ASM or RPL breakpoint
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// callback function notify debugger breakpoint
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static VOID (CALLBACK *pEmuDbgNotify)(INT nBreaktype) = NULL;
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// callback function notify hardware stack changed
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static BOOL (CALLBACK *pEmuStackNotify)(VOID) = NULL;
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//################
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//#
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//# Static functions
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//#
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//################
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//
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// convert nibble register to DWORD
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//
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static DWORD RegToDWORD(BYTE *pReg, WORD wNib)
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{
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WORD i;
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DWORD dwRegister = 0;
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for (i = 0;i < wNib;++i)
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{
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dwRegister <<= 4;
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dwRegister += pReg[wNib-i-1];
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}
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return dwRegister;
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}
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//
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// convert DWORD to nibble register
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//
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static VOID DWORDToReg(BYTE *pReg, WORD wNib, DWORD dwReg)
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{
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int i;
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for (i = 0;i < wNib;++i)
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{
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pReg[i] = (BYTE) (dwReg & 0xF);
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dwReg >>= 4; // next nibble
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}
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return;
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}
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//################
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//#
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//# Public internal functions
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//#
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//################
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//
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// handle upper 32 bit of cpu cycle counter
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//
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VOID UpdateDbgCycleCounter(VOID)
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{
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return; // not necessary here, cycle counter has 64 bit in DLL version
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}
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//
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// check for code breakpoints
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//
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BOOL CheckBreakpoint(DWORD dwAddr, DWORD dwRange, UINT nType)
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{
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INT i;
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BOOL bBreak = FALSE; // don't break
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DWORD dwRomAddr = -1; // no valid ROM address
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// stack changed notify function defined
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if (nType == BP_EXEC && pEmuStackNotify != NULL)
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{
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// hardware stack changed
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if (dwRefRstkp != -1 && dwRefRstkp != Chipset.rstkp)
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bBreak = pEmuStackNotify(); // inform debugger
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dwRefRstkp = Chipset.rstkp; // save current stack level
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}
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// absolute ROM adress breakpoints
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if (nType == BP_EXEC) // only on code breakpoints
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{
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LPBYTE I = FASTPTR(dwAddr); // get opcode stream
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// adress in ROM area
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if (I >= pbyRom && I < pbyRom + dwRomSize)
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dwRomAddr = I - pbyRom; // linear ROM address
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}
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for (i = 0; i < wBreakpointCount; ++i) // scan all breakpoints
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{
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// check for absolute ROM adress breakpoint
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if ( sBreakpoint[i].dwAddr >= dwRomAddr && sBreakpoint[i].dwAddr < dwRomAddr + dwRange
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&& (sBreakpoint[i].nType & BP_ROM) != 0)
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return TRUE;
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// check address range and type
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if ( sBreakpoint[i].dwAddr >= dwAddr && sBreakpoint[i].dwAddr < dwAddr + dwRange
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&& (sBreakpoint[i].nType & nType) != 0)
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return TRUE;
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}
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return bBreak;
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}
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//
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// notify debugger that emulation stopped
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//
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VOID NotifyDebugger(INT nType) // update registers
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{
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nDbgState = DBG_STEPINTO; // state "step into"
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dwDbgStopPC = -1; // disable "cursor stop address"
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_ASSERT(pEmuDbgNotify); // notify function defined from caller
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pEmuDbgNotify(nType); // notify caller
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bDbgNotify = TRUE; // emulation stopped
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return;
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}
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//
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// disable debugger
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//
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VOID DisableDebugger(VOID)
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{
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nDbgState = DBG_OFF; // disable debugger
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bInterrupt = TRUE; // exit opcode loop
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SetEvent(hEventDebug);
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return;
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}
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//################
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//#
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//# Dummy functions for linking
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//#
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//################
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//
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// entry from message loop
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//
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LRESULT OnToolDebug(VOID)
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{
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return 0;
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}
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//
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// load breakpoint list
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//
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VOID LoadBreakpointList(HANDLE hFile)
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{
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return;
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UNREFERENCED_PARAMETER(hFile);
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}
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//
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// save breakpoint list
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//
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VOID SaveBreakpointList(HANDLE hFile)
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{
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return;
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UNREFERENCED_PARAMETER(hFile);
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}
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//
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// create a copy of the breakpoint list
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//
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VOID CreateBackupBreakpointList(VOID)
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{
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return;
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}
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//
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// restore the breakpoint list from the copy
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//
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VOID RestoreBackupBreakpointList(VOID)
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{
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return;
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}
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//################
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//#
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//# Public external functions
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//#
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//################
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/****************************************************************************
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* EmuInitLastInstr
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*****************************************************************************
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*
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* @func init a circular buffer area for saving the last instruction
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* addresses
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*
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* @xref none
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*
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* @rdesc BOOL: FALSE = OK, TRUE = Error
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*
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****************************************************************************/
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DECLSPEC BOOL CALLBACK EmuInitLastInstr(
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WORD wNoInstr, // @parm number of saved instructions,
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// 0 = frees the memory buffer
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DWORD *pdwArray) // @parm pointer to linear array
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{
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if (pdwInstrArray) // circular buffer defined
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{
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EnterCriticalSection(&csDbgLock);
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{
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free(pdwInstrArray); // free memory
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pdwInstrArray = NULL;
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}
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LeaveCriticalSection(&csDbgLock);
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}
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if (wNoInstr) // new size
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{
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pdwLinArray = pdwArray; // save address of linear array
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wInstrSize = wNoInstr + 1; // size of circular buffer
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wInstrWp = wInstrRp = 0; // init write/read pointer
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pdwInstrArray = malloc(wInstrSize*sizeof(*pdwInstrArray));
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if (pdwInstrArray == NULL) // allocation error
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return TRUE;
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}
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return FALSE;
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}
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/****************************************************************************
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* EmuGetLastInstr
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*****************************************************************************
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*
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* @func return number of valid entries in the last instruction array,
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* each entry contents a PC address, array[0] contents the oldest,
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* array[*pwNoEntries-1] the last PC address
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*
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* @xref none
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*
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* @rdesc BOOL: FALSE = OK, TRUE = Error
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*
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****************************************************************************/
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DECLSPEC BOOL CALLBACK EmuGetLastInstr(
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WORD *pwNoEntries) // @parm return number of valid entries in array
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{
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WORD i;
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if (pdwInstrArray == NULL) return TRUE; // circular buffer not defined
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// copy data to linear buffer
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*pwNoEntries = 0;
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for (i = wInstrRp; i != wInstrWp; i = (i + 1) % wInstrSize)
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pdwLinArray[(*pwNoEntries)++] = pdwInstrArray[i];
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return FALSE;
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}
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/****************************************************************************
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* EmuRun
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*****************************************************************************
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*
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* @func run emulation
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*
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* @xref none
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*
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* @rdesc BOOL: FALSE = OK
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* TRUE = Error, Emu48 is running
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*
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****************************************************************************/
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DECLSPEC BOOL CALLBACK EmuRun(VOID)
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{
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BOOL bErr = (nDbgState == DBG_RUN);
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if (nDbgState != DBG_RUN) // emulation stopped
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{
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bDbgNotify = FALSE; // reset debugger notify flag
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nDbgState = DBG_RUN; // state "run"
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SetEvent(hEventDebug); // run emulation
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}
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return bErr;
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}
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/****************************************************************************
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* EmuRunPC
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*****************************************************************************
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*
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* @func run emulation until stop address
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*
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* @xref none
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*
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* @rdesc VOID
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*
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****************************************************************************/
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DECLSPEC VOID CALLBACK EmuRunPC(
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DWORD dwAddressPC) // @parm breakpoint address
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{
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if (nDbgState != DBG_RUN) // emulation stopped
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{
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dwDbgStopPC = dwAddressPC; // stop address
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EmuRun(); // run emulation
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}
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return;
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}
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/****************************************************************************
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* EmuStep
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*****************************************************************************
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*
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* @func execute one ASM instruction and return to caller
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*
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* @xref none
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*
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* @rdesc VOID
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*
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****************************************************************************/
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DECLSPEC VOID CALLBACK EmuStep(VOID)
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{
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if (nDbgState != DBG_RUN) // emulation stopped
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{
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bDbgNotify = FALSE; // reset debugger notify flag
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nDbgState = DBG_STEPINTO; // state "step into"
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SetEvent(hEventDebug); // run emulation
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}
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return;
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}
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/****************************************************************************
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* EmuStepOver
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*****************************************************************************
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*
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* @func execute one ASM instruction but skip GOSUB, GOSUBL, GOSBVL
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* subroutines
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*
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* @xref none
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*
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* @rdesc VOID
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*
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****************************************************************************/
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DECLSPEC VOID CALLBACK EmuStepOver(VOID)
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{
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if (nDbgState != DBG_RUN) // emulation stopped
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{
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LPBYTE I;
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bDbgNotify = FALSE; // reset debugger notify flag
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I = FASTPTR(Chipset.pc);
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dwDbgRstkp = Chipset.rstkp; // save stack level
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nDbgState = DBG_STEPINTO; // state "step into"
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if (I[0] == 0x7) // GOSUB 7aaa
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{
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nDbgState = DBG_STEPOVER; // state "step over"
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}
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if (I[0] == 0x8) // GOSUBL or GOSBVL
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{
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if (I[1] == 0xE) // GOSUBL 8Eaaaa
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{
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nDbgState = DBG_STEPOVER; // state "step over"
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}
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if (I[1] == 0xF) // GOSBVL 8Eaaaaa
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{
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nDbgState = DBG_STEPOVER; // state "step over"
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}
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}
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SetEvent(hEventDebug); // run emulation
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}
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return;
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}
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/****************************************************************************
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* EmuStepOut
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*****************************************************************************
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*
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* @func run emulation until a RTI, RTN, RTNC, RTNCC, RTNNC, RTNSC, RTNSXN,
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* RTNYES instruction is found above the current stack level
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*
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* @xref none
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*
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* @rdesc VOID
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*
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****************************************************************************/
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DECLSPEC VOID CALLBACK EmuStepOut(VOID)
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{
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if (nDbgState != DBG_RUN) // emulation stopped
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{
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bDbgNotify = FALSE; // reset debugger notify flag
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dwDbgRstkp = (Chipset.rstkp-1)&7; // save stack data
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dwDbgRstk = Chipset.rstk[dwDbgRstkp];
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nDbgState = DBG_STEPOUT; // state "step out"
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SetEvent(hEventDebug); // run emulation
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}
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return;
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}
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/****************************************************************************
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* EmuStop
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*****************************************************************************
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*
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* @func break emulation
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*
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* @xref none
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*
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* @rdesc BOOL: FALSE = OK
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* TRUE = Error, no debug notify handler
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*
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****************************************************************************/
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DECLSPEC BOOL CALLBACK EmuStop(VOID)
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{
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if (pEmuDbgNotify && nDbgState != DBG_STEPINTO) // emulation running
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{
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bDbgNotify = FALSE; // reset debugger notify flag
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nDbgState = DBG_STEPINTO; // state "step into"
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if (Chipset.Shutdn) // cpu thread stopped
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SetEvent(hEventShutdn); // goto debug session
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while (!bDbgNotify) Sleep(0); // wait until emulation stopped
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}
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return nDbgState != DBG_STEPINTO;
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}
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/****************************************************************************
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* EmuCallBackDebugNotify
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*****************************************************************************
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*
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* @func init CallBack handler to notify caller on debugger breakpoint
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*
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* @xref none
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*
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* @rdesc VOID
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*
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****************************************************************************/
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DECLSPEC VOID CALLBACK EmuCallBackDebugNotify(
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VOID (CALLBACK *EmuDbgNotify)(INT nBreaktype)) // @parm CallBack function notify Debug breakpoint
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{
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if(EmuDbgNotify != NULL) // debugger enabled
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{
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dwDbgStopPC = -1; // no stop address for goto cursor
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dwDbgRplPC = -1; // no stop address for RPL breakpoint
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pEmuDbgNotify = EmuDbgNotify; // set new handler
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nDbgState = DBG_RUN; // enable debugger
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}
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else
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{
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nDbgState = DBG_OFF; // disable debugger
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pEmuDbgNotify = EmuDbgNotify; // remove handler
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bInterrupt = TRUE; // exit opcode loop
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SetEvent(hEventDebug);
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}
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return;
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}
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/****************************************************************************
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* EmuCallBackStackNotify
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*****************************************************************************
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*
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* @func init CallBack handler to notify caller on hardware stack change;
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* if the CallBack function return TRUE, emulation stops behind the
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* opcode changed hardware stack content, otherwise, if the CallBack
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* function return FALSE, no breakpoint is set
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*
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* @xref none
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*
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* @rdesc VOID
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*
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****************************************************************************/
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DECLSPEC VOID CALLBACK EmuCallBackStackNotify(
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BOOL (CALLBACK *EmuStackNotify)(VOID)) // @parm CallBack function notify stack changed
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{
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dwRefRstkp = -1; // reference stack pointer not initialized
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pEmuStackNotify = EmuStackNotify; // set new handler
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return;
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}
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/****************************************************************************
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* EmuGetRegister
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*****************************************************************************
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*
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* @func read a 32 bit register
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*
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* @xref none
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*
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* @rdesc DWORD: 32 bit value of register
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*
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****************************************************************************/
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DECLSPEC DWORD CALLBACK EmuGetRegister(
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UINT uRegister) // @parm index of register
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{
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DWORD dwResult;
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switch(uRegister)
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{
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case EMU_REGISTER_PC:
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dwResult = Chipset.pc;
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break;
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case EMU_REGISTER_D0:
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dwResult = Chipset.d0;
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break;
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case EMU_REGISTER_D1:
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dwResult = Chipset.d1;
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break;
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case EMU_REGISTER_DUMMY:
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case EMU_REGISTER_R5L:
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case EMU_REGISTER_R5H:
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case EMU_REGISTER_R6L:
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case EMU_REGISTER_R6H:
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case EMU_REGISTER_R7L:
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case EMU_REGISTER_R7H:
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dwResult = 0; // dummy return
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break;
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case EMU_REGISTER_AL:
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dwResult = RegToDWORD(&Chipset.A[0],8);
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break;
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case EMU_REGISTER_AH:
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dwResult = RegToDWORD(&Chipset.A[8],8);
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break;
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case EMU_REGISTER_BL:
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dwResult = RegToDWORD(&Chipset.B[0],8);
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break;
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case EMU_REGISTER_BH:
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dwResult = RegToDWORD(&Chipset.B[8],8);
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break;
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case EMU_REGISTER_CL:
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dwResult = RegToDWORD(&Chipset.C[0],8);
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break;
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case EMU_REGISTER_CH:
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dwResult = RegToDWORD(&Chipset.C[8],8);
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break;
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case EMU_REGISTER_DL:
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dwResult = RegToDWORD(&Chipset.D[0],8);
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break;
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case EMU_REGISTER_DH:
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dwResult = RegToDWORD(&Chipset.D[8],8);
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break;
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case EMU_REGISTER_R0L:
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dwResult = RegToDWORD(&Chipset.R0[0],8);
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break;
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case EMU_REGISTER_R0H:
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dwResult = RegToDWORD(&Chipset.R0[8],8);
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break;
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case EMU_REGISTER_R1L:
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dwResult = RegToDWORD(&Chipset.R1[0],8);
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break;
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case EMU_REGISTER_R1H:
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dwResult = RegToDWORD(&Chipset.R1[8],8);
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break;
|
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case EMU_REGISTER_R2L:
|
|
dwResult = RegToDWORD(&Chipset.R2[0],8);
|
|
break;
|
|
case EMU_REGISTER_R2H:
|
|
dwResult = RegToDWORD(&Chipset.R2[8],8);
|
|
break;
|
|
case EMU_REGISTER_R3L:
|
|
dwResult = RegToDWORD(&Chipset.R3[0],8);
|
|
break;
|
|
case EMU_REGISTER_R3H:
|
|
dwResult = RegToDWORD(&Chipset.R3[8],8);
|
|
break;
|
|
case EMU_REGISTER_R4L:
|
|
dwResult = RegToDWORD(&Chipset.R4[0],8);
|
|
break;
|
|
case EMU_REGISTER_R4H:
|
|
dwResult = RegToDWORD(&Chipset.R4[8],8);
|
|
break;
|
|
case EMU_REGISTER_FLAGS:
|
|
/**
|
|
* "FLAGS" register format :
|
|
*
|
|
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|
|
* | ST |S|x|x|x|K|I|C|M| HST | P |
|
|
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|
|
* M : Mode (0:Hex, 1:Dec)
|
|
* C : Carry
|
|
* I : Interrupt pending
|
|
* K : KDN Interrupts Enabled
|
|
* S : Shutdn Flag (read only)
|
|
* x : reserved
|
|
*/
|
|
dwResult = RegToDWORD(Chipset.ST,4);
|
|
dwResult <<= 1;
|
|
dwResult |= Chipset.Shutdn ? 1 : 0;
|
|
dwResult <<= (3+1);
|
|
dwResult |= Chipset.intk ? 1 : 0;
|
|
dwResult <<= 1;
|
|
dwResult |= Chipset.inte ? 1 : 0;
|
|
dwResult <<= 1;
|
|
dwResult |= Chipset.carry ? 1 : 0;
|
|
dwResult <<= 1;
|
|
dwResult |= Chipset.mode_dec ? 1 : 0;
|
|
dwResult <<= 4;
|
|
dwResult |= Chipset.HST;
|
|
dwResult <<= 4;
|
|
dwResult |= Chipset.P;
|
|
break;
|
|
case EMU_REGISTER_OUT:
|
|
dwResult = Chipset.out;
|
|
break;
|
|
case EMU_REGISTER_IN:
|
|
dwResult = Chipset.in;
|
|
break;
|
|
case EMU_REGISTER_VIEW1:
|
|
dwResult = ((Chipset.Bank_FF >> 1) & 0x3F) >> 4;
|
|
break;
|
|
case EMU_REGISTER_VIEW2:
|
|
dwResult = ((Chipset.Bank_FF >> 1) & 0x3F) & 0xF;
|
|
break;
|
|
case EMU_REGISTER_RSTKP:
|
|
dwResult = Chipset.rstkp;
|
|
break;
|
|
case EMU_REGISTER_RSTK0:
|
|
dwResult = Chipset.rstk[0];
|
|
break;
|
|
case EMU_REGISTER_RSTK1:
|
|
dwResult = Chipset.rstk[1];
|
|
break;
|
|
case EMU_REGISTER_RSTK2:
|
|
dwResult = Chipset.rstk[2];
|
|
break;
|
|
case EMU_REGISTER_RSTK3:
|
|
dwResult = Chipset.rstk[3];
|
|
break;
|
|
case EMU_REGISTER_RSTK4:
|
|
dwResult = Chipset.rstk[4];
|
|
break;
|
|
case EMU_REGISTER_RSTK5:
|
|
dwResult = Chipset.rstk[5];
|
|
break;
|
|
case EMU_REGISTER_RSTK6:
|
|
dwResult = Chipset.rstk[6];
|
|
break;
|
|
case EMU_REGISTER_RSTK7:
|
|
dwResult = Chipset.rstk[7];
|
|
break;
|
|
case EMU_REGISTER_CLKL:
|
|
dwResult = (DWORD) (Chipset.cycles & 0xFFFFFFFF);
|
|
break;
|
|
case EMU_REGISTER_CLKH:
|
|
dwResult = (DWORD) (Chipset.cycles >> 32);
|
|
break;
|
|
case EMU_REGISTER_CRC:
|
|
dwResult = Chipset.crc;
|
|
break;
|
|
default:
|
|
dwResult = 0; // default return
|
|
_ASSERT(FALSE); // illegal entry
|
|
}
|
|
return dwResult;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuSetRegister
|
|
*****************************************************************************
|
|
*
|
|
* @func write a 32 bit register
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuSetRegister(
|
|
UINT uRegister, // @parm index of register
|
|
DWORD dwValue) // @parm new 32 bit value
|
|
{
|
|
switch(uRegister)
|
|
{
|
|
case EMU_REGISTER_PC:
|
|
Chipset.pc = dwValue;
|
|
break;
|
|
case EMU_REGISTER_D0:
|
|
Chipset.d0 = dwValue;
|
|
break;
|
|
case EMU_REGISTER_D1:
|
|
Chipset.d1 = dwValue;
|
|
break;
|
|
case EMU_REGISTER_DUMMY:
|
|
case EMU_REGISTER_R5L:
|
|
case EMU_REGISTER_R5H:
|
|
case EMU_REGISTER_R6L:
|
|
case EMU_REGISTER_R6H:
|
|
case EMU_REGISTER_R7L:
|
|
case EMU_REGISTER_R7H:
|
|
break; // dummy return
|
|
case EMU_REGISTER_AL:
|
|
DWORDToReg(&Chipset.A[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_AH:
|
|
DWORDToReg(&Chipset.A[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_BL:
|
|
DWORDToReg(&Chipset.B[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_BH:
|
|
DWORDToReg(&Chipset.B[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_CL:
|
|
DWORDToReg(&Chipset.C[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_CH:
|
|
DWORDToReg(&Chipset.C[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_DL:
|
|
DWORDToReg(&Chipset.D[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_DH:
|
|
DWORDToReg(&Chipset.D[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R0L:
|
|
DWORDToReg(&Chipset.R0[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R0H:
|
|
DWORDToReg(&Chipset.R0[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R1L:
|
|
DWORDToReg(&Chipset.R1[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R1H:
|
|
DWORDToReg(&Chipset.R1[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R2L:
|
|
DWORDToReg(&Chipset.R2[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R2H:
|
|
DWORDToReg(&Chipset.R2[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R3L:
|
|
DWORDToReg(&Chipset.R3[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R3H:
|
|
DWORDToReg(&Chipset.R3[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R4L:
|
|
DWORDToReg(&Chipset.R4[0],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_R4H:
|
|
DWORDToReg(&Chipset.R4[8],8,dwValue);
|
|
break;
|
|
case EMU_REGISTER_FLAGS:
|
|
/**
|
|
* "FLAGS" register format :
|
|
*
|
|
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|
|
* | ST |S|x|x|x|K|I|C|M| HST | P |
|
|
* +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
|
|
* M : Mode (0:Hex, 1:Dec)
|
|
* C : Carry
|
|
* I : Interrupt pending
|
|
* K : KDN Interrupts Enabled
|
|
* S : Shutdn Flag (read only)
|
|
* x : reserved
|
|
*/
|
|
Chipset.P = (BYTE) (dwValue & 0xF);
|
|
dwValue >>= 4;
|
|
Chipset.HST = (BYTE) (dwValue & 0xF);
|
|
dwValue >>= 4;
|
|
Chipset.mode_dec = (dwValue & 0x1) ? TRUE : FALSE;
|
|
dwValue >>= 1;
|
|
Chipset.carry = (dwValue & 0x1) ? TRUE : FALSE;
|
|
dwValue >>= 1;
|
|
Chipset.inte = (dwValue & 0x1) ? TRUE : FALSE;
|
|
dwValue >>= 1;
|
|
Chipset.intk = (dwValue & 0x1) ? TRUE : FALSE;
|
|
dwValue >>= (1+4);
|
|
DWORDToReg(Chipset.ST,sizeof(Chipset.ST),dwValue);
|
|
PCHANGED;
|
|
break;
|
|
case EMU_REGISTER_OUT:
|
|
Chipset.out = (WORD) (dwValue & 0xFFFF);
|
|
break;
|
|
case EMU_REGISTER_IN:
|
|
Chipset.in = (WORD) (dwValue & 0xFFFF);
|
|
break;
|
|
case EMU_REGISTER_VIEW1:
|
|
Chipset.Bank_FF &= 0x1F;
|
|
Chipset.Bank_FF |= (dwValue & 0x03) << (4+1);
|
|
RomSwitch(Chipset.Bank_FF);
|
|
break;
|
|
case EMU_REGISTER_VIEW2:
|
|
Chipset.Bank_FF &= 0x61;
|
|
Chipset.Bank_FF |= (dwValue & 0x0F) << 1;
|
|
RomSwitch(Chipset.Bank_FF);
|
|
break;
|
|
case EMU_REGISTER_RSTKP:
|
|
Chipset.rstkp = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK0:
|
|
Chipset.rstk[0] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK1:
|
|
Chipset.rstk[1] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK2:
|
|
Chipset.rstk[2] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK3:
|
|
Chipset.rstk[3] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK4:
|
|
Chipset.rstk[4] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK5:
|
|
Chipset.rstk[5] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK6:
|
|
Chipset.rstk[6] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_RSTK7:
|
|
Chipset.rstk[7] = dwValue;
|
|
break;
|
|
case EMU_REGISTER_CLKL:
|
|
case EMU_REGISTER_CLKH:
|
|
break; // not allowed to change
|
|
case EMU_REGISTER_CRC:
|
|
Chipset.crc = (WORD) (dwValue & 0xFFFF);
|
|
break;
|
|
default:
|
|
_ASSERT(FALSE); // illegal entry
|
|
}
|
|
return;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuGetMem
|
|
*****************************************************************************
|
|
*
|
|
* @func read one nibble from the specified mapped address
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuGetMem(
|
|
DWORD dwMapAddr, // @parm mapped address of Saturn CPU
|
|
BYTE *pbyValue) // @parm readed nibble
|
|
{
|
|
Npeek(pbyValue,dwMapAddr,1);
|
|
return;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuSetMem
|
|
*****************************************************************************
|
|
*
|
|
* @func write one nibble to the specified mapped address
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuSetMem(
|
|
DWORD dwMapAddr, // @parm mapped address of Saturn CPU
|
|
BYTE byValue) // @parm nibble to write
|
|
{
|
|
Nwrite(&byValue,dwMapAddr,1);
|
|
return;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuGetRom
|
|
*****************************************************************************
|
|
*
|
|
* @func return size and base address of mapped ROM
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc LPBYTE: base address of ROM (pointer to original data)
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC LPBYTE CALLBACK EmuGetRom(
|
|
DWORD *pdwRomSize) // @parm return size of ROM in nibbles
|
|
{
|
|
*pdwRomSize = dwRomSize;
|
|
return pbyRom;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuSetBreakpoint
|
|
*****************************************************************************
|
|
*
|
|
* @func set ASM code/data breakpoint
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc BOOL: TRUE = Error, Breakpoint table full
|
|
* FALSE = OK, Breakpoint set
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC BOOL CALLBACK EmuSetBreakpoint(
|
|
DWORD dwAddress, // @parm breakpoint address to set
|
|
UINT nBreakpointType) // @parm breakpoint type to set
|
|
{
|
|
INT i;
|
|
|
|
_ASSERT( nBreakpointType == BP_EXEC // illegal breakpoint type
|
|
|| nBreakpointType == BP_READ
|
|
|| nBreakpointType == BP_WRITE
|
|
|| nBreakpointType == BP_RPL
|
|
|| nBreakpointType == BP_ACCESS
|
|
|| nBreakpointType == BP_ROM);
|
|
|
|
for (i = 0; i < wBreakpointCount; ++i) // search for breakpoint
|
|
{
|
|
// breakpoint already set
|
|
if ( sBreakpoint[i].dwAddr == dwAddress
|
|
&& sBreakpoint[i].nType == nBreakpointType)
|
|
return FALSE;
|
|
}
|
|
|
|
if (wBreakpointCount >= MAXBREAKPOINTS) // breakpoint buffer full
|
|
return TRUE;
|
|
|
|
sBreakpoint[wBreakpointCount].dwAddr = dwAddress;
|
|
sBreakpoint[wBreakpointCount].nType = nBreakpointType;
|
|
++wBreakpointCount;
|
|
return FALSE;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuClearBreakpoint
|
|
*****************************************************************************
|
|
*
|
|
* @func clear ASM code/data breakpoint
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc BOOL: TRUE = Error, Breakpoint not found
|
|
* FALSE = OK, Breakpoint cleared
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC BOOL CALLBACK EmuClearBreakpoint(
|
|
DWORD dwAddress, // @parm breakpoint address to clear
|
|
UINT nBreakpointType) // @parm breakpoint type to clear
|
|
{
|
|
INT i;
|
|
|
|
_ASSERT( nBreakpointType == BP_EXEC // illegal breakpoint type
|
|
|| nBreakpointType == BP_READ
|
|
|| nBreakpointType == BP_WRITE
|
|
|| nBreakpointType == BP_RPL
|
|
|| nBreakpointType == BP_ACCESS
|
|
|| nBreakpointType == BP_ROM);
|
|
|
|
for (i = 0; i < wBreakpointCount; ++i) // search for breakpoint
|
|
{
|
|
// breakpoint found
|
|
if ( sBreakpoint[i].dwAddr == dwAddress
|
|
&& sBreakpoint[i].nType == nBreakpointType)
|
|
{
|
|
// move rest to top
|
|
for (++i; i < wBreakpointCount; ++i)
|
|
sBreakpoint[i-1] = sBreakpoint[i];
|
|
|
|
--wBreakpointCount;
|
|
return FALSE; // breakpoint found
|
|
}
|
|
}
|
|
return TRUE; // breakpoint not found
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuClearAllBreakpoints
|
|
*****************************************************************************
|
|
*
|
|
* @func clear all breakpoints
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuClearAllBreakpoints(VOID)
|
|
{
|
|
wBreakpointCount = 0;
|
|
return;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuEnableNop3Breakpoint
|
|
*****************************************************************************
|
|
*
|
|
* @func enable/disable NOP3 breakpoint
|
|
* stop emulation at Opcode 420 for GOC + (next line)
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuEnableNop3Breakpoint(
|
|
BOOL bEnable) // @parm stop on NOP3 opcode
|
|
{
|
|
bDbgNOP3 = bEnable; // change stop on NOP3 breakpoint flag
|
|
return;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuEnableDocodeBreakpoint
|
|
*****************************************************************************
|
|
*
|
|
* @func enable/disable DOCODE breakpoint
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuEnableDoCodeBreakpoint(
|
|
BOOL bEnable) // @parm stop on DOCODE entry
|
|
{
|
|
bDbgCode = bEnable; // change stop on DOCODE breakpoint flag
|
|
return;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuEnableRplBreakpoint
|
|
*****************************************************************************
|
|
*
|
|
* @func enable/disable RPL breakpoint
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuEnableRplBreakpoint(
|
|
BOOL bEnable) // @parm stop on RPL exit
|
|
{
|
|
bDbgRPL = bEnable; // change stop on RPL exit flag
|
|
return;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* EmuEnableSkipInterruptCode
|
|
*****************************************************************************
|
|
*
|
|
* @func enable/disable skip single step execution inside the interrupt
|
|
* handler, this option has no effect on code and data breakpoints
|
|
*
|
|
* @xref none
|
|
*
|
|
* @rdesc VOID
|
|
*
|
|
****************************************************************************/
|
|
|
|
DECLSPEC VOID CALLBACK EmuEnableSkipInterruptCode(
|
|
BOOL bEnable) // @parm TRUE = skip code instructions
|
|
// inside interrupt service routine
|
|
{
|
|
bDbgSkipInt = bEnable; // change skip interrupt code flag
|
|
return;
|
|
}
|