2024-03-20 07:41:14 +01:00
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/*
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* ops.h
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*
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* This file is part of Emu48
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*
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* Copyright (C) 1995 Sebastien Carlier
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*
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*/
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#define NFunpack(a, b, f) Nunpack((a)+F_s[f], b, F_l[f])
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#define NFread(a, b, f) Nread((a)+F_s[f], b, F_l[f])
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#define NFwrite(a, b, f) Nwrite((a)+F_s[f], b, F_l[f])
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#define NFcopy(a, b, f) memcpy((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define NFxchg(a, b, f) Nxchg((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define NFadd(a, b, f) Nadd((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define NFsub(a, b, f) Nsub((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define NFrsub(a, b, f) Nrsub((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define NFand(a, b, f) Nand((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define NFor(a, b, f) Nor((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define NFzero(a,f) memset((a)+F_s[f], 0, F_l[f])
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#define NFpack(a, f) Npack((a)+F_s[f], F_l[f])
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#define NFinc(a, f) Ninc(a, F_l[f], F_s[f])
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#define NFdec(a, f) Ndec(a, F_l[f], F_s[f])
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#define NFnot(a, f) Nnot((a)+F_s[f], F_l[f])
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#define NFneg(a, f) Nneg((a)+F_s[f], F_l[f])
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#define NFsl(a, f) Nsl((a)+F_s[f], F_l[f])
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#define NFsr(a, f) Nsr((a)+F_s[f], F_l[f])
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#define NFsrb(a, f) Nsrb((a)+F_s[f], F_l[f])
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#define TFe(a, b, f) Te((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define TFa(a, b, f) Ta((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define TFb(a, b, f) Tb((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define TFz(a, f) Tz((a)+F_s[f], F_l[f])
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#define TFne(a, b, f) Tne((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define TFae(a, b, f) Tae((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define TFbe(a, b, f) Tbe((a)+F_s[f], (b)+F_s[f], F_l[f])
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#define TFnz(a, f) Tnz((a)+F_s[f], F_l[f])
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static __inline LPBYTE FASTPTR(DWORD d)
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{
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2024-03-20 07:46:28 +01:00
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static BYTE pbyNULL[21];
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2024-03-20 07:41:14 +01:00
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LPBYTE lpbyPage;
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2024-03-20 07:46:28 +01:00
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DWORD u, v;
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2024-03-20 07:41:14 +01:00
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d &= 0xFFFFF; // handle address overflows
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2024-03-20 07:46:28 +01:00
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u = d >> 12; // page
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v = d & 0xFFF; // offset
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2024-03-20 07:41:14 +01:00
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2024-03-20 07:46:28 +01:00
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if ( !(Chipset.IOCfig && ((d & 0xFFFC0) == Chipset.IOBase))
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&& RMap[u] != NULL // page valid
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2024-03-20 07:46:28 +01:00
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&& ( v < 0x1000 - ARRAYSIZEOF(pbyNULL) // complete opcode inside page
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2024-03-20 07:46:28 +01:00
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// or next page continue linear addressing
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|| (RMap[u] + 0x1000 == RMap[(u+1) & (ARRAYSIZEOF(RMap)-1)])
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)
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)
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2024-03-20 07:41:14 +01:00
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{
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2024-03-20 07:46:28 +01:00
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lpbyPage = RMap[u] + v; // full address
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2024-03-20 07:41:14 +01:00
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}
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else
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{
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lpbyPage = pbyNULL; // memory allocation
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2024-03-20 07:46:28 +01:00
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Npeek(lpbyPage, d, ARRAYSIZEOF(pbyNULL)); // fill with data (LAHEX + 16 digits = longest opcode)
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2024-03-20 07:41:14 +01:00
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}
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return lpbyPage;
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}
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static __inline void rstkpush(DWORD d)
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{
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Chipset.rstk[Chipset.rstkp] = d;
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Chipset.rstkp=(Chipset.rstkp+1)&7;
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}
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2024-03-20 07:46:27 +01:00
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static __inline DWORD rstkpop(VOID)
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2024-03-20 07:41:14 +01:00
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{
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DWORD r;
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Chipset.rstkp=(Chipset.rstkp-1)&7;
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r = Chipset.rstk[Chipset.rstkp];
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Chipset.rstk[Chipset.rstkp] = 0;
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return r;
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}
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static __inline DWORD Npack(BYTE *a, UINT s)
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{
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DWORD r = 0;
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while (s--) r = (r<<4)|a[s];
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return r;
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}
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static __inline VOID Nunpack(BYTE *a, DWORD b, UINT s)
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{
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2024-03-20 07:46:28 +01:00
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for (; s>0; --s) { *a++ = (BYTE)(b&0xf); b>>=4; }
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2024-03-20 07:41:14 +01:00
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}
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static __inline QWORD Npack64(BYTE *a, UINT s)
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{
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QWORD r = 0;
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while (s--) r = (r<<4)|a[s];
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return r;
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}
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static __inline VOID Nunpack64(BYTE *a, QWORD b, UINT s)
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{
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UINT i;
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for (i=0; i<s; i++) { a[i] = (BYTE)(b&0xf); b>>=4; }
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}
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static __inline void Nxchg(BYTE *a, BYTE *b, UINT s)
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{
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BYTE X[16];
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memcpy(X, b, s);
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memcpy(b, a, s);
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memcpy(a, X, s);
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}
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static __inline void Ninc(BYTE *a, UINT s, UINT d)
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{
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UINT i;
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if (Chipset.mode_dec)
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{
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BYTE c = 1;
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for (i=d; i<s+d; ++i)
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{
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// no register wrap
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_ASSERT(i < ARRAYSIZEOF(((CHIPSET *) NULL)->A));
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// illegal number in dec mode
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if (a[i] >= 10) a[i] &= 0x7;
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a[i] += c;
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c = (a[i] >= 10);
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if (c) a[i] -= 10;
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}
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Chipset.carry = (c==1);
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}
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else
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{
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for (i=d; i<s+d; ++i)
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{
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// no register wrap
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_ASSERT(i < ARRAYSIZEOF(((CHIPSET *) NULL)->A));
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a[i]++;
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if (a[i] < 16)
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{
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Chipset.carry = FALSE;
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return;
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}
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a[i] -= 16;
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}
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Chipset.carry = TRUE;
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}
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}
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static __inline void Ninc16(BYTE *a, UINT s, UINT d)
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{
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UINT i;
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for (i=d; i<s+d; ++i)
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{
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a[i&0xf]++;
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if (a[i&0xf] < 16)
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{
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Chipset.carry = FALSE;
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return;
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}
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a[i&0xf] -= 16;
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}
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Chipset.carry = TRUE;
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}
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static __inline void Nincx(BYTE *a, UINT s)
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{
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UINT i;
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for (i=0; i<s; ++i)
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{
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a[i]++;
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if (a[i] < 16)
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{
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Chipset.carry = FALSE;
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return;
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}
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a[i] -= 16;
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}
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2024-03-20 07:46:27 +01:00
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Chipset.carry = TRUE;
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2024-03-20 07:41:14 +01:00
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}
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static __inline void Ndec(BYTE *a, UINT s, UINT d)
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{
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UINT i;
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BYTE cBase = Chipset.mode_dec ? 10 : 16;
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for (i=d; i<s+d; ++i)
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{
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// no register wrap
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_ASSERT(i < ARRAYSIZEOF(((CHIPSET *) NULL)->A));
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a[i]--;
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if ((a[i] & 0xF0) == 0) // check overflow
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{
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Chipset.carry = FALSE;
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return;
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}
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a[i] += cBase;
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}
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Chipset.carry = TRUE;
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}
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static __inline void Ndec16(BYTE *a, UINT s, UINT d)
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{
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UINT i;
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for (i=d; i<s+d; ++i)
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{
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a[i&0xf]--;
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if (a[i&0xf] < 16)
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{
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Chipset.carry = FALSE;
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return;
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}
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a[i&0xf] += 16;
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}
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Chipset.carry = TRUE;
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}
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static __inline void Nadd(BYTE *a, BYTE *b, UINT s)
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{
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UINT i;
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BYTE c = 0;
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BYTE cBase = Chipset.mode_dec ? 10 : 16;
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for (i=0; i<s; ++i)
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{
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// illegal number in dec mode
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if (a[i] >= cBase) a[i] &= 0x7;
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a[i] += b[i] + c;
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if (a[i] >= cBase)
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{
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a[i] -= cBase;
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c = 1;
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}
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else
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c = 0;
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}
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Chipset.carry = (c==1);
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}
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static __inline void Nsub(BYTE *a, BYTE *b, UINT s)
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{
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UINT i;
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BYTE c = 0;
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BYTE cBase = Chipset.mode_dec ? 10 : 16;
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for (i=0; i<s; ++i)
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{
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a[i] = a[i] - b[i] - c;
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if ((a[i] & 0xF0) != 0) // check overflow
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{
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a[i] += cBase;
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// illegal number in dec mode
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if ((a[i] & 0xF0) != 0) a[i] &= 0x7;
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c = 1;
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}
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else
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c = 0;
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}
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Chipset.carry = (c==1);
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}
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static __inline void Nrsub(BYTE *a, BYTE *b, UINT s)
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{
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UINT i;
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BYTE c = 0;
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BYTE cBase = Chipset.mode_dec ? 10 : 16;
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for (i=0; i<s; ++i)
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{
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a[i] = b[i] - a[i] - c;
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if ((a[i] & 0xF0) != 0) // check overflow
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{
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a[i] += cBase;
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// illegal number in dec mode
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if ((a[i] & 0xF0) != 0) a[i] &= 0x7;
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c = 1;
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}
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else
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c = 0;
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}
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Chipset.carry = (c==1);
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}
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static __inline void Nand(BYTE *a, BYTE *b, UINT s)
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{
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while (s--) a[s] &= b[s];
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}
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static __inline void Nor(BYTE *a, BYTE *b, UINT s)
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{
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while (s--) a[s] |= b[s];
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}
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static __inline void Nnot(BYTE *a, UINT s)
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{
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BYTE cBase = Chipset.mode_dec ? 9 : 15;
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while (s--)
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{
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a[s] = cBase - a[s];
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if ((a[s] & 0xF0) != 0) // check overflow (dec mode only)
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a[s] &= 0x7;
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}
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Chipset.carry = FALSE;
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}
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static __inline void Nneg(BYTE *a, UINT s)
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{
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UINT i;
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for (i=0; i<s && a[i]==0; ++i) { } // search for non-zero digit
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if ((Chipset.carry = (i!=s))) // value was non-zero
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{
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BYTE cBase = Chipset.mode_dec ? 9 : 15;
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_ASSERT(a[i] > 0); // check for non-zero digit
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for (--a[i]; i<s; ++i)
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{
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a[i] = cBase - a[i];
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if ((a[i] & 0xF0) != 0) // check overflow (dec mode only)
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a[i] &= 0x7;
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}
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}
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}
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static __inline void Nsl(BYTE *a, UINT s)
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{
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while (--s) a[s] = a[s-1];
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*a = 0;
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}
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static __inline void Nslc(BYTE *a, UINT s)
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{
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BYTE c = a[s-1];
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while (--s) a[s] = a[s-1];
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*a = c;
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}
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static __inline void Nsr(BYTE *a, UINT s)
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{
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if (*a) Chipset.HST |= SB;
|
|
|
|
while (--s) { *a = a[1]; a++; }
|
|
|
|
*a = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Nsrc(BYTE *a, UINT s)
|
|
|
|
{
|
|
|
|
BYTE c = *a;
|
|
|
|
|
|
|
|
if (c) Chipset.HST |= SB;
|
|
|
|
while (--s) { *a = a[1]; a++; }
|
|
|
|
*a = c;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Nsrb(BYTE *a, UINT s)
|
|
|
|
{
|
|
|
|
if (*a & 1) Chipset.HST |= SB;
|
|
|
|
while (--s)
|
|
|
|
{
|
|
|
|
*a >>= 1;
|
|
|
|
*a |= ((a[1] & 1) << 3);
|
|
|
|
a++;
|
|
|
|
}
|
|
|
|
*a >>= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Nbit0(BYTE *a, UINT b)
|
|
|
|
{
|
|
|
|
a[b>>2] &= ~(1<<(b&3));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Nbit1(BYTE *a, UINT b)
|
|
|
|
{
|
|
|
|
a[b>>2] |= 1<<(b&3);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tbit0(BYTE *a, UINT b)
|
|
|
|
{
|
2024-03-20 07:46:27 +01:00
|
|
|
Chipset.carry = ((a[b>>2] & (1<<(b&3))) == 0);
|
2024-03-20 07:41:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tbit1(BYTE *a, UINT b)
|
|
|
|
{
|
2024-03-20 07:46:27 +01:00
|
|
|
Chipset.carry = ((a[b>>2] & (1<<(b&3))) != 0);
|
2024-03-20 07:41:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Te(BYTE *a, BYTE *b, UINT s)
|
|
|
|
{
|
|
|
|
while (s--)
|
|
|
|
{
|
|
|
|
if (a[s]!=b[s])
|
|
|
|
{
|
|
|
|
Chipset.carry = FALSE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
Chipset.carry = TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tne(BYTE *a, BYTE *b, UINT s)
|
|
|
|
{
|
|
|
|
while (s--)
|
|
|
|
{
|
|
|
|
if (a[s]!=b[s])
|
|
|
|
{
|
|
|
|
Chipset.carry = TRUE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
Chipset.carry = FALSE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tz(BYTE *a, UINT s)
|
|
|
|
{
|
|
|
|
while (s--)
|
|
|
|
{
|
|
|
|
if (a[s]!=0)
|
|
|
|
{
|
|
|
|
Chipset.carry = FALSE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
Chipset.carry = TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tnz(BYTE *a, UINT s)
|
|
|
|
{
|
|
|
|
while (s--)
|
|
|
|
{
|
|
|
|
if (a[s]!=0)
|
|
|
|
{
|
|
|
|
Chipset.carry = TRUE;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
Chipset.carry = FALSE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Ta(BYTE *a, BYTE *b, UINT s)
|
|
|
|
{
|
|
|
|
while (--s) if (a[s]!=b[s]) break;
|
2024-03-20 07:46:27 +01:00
|
|
|
Chipset.carry = (a[s]>b[s]);
|
2024-03-20 07:41:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tb(BYTE *a, BYTE *b, UINT s)
|
|
|
|
{
|
|
|
|
while (--s) if (a[s]!=b[s]) break;
|
2024-03-20 07:46:27 +01:00
|
|
|
Chipset.carry = (a[s]<b[s]);
|
2024-03-20 07:41:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tae(BYTE *a, BYTE *b, UINT s)
|
|
|
|
{
|
|
|
|
while (--s) if (a[s]!=b[s]) break;
|
2024-03-20 07:46:27 +01:00
|
|
|
Chipset.carry = (a[s]>=b[s]);
|
2024-03-20 07:41:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void Tbe(BYTE *a, BYTE *b, UINT s)
|
|
|
|
{
|
|
|
|
while (--s) if (a[s]!=b[s]) break;
|
2024-03-20 07:46:27 +01:00
|
|
|
Chipset.carry = (a[s]<=b[s]);
|
2024-03-20 07:41:14 +01:00
|
|
|
}
|