625fd3f663
Signed-off-by: Gwenhael Le Moine <gwenhael.le.moine@gmail.com>
99 lines
2.5 KiB
C
99 lines
2.5 KiB
C
/*
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* external.c
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*
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* This file is part of Emu48
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*
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* Copyright (C) 1995 Sebastien Carlier
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* Copyright (C) 2005 Christoph Gießelink
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*
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*/
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#include "pch.h"
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#include "Emu48.h"
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#include "ops.h"
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//| 38G | 39G | 40G | 48SX | 48GX | 49G | Name
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//#F0E4F #80F0F #80F0F #706D2 #80850 #80F0F =SFLAG53_56
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// memory address for flags -53 to -56
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#define SFLAG53_56 ( (cCurrentRomType=='6') \
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? 0xE0E4F \
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: ( (cCurrentRomType=='A') \
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? 0xF0E4F \
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: ( (cCurrentRomType!='E' && cCurrentRomType!='X') \
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? ( (cCurrentRomType=='S') \
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? 0x706D2 \
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: 0x80850 \
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) \
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: 0x80F0F \
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) \
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) \
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)
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VOID External(CHIPSET* w) // Beep patch
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{
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BYTE fbeep;
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DWORD freq,dur;
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freq = Npack(w->D,5); // frequency in Hz
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dur = Npack(w->C,5); // duration in ms
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Nread(&fbeep,SFLAG53_56,1); // fetch system flags -53 to -56
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w->carry = TRUE; // setting of no beep
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if (!(fbeep & 0x8) && freq) // bit -56 clear and frequency > 0 Hz
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{
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if (freq > 4400) freq = 4400; // high limit of HP (SX)
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SoundBeep(freq,dur); // beeping
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// estimate cpu cycles for beeping time (2MHz / 4MHz)
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w->cycles += dur * ((cCurrentRomType=='S') ? 2000 : 4000);
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// original routine return with...
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w->P = 0; // P=0
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w->intk = TRUE; // INTON
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w->carry = FALSE; // RTNCC
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}
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w->pc = rstkpop();
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return;
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}
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VOID RCKBp(CHIPSET* w) // ROM Check Beep patch
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{
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DWORD dw2F,dwCpuFreq;
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DWORD freq,dur;
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BYTE f,d;
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f = w->C[1]; // f = freq ctl
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d = w->C[0]; // d = duration ctl
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if (cCurrentRomType == 'S') // Clarke chip with 48S ROM
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{
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// CPU strobe frequency @ RATE 14 = 1.97MHz
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dwCpuFreq = ((14 + 1) * 524288) >> 2;
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dw2F = f * 126 + 262; // F=f*63+131
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}
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else // York chip with 48G and later ROM
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{
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// CPU strobe frequency @ RATE 27 = 3.67MHz
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// CPU strobe frequency @ RATE 29 = 3.93MHz
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dwCpuFreq = ((27 + 1) * 524288) >> 2;
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dw2F = f * 180 + 367; // F=f*90+183.5
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}
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freq = dwCpuFreq / dw2F;
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dur = (dw2F * (256 - 16 * d)) * 1000 / 2 / dwCpuFreq;
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if (freq > 4400) freq = 4400; // high limit of HP
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SoundBeep(freq,dur); // beeping
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// estimate cpu cycles for beeping time (2MHz / 4MHz)
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w->cycles += dur * ((cCurrentRomType=='S') ? 2000 : 4000);
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w->P = 0; // P=0
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w->carry = FALSE; // RTNCC
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w->pc = rstkpop();
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return;
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}
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