mirror of
https://github.com/gwenhael-le-moine/x49gp.git
synced 2024-12-26 21:58:41 +01:00
727 lines
15 KiB
C
727 lines
15 KiB
C
/* $Id: s3c2410_io_port.c,v 1.14 2008/12/11 12:18:17 ecd Exp $
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*/
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <errno.h>
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#include <x49gp.h>
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#include <s3c2410.h>
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#include <s3c2410_intc.h>
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#include <byteorder.h>
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typedef struct {
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uint32_t gpacon;
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uint32_t gpadat;
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uint32_t gpbcon;
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uint32_t gpbdat;
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uint32_t gpbup;
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uint32_t gpccon;
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uint32_t gpcdat;
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uint32_t gpcup;
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uint32_t gpdcon;
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uint32_t gpddat;
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uint32_t gpdup;
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uint32_t gpecon;
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uint32_t gpedat;
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uint32_t gpeup;
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uint32_t gpfcon;
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uint32_t gpfdat;
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uint32_t gpfup;
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uint32_t gpgcon;
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uint32_t gpgdat;
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uint32_t gpgup;
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uint32_t gphcon;
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uint32_t gphdat;
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uint32_t gphup;
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uint32_t misccr;
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uint32_t dclkcon;
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uint32_t extint0;
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uint32_t extint1;
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uint32_t extint2;
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uint32_t eintflt0;
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uint32_t eintflt1;
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uint32_t eintflt2;
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uint32_t eintflt3;
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uint32_t eintmask;
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uint32_t eintpend;
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uint32_t gstatus0;
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uint32_t gstatus1;
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uint32_t gstatus2;
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uint32_t gstatus3;
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uint32_t gstatus4;
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unsigned int nr_regs;
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s3c2410_offset_t *regs;
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x49gp_t *x49gp;
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} s3c2410_io_port_t;
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static int
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s3c2410_io_port_data_init(s3c2410_io_port_t *io)
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{
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s3c2410_offset_t regs[] = {
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S3C2410_OFFSET(IO_PORT, GPACON, 0x007fffff, io->gpacon),
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S3C2410_OFFSET(IO_PORT, GPADAT, 0x00000000, io->gpadat),
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S3C2410_OFFSET(IO_PORT, GPBCON, 0x00000000, io->gpbcon),
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S3C2410_OFFSET(IO_PORT, GPBDAT, 0x00000000, io->gpbdat),
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S3C2410_OFFSET(IO_PORT, GPBUP, 0x00000000, io->gpbup),
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S3C2410_OFFSET(IO_PORT, GPCCON, 0x00000000, io->gpccon),
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S3C2410_OFFSET(IO_PORT, GPCDAT, 0x00000000, io->gpcdat),
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S3C2410_OFFSET(IO_PORT, GPCUP, 0x00000000, io->gpcup),
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S3C2410_OFFSET(IO_PORT, GPDCON, 0x00000000, io->gpdcon),
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S3C2410_OFFSET(IO_PORT, GPDDAT, 0x0000038c, io->gpddat),
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S3C2410_OFFSET(IO_PORT, GPDUP, 0x0000f000, io->gpdup),
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S3C2410_OFFSET(IO_PORT, GPECON, 0x00000000, io->gpecon),
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S3C2410_OFFSET(IO_PORT, GPEDAT, 0x0000c7c0, io->gpedat),
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S3C2410_OFFSET(IO_PORT, GPEUP, 0x00000000, io->gpeup),
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S3C2410_OFFSET(IO_PORT, GPFCON, 0x00000000, io->gpfcon),
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S3C2410_OFFSET(IO_PORT, GPFDAT, 0x00000008, io->gpfdat),
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S3C2410_OFFSET(IO_PORT, GPFUP, 0x00000000, io->gpfup),
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S3C2410_OFFSET(IO_PORT, GPGCON, 0x00000000, io->gpgcon),
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S3C2410_OFFSET(IO_PORT, GPGDAT, 0x0000fffe, io->gpgdat),
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S3C2410_OFFSET(IO_PORT, GPGUP, 0x0000f800, io->gpgup),
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S3C2410_OFFSET(IO_PORT, GPHCON, 0x00000000, io->gphcon),
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S3C2410_OFFSET(IO_PORT, GPHDAT, 0x00000000, io->gphdat),
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S3C2410_OFFSET(IO_PORT, GPHUP, 0x00000000, io->gphup),
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S3C2410_OFFSET(IO_PORT, MISCCR, 0x00010330, io->misccr),
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S3C2410_OFFSET(IO_PORT, DCLKCON, 0x00000000, io->dclkcon),
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S3C2410_OFFSET(IO_PORT, EXTINT0, 0x00000000, io->extint0),
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S3C2410_OFFSET(IO_PORT, EXTINT1, 0x00000000, io->extint1),
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S3C2410_OFFSET(IO_PORT, EXTINT2, 0x00000000, io->extint2),
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S3C2410_OFFSET(IO_PORT, EINTFLT0, 0x00000000, io->eintflt0),
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S3C2410_OFFSET(IO_PORT, EINTFLT1, 0x00000000, io->eintflt1),
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S3C2410_OFFSET(IO_PORT, EINTFLT2, 0x00000000, io->eintflt2),
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S3C2410_OFFSET(IO_PORT, EINTFLT3, 0x00000000, io->eintflt3),
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S3C2410_OFFSET(IO_PORT, EINTMASK, 0x00fffff0, io->eintmask),
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S3C2410_OFFSET(IO_PORT, EINTPEND, 0x00000000, io->eintpend),
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S3C2410_OFFSET(IO_PORT, GSTATUS0, 0x00000001, io->gstatus0),
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S3C2410_OFFSET(IO_PORT, GSTATUS1, 0x32410002, io->gstatus1),
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S3C2410_OFFSET(IO_PORT, GSTATUS2, 0x00000001, io->gstatus2),
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S3C2410_OFFSET(IO_PORT, GSTATUS3, 0x00000000, io->gstatus3),
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S3C2410_OFFSET(IO_PORT, GSTATUS4, 0x00000000, io->gstatus4)
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};
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memset(io, 0, sizeof(s3c2410_io_port_t));
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io->regs = malloc(sizeof(regs));
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if (NULL == io->regs) {
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fprintf(stderr, "%s:%u: Out of memory\n",
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__FUNCTION__, __LINE__);
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return -ENOMEM;
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}
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memcpy(io->regs, regs, sizeof(regs));
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io->nr_regs = sizeof(regs) / sizeof(regs[0]);
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return 0;
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}
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static uint32_t
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s3c2410_scan_keys(x49gp_t *x49gp, uint32_t gpgcon, uint32_t gpgdat)
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{
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uint32_t result;
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int col, row;
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result = 0xfffe | (gpgdat & 1);
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for (col = 0; col < 8; col++) {
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switch ((gpgcon >> (2 * (col + 8))) & 3) {
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case 0: /* Input */
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case 2: /* Interrupt */
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case 3: /* Reserved */
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break;
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case 1: /* Output */
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result &= ~(1 << (col + 8));
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result |= gpgdat & (1 << (col + 8));
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if (0 == (gpgdat & (1 << (col + 8)))) {
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result &= ~(x49gp->keybycol[col]);
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}
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break;
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}
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}
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for (row = 1; row < 8; row++) {
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switch ((gpgcon >> (2 * row)) & 3) {
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case 0: /* Input */
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case 2: /* Interrupt */
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case 3: /* Reserved */
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break;
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case 1: /* Output */
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result &= ~(1 << row);
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result |= gpgdat & (1 << row);
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if (0 == (gpgdat & (1 << row))) {
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result &= ~(x49gp->keybyrow[row] << 8);
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}
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break;
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}
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}
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return result;
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}
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static uint32_t
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s3c2410_io_port_read(void *opaque, target_phys_addr_t offset)
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{
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s3c2410_io_port_t *io = opaque;
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s3c2410_offset_t *reg;
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#ifdef QEMU_OLD
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offset -= S3C2410_IO_PORT_BASE;
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#endif
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if (! S3C2410_OFFSET_OK(io, offset)) {
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fprintf(stderr, "%s:%u: offset %08x not OK\n", __FUNCTION__, __LINE__, offset);
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abort();
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return ~(0);
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}
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reg = S3C2410_OFFSET_ENTRY(io, offset);
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switch (offset) {
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case S3C2410_IO_PORT_MISCCR:
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// if (io->x49gp->arm->NresetSig != LOW) {
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*(reg->datap) |= 0x00010000;
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// }
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break;
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case S3C2410_IO_PORT_GPCDAT:
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if (0 == ((io->gpccon >> 30) & 3)) {
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*(reg->datap) |= 0x8000;
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}
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if (0 == ((io->gpccon >> 28) & 3)) {
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*(reg->datap) |= 0x4000;
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}
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if (0 == ((io->gpccon >> 26) & 3)) {
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*(reg->datap) |= 0x2000;
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}
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if (0 == ((io->gpccon >> 24) & 3)) {
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*(reg->datap) |= 0x1000;
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}
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break;
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case S3C2410_IO_PORT_GPDDAT:
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if (0 == ((io->gpdcon >> 6) & 3)) {
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*(reg->datap) |= 0x0008;
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}
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break;
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case S3C2410_IO_PORT_GPEDAT:
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if (0 == ((io->gpecon >> 30) & 3)) {
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*(reg->datap) |= 0x8000;
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}
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if (0 == ((io->gpecon >> 28) & 3)) {
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*(reg->datap) |= 0x4000;
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}
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break;
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case S3C2410_IO_PORT_GPFDAT:
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#if 1
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if (1 != ((io->gpfcon >> 6) & 3)) {
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*(reg->datap) |= 0x0008;
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}
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#endif
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break;
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case S3C2410_IO_PORT_GPGDAT:
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*(reg->datap) = s3c2410_scan_keys(io->x49gp, io->gpgcon, *(reg->datap));
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break;
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case S3C2410_IO_PORT_GPHDAT:
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if (0 == ((io->gphcon >> 14) & 3)) {
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*(reg->datap) |= 0x80;
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}
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if (0 == ((io->gphcon >> 12) & 3)) {
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*(reg->datap) &= ~(0x40);
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}
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break;
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}
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("read %s [%08x] %s [%08x] data %08x\n",
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"s3c2410-io-port", S3C2410_IO_PORT_BASE,
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reg->name, offset, *(reg->datap));
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#endif
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return *(reg->datap);
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}
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static void
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s3c2410_io_port_write(void *opaque, target_phys_addr_t offset, uint32_t data)
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{
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s3c2410_io_port_t *io = opaque;
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s3c2410_offset_t *reg;
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uint32_t change;
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static uint32_t lcd_data = 0;
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#ifdef QEMU_OLD
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offset -= S3C2410_IO_PORT_BASE;
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#endif
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if (! S3C2410_OFFSET_OK(io, offset)) {
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return;
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}
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reg = S3C2410_OFFSET_ENTRY(io, offset);
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("write %s [%08x] %s [%08x] data %08x\n",
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"s3c2410-io-port", S3C2410_IO_PORT_BASE,
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reg->name, offset, data);
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#endif
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switch (offset) {
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case S3C2410_IO_PORT_GPDDAT:
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change = *(reg->datap) ^ data;
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*(reg->datap) = data;
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if (!(data & 0x200) && (change & 0x200)) {
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lcd_data = 0;
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}
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if (!(data & 0x200) && (data & 0x2000) && (change & 0x2000)) {
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("IO_PORT GPDDAT: clk0 rise: data %u\n",
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(data >> 12) & 1);
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#endif
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lcd_data <<= 1;
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lcd_data |= (data >> 12) & 1;
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}
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if ((data & 0x200) && (change & 0x200)) {
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("IO_PORT GPDDAT: cs0 rise: data %04x\n",
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lcd_data);
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#endif
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}
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break;
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case S3C2410_IO_PORT_MISCCR:
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*(reg->datap) = data;
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if (!(*(reg->datap) & 0x00010000)) {
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*(reg->datap) = 0x10330;
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// if (io->x49gp->arm->NresetSig != LOW) {
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// io->x49gp->arm->NresetSig = LOW;
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// io->x49gp->arm->Exception++;
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// }
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}
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break;
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case S3C2410_IO_PORT_GSTATUS0:
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case S3C2410_IO_PORT_GSTATUS1:
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/* read only */
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break;
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case S3C2410_IO_PORT_GSTATUS2:
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*(reg->datap) &= ~(data & 7);
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break;
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case S3C2410_IO_PORT_EINTPEND:
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*(reg->datap) &= ~(data);
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if (0 == (*(reg->datap) & 0x000000f0))
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s3c2410_intc_deassert(io->x49gp, EINT4_7);
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if (0 == (*(reg->datap) & 0x00ffff00))
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s3c2410_intc_deassert(io->x49gp, EINT8_23);
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break;
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default:
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*(reg->datap) = data;
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break;
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}
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}
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void
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s3c2410_io_port_g_set_bit(x49gp_t *x49gp, int n, uint32_t set)
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{
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s3c2410_io_port_t *io = x49gp->s3c2410_io_port;
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uint32_t value, change;
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int pending, level;
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if (n > 7)
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return;
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// g_mutex_lock(x49gp->memlock);
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io->gpgdat = s3c2410_scan_keys(x49gp, io->gpgcon, io->gpgdat);
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("IO_PORT: %s GPG bit %u\n", set ? "assert" : "deassert", n);
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printf("IO_PORT: GPGCON %08x, GPGDAT %08x\n", io->gpgcon, io->gpgdat);
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#endif
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if (0 == set) {
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value = 1;
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} else {
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if ((((io->gpgcon >> (2 * (n + 8))) & 3) == 1) &&
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(((io->gpgdat >> (n + 8)) & 1) == 0)) {
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value = 0;
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} else {
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value = 1;
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}
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}
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("IO_PORT: GPG bit %u value: %u\n", n, value);
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#endif
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change = 0;
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switch ((io->gpgcon >> (2 * n)) & 3) {
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case 0: /* Input */
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io->gpgdat &= ~(1 << n);
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io->gpgdat |= (value << n);
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goto out;
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case 2: /* Interrupt */
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change = io->gpgdat ^ (value << n);
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io->gpgdat &= ~(1 << n);
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io->gpgdat |= (value << n);
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break;
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case 1: /* Output */
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case 3: /* Reserved */
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goto out;
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}
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("IO_PORT: GPGDAT %08x, change %08x\n", io->gpgdat, change);
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#endif
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pending = -1;
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level = 0;
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switch ((io->extint1 >> (4 * n)) & 7) {
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case 0: /* Low Level */
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if (!(io->gpgdat & (1 << n)))
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pending = n;
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level = 1;
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break;
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case 1: /* High Level */
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if (io->gpgdat & (1 << n))
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pending = n;
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level = 1;
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break;
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case 2: /* Falling Edge */
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case 3:
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if ((change & (1 << n)) && !(io->gpgdat & (1 << n)))
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pending = n;
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break;
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case 4: /* Rising Edge */
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case 5:
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if ((change & (1 << n)) && (io->gpgdat & (1 << n)))
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pending = n;
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break;
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case 6: /* Any Edge */
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case 7:
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if (change & (1 << n))
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pending = n;
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break;
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}
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#ifdef DEBUG_S3C2410_IO_PORT
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printf("IO_PORT: IRQ: %d, (Level %u)\n", pending, level);
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#endif
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if (-1 == pending)
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goto out;
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io->eintpend |= 1 << (n + 8);
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if (io->eintpend & ~(io->eintmask))
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s3c2410_intc_assert(x49gp, EINT8_23, 1);
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out:
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// g_mutex_unlock(x49gp->memlock);
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return;
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}
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void
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s3c2410_io_port_f_set_bit(x49gp_t *x49gp, int n, uint32_t value)
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{
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s3c2410_io_port_t *io = x49gp->s3c2410_io_port;
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uint32_t change;
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int pending, level;
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if (n > 7)
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return;
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// g_mutex_lock(x49gp->memlock);
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change = 0;
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switch ((io->gpfcon >> (2 * n)) & 3) {
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case 0: /* Input */
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io->gpfdat &= ~(1 << n);
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io->gpfdat |= (value << n);
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goto out;
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case 2: /* Interrupt */
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change = io->gpfdat ^ (value << n);
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io->gpfdat &= ~(1 << n);
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io->gpfdat |= (value << n);
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break;
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case 1: /* Output */
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case 3: /* Reserved */
|
|
goto out;
|
|
}
|
|
|
|
pending = -1;
|
|
level = 0;
|
|
switch ((io->extint0 >> (4 * n)) & 7) {
|
|
case 0: /* Low Level */
|
|
if (!(io->gpfdat & (1 << n)))
|
|
pending = n;
|
|
level = 1;
|
|
break;
|
|
|
|
case 1: /* High Level */
|
|
if (io->gpfdat & (1 << n))
|
|
pending = n;
|
|
level = 1;
|
|
break;
|
|
|
|
case 2: /* Falling Edge */
|
|
case 3:
|
|
if ((change & (1 << n)) && !(io->gpfdat & (1 << n)))
|
|
pending = n;
|
|
break;
|
|
|
|
case 4: /* Rising Edge */
|
|
case 5:
|
|
if ((change & (1 << n)) && (io->gpfdat & (1 << n)))
|
|
pending = n;
|
|
break;
|
|
|
|
case 6: /* Any Edge */
|
|
case 7:
|
|
if (change & (1 << n))
|
|
pending = n;
|
|
break;
|
|
}
|
|
|
|
if (-1 == pending)
|
|
goto out;
|
|
|
|
switch (n) {
|
|
case 0:
|
|
s3c2410_intc_assert(x49gp, EINT0, level);
|
|
break;
|
|
case 1:
|
|
s3c2410_intc_assert(x49gp, EINT1, level);
|
|
break;
|
|
case 2:
|
|
s3c2410_intc_assert(x49gp, EINT2, level);
|
|
break;
|
|
case 3:
|
|
s3c2410_intc_assert(x49gp, EINT3, level);
|
|
break;
|
|
case 4:
|
|
case 5:
|
|
case 6:
|
|
case 7:
|
|
io->eintpend |= (1 << n);
|
|
if (io->eintpend & ~(io->eintmask))
|
|
s3c2410_intc_assert(x49gp, EINT4_7, 1);
|
|
break;
|
|
}
|
|
|
|
out:
|
|
// g_mutex_unlock(x49gp->memlock);
|
|
|
|
return;
|
|
}
|
|
|
|
static int
|
|
s3c2410_io_port_load(x49gp_module_t *module, GKeyFile *key)
|
|
{
|
|
s3c2410_io_port_t *io = module->user_data;
|
|
s3c2410_offset_t *reg;
|
|
int error = 0;
|
|
int i;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
for (i = 0; i < io->nr_regs; i++) {
|
|
reg = &io->regs[i];
|
|
|
|
if (NULL == reg->name)
|
|
continue;
|
|
|
|
if (x49gp_module_get_u32(module, key, reg->name,
|
|
reg->reset, reg->datap))
|
|
error = -EAGAIN;
|
|
}
|
|
|
|
return error;
|
|
}
|
|
|
|
static int
|
|
s3c2410_io_port_save(x49gp_module_t *module, GKeyFile *key)
|
|
{
|
|
s3c2410_io_port_t *io = module->user_data;
|
|
s3c2410_offset_t *reg;
|
|
int i;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
for (i = 0; i < io->nr_regs; i++) {
|
|
reg = &io->regs[i];
|
|
|
|
if (NULL == reg->name)
|
|
continue;
|
|
|
|
x49gp_module_set_u32(module, key, reg->name, *(reg->datap));
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
s3c2410_io_port_reset(x49gp_module_t *module, x49gp_reset_t reset)
|
|
{
|
|
s3c2410_io_port_t *io = module->user_data;
|
|
s3c2410_offset_t *reg;
|
|
int i;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
if (reset == X49GP_RESET_POWER_OFF) {
|
|
io->gstatus2 = 2;
|
|
return 0;
|
|
}
|
|
|
|
for (i = 0; i < io->nr_regs; i++) {
|
|
reg = &io->regs[i];
|
|
|
|
if (NULL == reg->name)
|
|
continue;
|
|
|
|
*(reg->datap) = reg->reset;
|
|
}
|
|
|
|
if (reset == X49GP_RESET_WATCHDOG) {
|
|
io->gstatus2 = 4;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static CPUReadMemoryFunc *s3c2410_io_port_readfn[] =
|
|
{
|
|
s3c2410_io_port_read,
|
|
s3c2410_io_port_read,
|
|
s3c2410_io_port_read
|
|
};
|
|
|
|
static CPUWriteMemoryFunc *s3c2410_io_port_writefn[] =
|
|
{
|
|
s3c2410_io_port_write,
|
|
s3c2410_io_port_write,
|
|
s3c2410_io_port_write
|
|
};
|
|
|
|
static int
|
|
s3c2410_io_port_init(x49gp_module_t *module)
|
|
{
|
|
s3c2410_io_port_t *io;
|
|
int iotype;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
io = malloc(sizeof(s3c2410_io_port_t));
|
|
if (NULL == io) {
|
|
fprintf(stderr, "%s:%u: Out of memory\n",
|
|
__FUNCTION__, __LINE__);
|
|
return -ENOMEM;
|
|
}
|
|
if (s3c2410_io_port_data_init(io)) {
|
|
free(io);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
module->user_data = io;
|
|
module->x49gp->s3c2410_io_port = io;
|
|
io->x49gp = module->x49gp;
|
|
|
|
#ifdef QEMU_OLD
|
|
iotype = cpu_register_io_memory(0, s3c2410_io_port_readfn,
|
|
s3c2410_io_port_writefn, io);
|
|
#else
|
|
iotype = cpu_register_io_memory(s3c2410_io_port_readfn,
|
|
s3c2410_io_port_writefn, io);
|
|
#endif
|
|
printf("%s: iotype %08x\n", __FUNCTION__, iotype);
|
|
cpu_register_physical_memory(S3C2410_IO_PORT_BASE, S3C2410_MAP_SIZE, iotype);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
s3c2410_io_port_exit(x49gp_module_t *module)
|
|
{
|
|
s3c2410_io_port_t *io;
|
|
|
|
#ifdef DEBUG_X49GP_MODULES
|
|
printf("%s: %s:%u\n", module->name, __FUNCTION__, __LINE__);
|
|
#endif
|
|
|
|
if (module->user_data) {
|
|
io = module->user_data;
|
|
if (io->regs)
|
|
free(io->regs);
|
|
free(io);
|
|
}
|
|
|
|
x49gp_module_unregister(module);
|
|
free(module);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
x49gp_s3c2410_io_port_init(x49gp_t *x49gp)
|
|
{
|
|
x49gp_module_t *module;
|
|
|
|
if (x49gp_module_init(x49gp, "s3c2410-io-port",
|
|
s3c2410_io_port_init,
|
|
s3c2410_io_port_exit,
|
|
s3c2410_io_port_reset,
|
|
s3c2410_io_port_load,
|
|
s3c2410_io_port_save,
|
|
NULL, &module)) {
|
|
return -1;
|
|
}
|
|
|
|
return x49gp_module_register(module);
|
|
}
|