mirror of
https://github.com/colby-swandale/waterfoul
synced 2024-12-26 21:58:54 +01:00
rename line gpu line methods
This commit is contained in:
parent
15005532e3
commit
d632b015c1
1 changed files with 16 additions and 28 deletions
|
@ -60,7 +60,7 @@ module Waterfoul
|
||||||
@mode = 0
|
@mode = 0
|
||||||
@modeclock = 0
|
@modeclock = 0
|
||||||
@auxillary_modeclock = 0
|
@auxillary_modeclock = 0
|
||||||
set_current_line 0
|
reset_current_line
|
||||||
@window_line = 0
|
@window_line = 0
|
||||||
@vblank_line = 0
|
@vblank_line = 0
|
||||||
|
|
||||||
|
@ -83,7 +83,7 @@ module Waterfoul
|
||||||
@modeclock -= VRAM_SCANLINE_TIME
|
@modeclock -= VRAM_SCANLINE_TIME
|
||||||
@mode = H_BLANK_STATE
|
@mode = H_BLANK_STATE
|
||||||
scanline
|
scanline
|
||||||
update_stat
|
update_stat_mode
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
@ -92,7 +92,7 @@ module Waterfoul
|
||||||
@modeclock -= OAM_SCANLINE_TIME
|
@modeclock -= OAM_SCANLINE_TIME
|
||||||
@scanline_transfered = false
|
@scanline_transfered = false
|
||||||
@mode = VMRAM_READ_STATE
|
@mode = VMRAM_READ_STATE
|
||||||
update_stat
|
update_stat_mode
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
|
@ -100,7 +100,7 @@ module Waterfoul
|
||||||
if @modeclock >= H_BLANK_TIME
|
if @modeclock >= H_BLANK_TIME
|
||||||
@modeclock -= H_BLANK_TIME
|
@modeclock -= H_BLANK_TIME
|
||||||
@mode = OAM_READ_STATE
|
@mode = OAM_READ_STATE
|
||||||
inc_current_line
|
next_line
|
||||||
compare_lylc
|
compare_lylc
|
||||||
|
|
||||||
if current_line == 144
|
if current_line == 144
|
||||||
|
@ -117,45 +117,38 @@ module Waterfoul
|
||||||
@window_line = 0
|
@window_line = 0
|
||||||
end
|
end
|
||||||
|
|
||||||
update_stat
|
update_stat_mode
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
def vblank
|
def vblank
|
||||||
if @auxillary_modeclock >= 456
|
if @auxillary_modeclock >= 456
|
||||||
@auxillary_modeclock = 0
|
@auxillary_modeclock -= 456
|
||||||
@vblank_line += 1
|
@vblank_line += 1
|
||||||
|
|
||||||
if @vblank_line <= 9
|
if @vblank_line <= 9
|
||||||
inc_current_line
|
next_line
|
||||||
compare_lylc
|
compare_lylc
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
if @modeclock >= 4104 && @auxillary_modeclock >= 4 && current_line == 153
|
if @modeclock >= 4104 && @auxillary_modeclock >= 4 && current_line == 153
|
||||||
set_current_line 0
|
reset_current_line
|
||||||
end
|
end
|
||||||
|
|
||||||
if @modeclock >= V_BLANK_TIME
|
if @modeclock >= V_BLANK_TIME
|
||||||
@modeclock -= V_BLANK_TIME
|
@modeclock -= V_BLANK_TIME
|
||||||
@mode = OAM_READ_STATE
|
@mode = OAM_READ_STATE
|
||||||
update_stat
|
update_stat_mode
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
def scanline
|
def scanline
|
||||||
if IO::LCDControl.screen_enabled?
|
render_bg
|
||||||
render_bg
|
|
||||||
end
|
|
||||||
end
|
end
|
||||||
|
|
||||||
def update_stat
|
def update_stat_mode
|
||||||
stat = $mmu.read_byte 0xFF41
|
stat = $mmu.read_byte 0xFF41
|
||||||
# reset byte 0-1
|
$mmu.write_byte 0xFF41, (stat & 0xFC) | (@mode & 0x3)
|
||||||
stat &= 0xFC
|
|
||||||
# set mode flag
|
|
||||||
stat |= (@mode & 0x3)
|
|
||||||
|
|
||||||
$mmu.write_byte 0xFF41, stat
|
|
||||||
end
|
end
|
||||||
|
|
||||||
def render_bg
|
def render_bg
|
||||||
|
@ -236,17 +229,12 @@ module Waterfoul
|
||||||
$mmu.read_byte LCDC_Y_COORDINATE_MEM_LOC
|
$mmu.read_byte LCDC_Y_COORDINATE_MEM_LOC
|
||||||
end
|
end
|
||||||
|
|
||||||
def set_current_line(val)
|
def reset_current_line
|
||||||
$mmu.write_byte LCDC_Y_COORDINATE_MEM_LOC, val
|
$mmu.write_byte LCDC_Y_COORDINATE_MEM_LOC, 0
|
||||||
end
|
end
|
||||||
|
|
||||||
def inc_current_line(inc_by = 1)
|
def next_line
|
||||||
curr_line = current_line
|
$mmu.write_byte LCDC_Y_COORDINATE_MEM_LOC, current_line + 1
|
||||||
$mmu.write_byte LCDC_Y_COORDINATE_MEM_LOC, (curr_line + inc_by)
|
|
||||||
end
|
|
||||||
|
|
||||||
def reset_framebuffer
|
|
||||||
raise
|
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
Loading…
Reference in a new issue