From af1cecef44996b86a0316241b957edeca42debf9 Mon Sep 17 00:00:00 2001
From: Colby Swandale <colby@taplaboratories.com>
Date: Sun, 18 Sep 2016 23:01:43 +1000
Subject: [PATCH] small cleanup and fixing up some documentation

---
 lib/waterfoul.rb           |  5 -----
 lib/waterfoul/cartridge.rb |  2 --
 lib/waterfoul/cpu.rb       | 24 ++++++++++++------------
 lib/waterfoul/mmu.rb       |  9 ++-------
 4 files changed, 14 insertions(+), 26 deletions(-)

diff --git a/lib/waterfoul.rb b/lib/waterfoul.rb
index 8dd957c..275c252 100644
--- a/lib/waterfoul.rb
+++ b/lib/waterfoul.rb
@@ -14,13 +14,8 @@ require "waterfoul/gpu"
 require "waterfoul/cartridge"
 require "waterfoul/emulator"
 require "waterfoul/input"
-require "byebug"
 
 module Waterfoul
-  # height/width of the device screen in pixels
-  SCREEN_WIDTH = 160
-  SCREEN_HEIGHT = 144
-
   BIT_0  = 0b0000_0001
   BIT_1  = 0b0000_0010
   BIT_2  = 0b0000_0100
diff --git a/lib/waterfoul/cartridge.rb b/lib/waterfoul/cartridge.rb
index 9c96007..2066e3f 100644
--- a/lib/waterfoul/cartridge.rb
+++ b/lib/waterfoul/cartridge.rb
@@ -32,14 +32,12 @@ module Waterfoul
     private
 
     # initialize the memory bank controller given the game program and the controller type
-    # @return MBC::ROM|MBC* - return iniitalized cartridge controller with game program loaded
     def cartrdige_controller type, rom
       controller_const(type).new rom
     end
 
     # return the class constant that implements the behavior of the memory bank controller
     # declared by the game cartridge
-    # @return Constant - memory bank controller class constant
     def controller_const(type_byte)
       case type_byte
       when 0x00, 0x8, 0x9
diff --git a/lib/waterfoul/cpu.rb b/lib/waterfoul/cpu.rb
index 774c23b..8f163cb 100644
--- a/lib/waterfoul/cpu.rb
+++ b/lib/waterfoul/cpu.rb
@@ -9,25 +9,23 @@ require 'waterfoul/instructions/shift'
 require 'waterfoul/instructions/prefix'
 
 module Waterfoul
-  # These constants represent status bit in the F register. These are used as a
-  # helper when setting/resetting a state bit. Any combination of these
-  # states can be set at any one time.
+  # These constants represent each status bit in the F register.
   #
   # Z_FLAG: Zero Flag
   # N_FLAG: Subtract Flag
   # H_FLAG: half carry flag
   # C_FLAG: Carry Flag
-  # BIT 0-3 Always 0 and not used
+  # BIT 0-3 Not Used
   Z_FLAG = 0b1000_0000
   N_FLAG = 0b0100_0000
   H_FLAG = 0b0010_0000
   C_FLAG = 0b0001_0000
 
   # The CPU emulates the Sharp LR35902 CPU that is built into the device,
-  # similar to the Intel 8080 and Zilog Z80 processor. Each instruction
-  # is categorized into a subset of instructions by the type of action
-  # performed by the instruction.
+  # similar to the Intel 8080 and Zilog Z80 processor.
   #
+  # Each instruction is categorized into a subset of instructions by the type of action
+  # performed by the instruction.
   # See lib/instuctions for the implementation for the CPU instruction set.
   #
   # I recommend looking at http://www.pastraiser.com/cpu/gameboy/gameboy_opcodes.html for an
@@ -46,7 +44,7 @@ module Waterfoul
 
     # 8 bit registers
     attr_reader :a, :b, :c, :d, :e, :f, :h, :l, :f
-    # CPU cycle count
+    # CPU instruction cycle count
     attr_reader :m
     # 16 bit registers
     attr_reader :sp, :pc
@@ -87,7 +85,8 @@ module Waterfoul
       @halt
     end
 
-    # Execute the instruction and
+    # execute teh instruction needed to be be perforemd by using
+    # a lookup value for the opcode table 
     def perform_instruction(instruction)
       operation = OPCODE[instruction]
       raise 'instruction not found' if operation.nil?
@@ -106,8 +105,8 @@ module Waterfoul
 
     private
 
-    # get the number of cycles a instruction takes to execute. The times
-    # can be found in the instruction opcode table
+    # get the number of cycles a instruction takes to execute. The timing
+    # for each instruction can be found in the OPCODE table (see link above)
     def instruction_cycle_time(instruction)
       if @prefix_cb
         CB_OPCODE_TIMINGS[@prefix_cb]
@@ -118,6 +117,7 @@ module Waterfoul
       end
     end
 
+    # perform any interrupts are enabled and have been requested by the program
     def serve_interrupt
       interrupt = Interrupt.pending_interrupt
       # skip if there is no interrupt to serve
@@ -146,7 +146,7 @@ module Waterfoul
       @m = 20
     end
 
-    # reset variables that are set on every instruction
+    # reset per instruction variables
     def reset_tick
       @prefix_cb = false
       @branched = false
diff --git a/lib/waterfoul/mmu.rb b/lib/waterfoul/mmu.rb
index 501ec19..7c360a8 100644
--- a/lib/waterfoul/mmu.rb
+++ b/lib/waterfoul/mmu.rb
@@ -93,17 +93,12 @@ module Waterfoul
     alias_method :write_byte, :[]=
     alias_method :read_byte, :[]
 
-    ##
-    # Read 2 bytes from memory
-    # @param addr Integer
+    # read 2 bytes from memory
     def read_word(addr)
-      self[addr] + (self[addr + 1] << 8)
+      self[addr] | (self[addr + 1] << 8)
     end
 
-    ##
     # write 2 bytes into memory given an address
-    # @param addr Integer point in memory to save word
-    # @param word Integer 2 byte value to be stored into memory
     def write_word(addr, word)
       write_byte addr, ( word & 0xFF )
       write_byte addr + 1, ( word >> 8 )