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more cleanup

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This commit is contained in:
Colby 2016-07-31 14:13:28 +10:00
parent d632b015c1
commit 322cbffc3c
1 changed files with 121 additions and 142 deletions
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35
lib/waterfoul/gpu.rb
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@ -23,14 +23,11 @@ module Waterfoul
LCDC_Y_COORDINATE_MEM_LOC = 0xFF44
def initialize
@scanline_transfered = false
@framebuffer = Array.new FRAMEBUFFER_SIZE, 0
@mode = OAM_READ_STATE
@modeclock = 0
@auxillary_modeclock = 0
@vblank_line = 0
@window_line = 0
@hide_frames = 0
@screen_enable_delay_cycles = 0
end
@ -42,13 +39,13 @@ module Waterfoul
if IO::LCDControl.screen_enabled?
case @mode
when H_BLANK_STATE
hblank
hblank if @modeclock >= H_BLANK_TIME
when V_BLANK_STATE
vblank
when OAM_READ_STATE
oam
oam if @modeclock >= OAM_SCANLINE_TIME
when VMRAM_READ_STATE
vram
vram if @modeclock >= VRAM_SCANLINE_TIME
end
else
if @screen_enable_delay_cycles > 0
@ -79,25 +76,20 @@ module Waterfoul
private
def vram
if @modeclock >= VRAM_SCANLINE_TIME
@modeclock -= VRAM_SCANLINE_TIME
@mode = H_BLANK_STATE
scanline
update_stat_mode
end
end
def oam
if @modeclock >= OAM_SCANLINE_TIME
@modeclock -= OAM_SCANLINE_TIME
@scanline_transfered = false
@mode = VMRAM_READ_STATE
update_stat_mode
end
end
def hblank
if @modeclock >= H_BLANK_TIME
@modeclock -= H_BLANK_TIME
@mode = OAM_READ_STATE
next_line
@ -105,21 +97,13 @@ module Waterfoul
if current_line == 144
@mode = V_BLANK_STATE
@vblank_line = 0
@auxillary_modeclock = @modeclock
Interrupt.request_interrupt(Interrupt::INTERRUPT_VBLANK)
if @hide_frames > 0
@hide_frames -= 1
else
@vblank = true
end
@window_line = 0
Interrupt.request_interrupt(Interrupt::INTERRUPT_VBLANK)
end
update_stat_mode
end
end
def vblank
if @auxillary_modeclock >= 456
@ -131,14 +115,13 @@ module Waterfoul
compare_lylc
end
end
if @modeclock >= 4104 && @auxillary_modeclock >= 4 && current_line == 153
reset_current_line
end
if @modeclock >= V_BLANK_TIME
@modeclock -= V_BLANK_TIME
@mode = OAM_READ_STATE
update_stat_mode
reset_current_line
@vblank_line = 0
end
end
@ -209,21 +192,17 @@ module Waterfoul
end
def compare_lylc
unless IO::LCDControl.screen_enabled?
lyc = $mmu.read_byte 0xFF45
stat = $mmu.read_byte 0xFF41
if lyc == current_line
# set BIT 2
stat |= BIT_2
else
# reset BIT 2
state &= BIT_2 ^ 0xFF
stat = stat & 0xFB
end
$mmu.write_byte 0xFF41, stat
end
end
def current_line
$mmu.read_byte LCDC_Y_COORDINATE_MEM_LOC