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7 lines
395 B
Text
7 lines
395 B
Text
DRAMSim2 is a cycle accurate model of a DRAM memory controller, the
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DRAM modules which comprise system storage, and the bus by which they
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communicate. All major components in a modern memory system are
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modeled as their own respective objects within the source, including:
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ranks, banks, command queue, the memory controller, etc.
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For setting the DEBUG mode use the enviroment variable DEBUG=1
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