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e40642159b
Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>
28 lines
1.3 KiB
Text
28 lines
1.3 KiB
Text
SimEng is a framework for building modern, cycle-accurate processor
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simulators. Its goals are to be:
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- Fast, typically 4-5X faster than gem5
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- Easy to use and modify to model desired microarchitecture
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configurations. New cores can be configured in just a few hours
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- Scalable, from simple scalar microarchitectures up to the most
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sophisticated, superscalar, out-of-order designs
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- Capable of supporting a wide range of instruction set
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architectures (ISAs), starting with Armv8 but eventually including
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RISC-V, x86, POWER, etc.
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- Accurate, aiming for simulated cycle times being within 5-10% of
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real hardware
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- Open source, with a permissive license to enable collaboration
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across academia and industry
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SimEng places an emphasis on performance and ease of use, whilst
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maintaining a clean, modern, simple and well-documented code base.
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For example, the current out-of-order (OoO) model is implemented
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in around 10,000 lines of simple C++, with another 9,000 lines or
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so implementing the specifics of the Armv8 ISA, and around 13,000
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lines of code in the accompanying test suite. SimEng should be
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simple to read and understand, making it ideal to modify to your
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requirements and include it in your projects.
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Invocation example:
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# simeng /usr/share/SimEng-0.9.4/configs/a64fx.yaml
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