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development/gcc-d: Updated for gcc version 5.5.0
This commit is contained in:
parent
00f904f96c
commit
942912810d
4 changed files with 4 additions and 143 deletions
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@ -28,8 +28,8 @@
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PRGNAM=gcc-d
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SRCNAM=gdc
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VERSION=${VERSION:-2.076.0_b3}
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GCC_VERSION=5.3.0
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BUILD=${BUILD:-1}
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GCC_VERSION=5.5.0
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BUILD=${BUILD:-2}
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TAG=${TAG:-_SBo}
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if [ -z "$ARCH" ]; then
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@ -84,8 +84,6 @@ tar xvf $CWD/$SRCNAM-$VERSION.tar.?z*
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# Apply patches.
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cd $TMP/gcc-$GCC_VERSION/gcc
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cat $CWD/gcc.66782.diff | patch -p0 --verbose
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cat $CWD/gcc.69140.diff | patch -p2 --verbose
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cd $TMP/$SRCNAM-$VERSION
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sh setup-gcc.sh ../gcc-$GCC_VERSION
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@ -1,9 +1,9 @@
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PRGNAM="gcc-d"
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VERSION="2.076.0_b3"
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HOMEPAGE="https://www.gdcproject.org/"
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DOWNLOAD="http://download.dlackware.com/slackware/slackware64-14.2/source/d/gcc/gcc-5.3.0.tar.xz \
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DOWNLOAD="http://download.dlackware.com/slackware/slackware64-14.2/patches/source/gcc/gcc-5.5.0.tar.xz \
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http://download.dlackware.com/hosted-sources/gcc-d/gdc-2.076.0_b3.tar.xz"
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MD5SUM="174cf91eff44e44205306245949ae19a \
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MD5SUM="0f70424213b4a1113c04ba66ddda0c1f \
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35cbed3c7dafbdd542db0030660602df"
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DOWNLOAD_x86_64=""
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MD5SUM_x86_64=""
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@ -1,124 +0,0 @@
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Index: config/i386/i386.md
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===================================================================
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--- config/i386/i386.md (revision 225539)
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+++ config/i386/i386.md (working copy)
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@@ -108,6 +108,7 @@
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UNSPEC_LD_MPIC ; load_macho_picbase
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UNSPEC_TRUNC_NOOP
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UNSPEC_DIV_ALREADY_SPLIT
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+ UNSPEC_MS_TO_SYSV_CALL
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UNSPEC_PAUSE
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UNSPEC_LEA_ADDR
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UNSPEC_XBEGIN_ABORT
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@@ -11584,6 +11585,15 @@
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"* return ix86_output_call_insn (insn, operands[0]);"
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[(set_attr "type" "call")])
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+(define_insn "*call_rex64_ms_sysv"
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+ [(match_parallel 2 "call_rex64_ms_sysv_operation"
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+ [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rBwBz"))
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+ (match_operand 1))
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+ (unspec [(const_int 0)] UNSPEC_MS_TO_SYSV_CALL)])]
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+ "TARGET_64BIT && !SIBLING_CALL_P (insn)"
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+ "* return ix86_output_call_insn (insn, operands[0]);"
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+ [(set_attr "type" "call")])
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+
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(define_insn "*sibcall"
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[(call (mem:QI (match_operand:W 0 "sibcall_insn_operand" "UBsBz"))
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(match_operand 1))]
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@@ -11808,6 +11818,16 @@
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(match_dup 3)))
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(unspec [(const_int 0)] UNSPEC_PEEPSIB)])])
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+(define_insn "*call_value_rex64_ms_sysv"
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+ [(match_parallel 3 "call_rex64_ms_sysv_operation"
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+ [(set (match_operand 0)
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+ (call (mem:QI (match_operand:DI 1 "call_insn_operand" "rBwBz"))
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+ (match_operand 2)))
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+ (unspec [(const_int 0)] UNSPEC_MS_TO_SYSV_CALL)])]
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+ "TARGET_64BIT && !SIBLING_CALL_P (insn)"
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+ "* return ix86_output_call_insn (insn, operands[1]);"
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+ [(set_attr "type" "callv")])
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+
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(define_expand "call_value_pop"
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[(parallel [(set (match_operand 0)
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(call (match_operand:QI 1)
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Index: config/i386/predicates.md
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===================================================================
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--- config/i386/predicates.md (revision 225533)
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+++ config/i386/predicates.md (working copy)
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@@ -616,6 +616,36 @@
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&& XINT (XEXP (op, 0), 1) == UNSPEC_GOTPCREL);
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})
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+;; Return true if OP is a call from MS ABI to SYSV ABI function.
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+(define_predicate "call_rex64_ms_sysv_operation"
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+ (match_code "parallel")
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+{
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+ unsigned creg_size = ARRAY_SIZE (x86_64_ms_sysv_extra_clobbered_registers);
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+ unsigned i;
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+
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+ if ((unsigned) XVECLEN (op, 0) != creg_size + 2)
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+ return false;
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+
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+ for (i = 0; i < creg_size; i++)
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+ {
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+ rtx elt = XVECEXP (op, 0, i+2);
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+ enum machine_mode mode;
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+ unsigned regno;
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+
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+ if (GET_CODE (elt) != CLOBBER
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+ || GET_CODE (SET_DEST (elt)) != REG)
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+ return false;
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+
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+ regno = x86_64_ms_sysv_extra_clobbered_registers[i];
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+ mode = SSE_REGNO_P (regno) ? TImode : DImode;
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+
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+ if (GET_MODE (SET_DEST (elt)) != mode
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+ || REGNO (SET_DEST (elt)) != regno)
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+ return false;
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+ }
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+ return true;
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+})
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+
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;; Match exactly zero.
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(define_predicate "const0_operand"
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(match_code "const_int,const_wide_int,const_double,const_vector")
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Index: config/i386/i386.c
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===================================================================
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--- config/i386/i386.c (revision 225533)
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+++ config/i386/i386.c (working copy)
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@@ -25639,7 +25639,9 @@
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rtx callarg2,
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rtx pop, bool sibcall)
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{
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- rtx vec[3];
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+ unsigned int const cregs_size
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+ = ARRAY_SIZE (x86_64_ms_sysv_extra_clobbered_registers);
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+ rtx vec[3 + cregs_size];
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rtx use = NULL, call;
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unsigned int vec_len = 0;
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@@ -25742,16 +25744,18 @@
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if (TARGET_64BIT_MS_ABI
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&& (!callarg2 || INTVAL (callarg2) != -2))
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{
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- int const cregs_size
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- = ARRAY_SIZE (x86_64_ms_sysv_extra_clobbered_registers);
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- int i;
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+ unsigned i;
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+ vec[vec_len++] = gen_rtx_UNSPEC (VOIDmode, gen_rtvec (1, const0_rtx),
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+ UNSPEC_MS_TO_SYSV_CALL);
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+
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for (i = 0; i < cregs_size; i++)
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{
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int regno = x86_64_ms_sysv_extra_clobbered_registers[i];
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machine_mode mode = SSE_REGNO_P (regno) ? TImode : DImode;
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- clobber_reg (&use, gen_rtx_REG (mode, regno));
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+ vec[vec_len++]
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+ = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno));
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}
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}
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@ -1,13 +0,0 @@
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--- ./gcc/config/i386/i386.c.orig 2015-11-18 09:45:26.000000000 -0600
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+++ ./gcc/config/i386/i386.c 2016-02-05 13:50:07.202981920 -0600
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@@ -9677,6 +9677,10 @@
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if (TARGET_64BIT_MS_ABI && get_frame_size () > SEH_MAX_FRAME_SIZE)
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return true;
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+ /* SSE saves require frame-pointer when stack is misaligned. */
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+ if (TARGET_64BIT_MS_ABI && ix86_incoming_stack_boundary < 128)
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+ return true;
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+
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/* In ix86_option_override_internal, TARGET_OMIT_LEAF_FRAME_POINTER
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turns off the frame pointer by default. Turn it back on now if
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we've not got a leaf function. */
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