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6957c46998
- Update to Softloat 3 from 2 - FREM and FMOD now generate the quotient bits in FPSR, required by Apple's SANE to do sin/cos/tan properly. - FMOVE of a float to a Dx integer register generates the exception status bits, fixing square roots in SANE - Rewrote how FMOVEM instructions are decoded and executed, fixing issues including skipping too few or too many opcode bytes and causing serious weird behavior. - FPU instructions all now have more realistic cycle timings for a 68881. - All FPU instructions now generate exception bits in FPSR. 3rdparty/softfloat3: Updates [R. Belmont] - Softfloat3 was always being built for a big-endian host, causing incorrect math on LE x64 and AArch64 machines. - Fixed up Softfloat3 to build properly as part of MAME and up-ported the Bochs extensions. In latest Bochs, they were only partially up-ported and Softfloat3 had been hacked up to be more like 2; here they're fixed to work with stock Softfloat3.
80 lines
2.9 KiB
C
80 lines
2.9 KiB
C
/*============================================================================
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This source file is an extension to the SoftFloat IEC/IEEE Floating-point
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Arithmetic Package, Release 2b, written for Bochs (x86 achitecture simulator)
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floating point emulation.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
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been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
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RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
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AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
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COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
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EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
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INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
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OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) the source code for the derivative work includes prominent notice that
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the work is derivative, and (2) the source code includes prominent notice with
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these four paragraphs for those parts of this code that are retained.
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=============================================================================*/
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#ifndef _FPU_CONSTANTS_H_
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#define _FPU_CONSTANTS_H_
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// Pentium CPU uses only 68-bit precision M_PI approximation
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// #define BETTER_THAN_PENTIUM
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/*============================================================================
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* Written for Bochs (x86 achitecture simulator) by
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* Stanislav Shwartsman [sshwarts at sourceforge net]
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* ==========================================================================*/
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//////////////////////////////
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// PI, PI/2, PI/4 constants
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//////////////////////////////
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#define FLOATX80_PI_EXP (0x4000)
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// 128-bit PI fraction
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#ifdef BETTER_THAN_PENTIUM
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#define FLOAT_PI_HI (uint64_t(0xc90fdaa22168c234))
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#define FLOAT_PI_LO (uint64_t(0xc4c6628b80dc1cd1))
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#else
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#define FLOAT_PI_HI (uint64_t(0xc90fdaa22168c234))
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#define FLOAT_PI_LO (uint64_t(0xC000000000000000))
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#endif
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#define FLOATX80_PI2_EXP (0x3FFF)
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#define FLOATX80_PI4_EXP (0x3FFE)
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//////////////////////////////
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// 3PI/4 constant
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//////////////////////////////
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#define FLOATX80_3PI4_EXP (0x4000)
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// 128-bit 3PI/4 fraction
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#ifdef BETTER_THAN_PENTIUM
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#define FLOAT_3PI4_HI (uint64_t(0x96cbe3f9990e91a7))
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#define FLOAT_3PI4_LO (uint64_t(0x9394c9e8a0a5159c))
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#else
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#define FLOAT_3PI4_HI (uint64_t(0x96cbe3f9990e91a7))
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#define FLOAT_3PI4_LO (uint64_t(0x9000000000000000))
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#endif
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//////////////////////////////
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// 1/LN2 constant
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//////////////////////////////
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#define FLOAT_LN2INV_EXP (0x3FFF)
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// 128-bit 1/LN2 fraction
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#ifdef BETTER_THAN_PENTIUM
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#define FLOAT_LN2INV_HI (uint64_t(0xb8aa3b295c17f0bb))
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#define FLOAT_LN2INV_LO (uint64_t(0xbe87fed0691d3e89))
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#else
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#define FLOAT_LN2INV_HI (uint64_t(0xb8aa3b295c17f0bb))
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#define FLOAT_LN2INV_LO (uint64_t(0xC000000000000000))
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#endif
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#endif
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