From e07ce9ec268c6591a6b7d2fa467d76e06095da0d Mon Sep 17 00:00:00 2001 From: cracyc Date: Sun, 21 Oct 2012 19:01:44 +0000 Subject: [PATCH] allow wp in 32-bit mode and add newline to strings (nw) --- src/emu/cpu/i386/i386ops.h | 2 +- src/mess/machine/3c503.c | 16 ++++++++-------- src/mess/machine/isa_stereo_fx.c | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/emu/cpu/i386/i386ops.h b/src/emu/cpu/i386/i386ops.h index 5d2d2ae11e5..c2050671cfa 100644 --- a/src/emu/cpu/i386/i386ops.h +++ b/src/emu/cpu/i386/i386ops.h @@ -301,7 +301,7 @@ static const X86_OPCODE x86_opcode_table[] = { 0x20, OP_2BYTE|OP_I386, I386OP(mov_r32_cr), I386OP(mov_r32_cr), }, { 0x21, OP_2BYTE|OP_I386, I386OP(mov_r32_dr), I386OP(mov_r32_dr), }, { 0x22, OP_2BYTE|OP_I386, I386OP(mov_cr_r32), I386OP(mov_cr_r32), }, - { 0x22, OP_2BYTE|OP_I486, I486OP(mov_cr_r32), I386OP(mov_cr_r32), }, + { 0x22, OP_2BYTE|OP_I486, I486OP(mov_cr_r32), I486OP(mov_cr_r32), }, { 0x23, OP_2BYTE|OP_I386, I386OP(mov_dr_r32), I386OP(mov_dr_r32), }, { 0x24, OP_2BYTE|OP_I386, I386OP(mov_r32_tr), I386OP(mov_r32_tr), }, { 0x26, OP_2BYTE|OP_I386, I386OP(mov_tr_r32), I386OP(mov_tr_r32), }, diff --git a/src/mess/machine/3c503.c b/src/mess/machine/3c503.c index d1ce2884d2a..64b7128f01e 100644 --- a/src/mess/machine/3c503.c +++ b/src/mess/machine/3c503.c @@ -121,7 +121,7 @@ READ8_MEMBER(el2_3c503_device::el2_3c503_loport_r) { case 2: return m_prom[offset + 16]; case 3: - logerror("3c503: invalid low register read, page 3"); + logerror("3c503: invalid low register read, page 3\n"); } return 0; } @@ -133,10 +133,10 @@ WRITE8_MEMBER(el2_3c503_device::el2_3c503_loport_w) { return m_dp8390->dp8390_w(space, offset, data, mem_mask); case 1: case 2: - logerror("3c503: invalid attempt to write to prom"); + logerror("3c503: invalid attempt to write to prom\n"); return; case 3: - logerror("3c503: invalid low register write, page 3"); + logerror("3c503: invalid low register write, page 3\n"); return; } } @@ -237,7 +237,7 @@ WRITE8_MEMBER(el2_3c503_device::el2_3c503_hiport_w) { m_regs.idcfr = (m_regs.idcfr & 0xf) | (data & 0xf0); break; default: - logerror("3c503: trying to set multiple irqs %X", data); + logerror("3c503: trying to set multiple irqs %X\n", data); } switch(data & 0x0f) { case 0x00: @@ -249,14 +249,14 @@ WRITE8_MEMBER(el2_3c503_device::el2_3c503_hiport_w) { case 0x08: break; default: - logerror("3c503: trying to set multiple drqs %X", data); + logerror("3c503: trying to set multiple drqs %X\n", data); } case 9: - if(m_regs.ctrl & 0x80) logerror("3c503: changing dma address during dma is undefined"); + if(m_regs.ctrl & 0x80) logerror("3c503: changing dma address during dma is undefined\n"); m_regs.da = (data << 8) | (m_regs.da & 0xff); return; case 10: - if(m_regs.ctrl & 0x80) logerror("3c503: changing dma address during dma is undefined"); + if(m_regs.ctrl & 0x80) logerror("3c503: changing dma address during dma is undefined\n"); m_regs.da = (m_regs.da & 0xff00) | data; return; case 11: @@ -279,7 +279,7 @@ WRITE8_MEMBER(el2_3c503_device::el2_3c503_hiport_w) { el2_3c503_mem_write(space, m_regs.da++, data, mem_mask); return; default: - logerror("3c503: invalid high register write %02x", offset); + logerror("3c503: invalid high register write %02x\n", offset); } } diff --git a/src/mess/machine/isa_stereo_fx.c b/src/mess/machine/isa_stereo_fx.c index d735bc569a5..858c8c20f51 100644 --- a/src/mess/machine/isa_stereo_fx.c +++ b/src/mess/machine/isa_stereo_fx.c @@ -186,7 +186,7 @@ WRITE8_MEMBER( stereo_fx_device::invalid_w ) READ8_MEMBER( stereo_fx_device::invalid_r ) { - logerror("stereo fx: invalid port write\n"); + logerror("stereo fx: invalid port read\n"); return 0xff; }