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m6809: rename *.ops to *.lst
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parent
90142acc70
commit
d3fbba3a5e
5 changed files with 8 additions and 8 deletions
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@ -1841,9 +1841,9 @@ if CPUS["M6809"] then
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}
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custombuildtask {
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{ MAME_DIR .. "src/devices/cpu/m6809/m6809.ops" , GEN_DIR .. "emu/cpu/m6809/m6809.hxx", { MAME_DIR .. "src/devices/cpu/m6809/m6809make.py" , MAME_DIR .. "src/devices/cpu/m6809/base6x09.ops" }, {"@echo Generating m6809 source file...", PYTHON .. " $(1) $(<) > $(@)" }},
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{ MAME_DIR .. "src/devices/cpu/m6809/hd6309.ops" , GEN_DIR .. "emu/cpu/m6809/hd6309.hxx", { MAME_DIR .. "src/devices/cpu/m6809/m6809make.py" , MAME_DIR .. "src/devices/cpu/m6809/base6x09.ops" }, {"@echo Generating hd6309 source file...", PYTHON .. " $(1) $(<) > $(@)" }},
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{ MAME_DIR .. "src/devices/cpu/m6809/konami.ops" , GEN_DIR .. "emu/cpu/m6809/konami.hxx", { MAME_DIR .. "src/devices/cpu/m6809/m6809make.py" , MAME_DIR .. "src/devices/cpu/m6809/base6x09.ops" }, {"@echo Generating konami source file...", PYTHON .. " $(1) $(<) > $(@)" }},
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{ MAME_DIR .. "src/devices/cpu/m6809/m6809.lst" , GEN_DIR .. "emu/cpu/m6809/m6809.hxx", { MAME_DIR .. "src/devices/cpu/m6809/m6809make.py" , MAME_DIR .. "src/devices/cpu/m6809/base6x09.lst" }, {"@echo Generating m6809 source file...", PYTHON .. " $(1) $(<) > $(@)" }},
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{ MAME_DIR .. "src/devices/cpu/m6809/hd6309.lst" , GEN_DIR .. "emu/cpu/m6809/hd6309.hxx", { MAME_DIR .. "src/devices/cpu/m6809/m6809make.py" , MAME_DIR .. "src/devices/cpu/m6809/base6x09.lst" }, {"@echo Generating hd6309 source file...", PYTHON .. " $(1) $(<) > $(@)" }},
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{ MAME_DIR .. "src/devices/cpu/m6809/konami.lst" , GEN_DIR .. "emu/cpu/m6809/konami.hxx", { MAME_DIR .. "src/devices/cpu/m6809/m6809make.py" , MAME_DIR .. "src/devices/cpu/m6809/base6x09.lst" }, {"@echo Generating konami source file...", PYTHON .. " $(1) $(<) > $(@)" }},
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}
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end
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@ -515,7 +515,7 @@ DISPATCH11:
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}
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return;
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#include "base6x09.ops"
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#include "base6x09.lst"
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PUSH_REGISTERS:
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if (m_temp.w & 0x80)
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@ -74,8 +74,8 @@ MAIN:
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case 0x39: %INDEXED; %SETLINE; return;
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case 0x3A: set_regop8(m_q.r.a); %INDEXED; %ST8; return;
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case 0x3B: set_regop8(m_q.r.b); %INDEXED; %ST8; return;
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case 0x3C: set_imm(); %ANDCC; return;
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case 0x3D: set_imm(); %ORCC; return;
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case 0x3C: set_imm(); %ANDCC; return;
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case 0x3D: set_imm(); %ORCC; return;
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case 0x3E: %EXG; return;
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case 0x3F: %TFR; return;
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@ -233,7 +233,7 @@ MAIN:
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}
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return;
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#include "base6x09.ops"
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#include "base6x09.lst"
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PUSH_REGISTERS:
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if (m_temp.w & 0x80)
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@ -340,7 +340,7 @@ DISPATCH11:
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}
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return;
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#include "base6x09.ops"
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#include "base6x09.lst"
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PUSH_REGISTERS:
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if (m_temp.w & 0x80)
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