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changela: small correction to prev commit

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hap 2023-07-11 13:39:54 +02:00
parent b7323a5f21
commit b61de16bc2
1 changed files with 3 additions and 3 deletions
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6
src/mame/taito/changela.cpp
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@ -464,7 +464,7 @@ void changela_state::draw_river(bitmap_ind16 &bitmap, int sy)
for (int sx = 0; sx < 256; sx++)
{
for (int i = 0; i < ((sx < 24) ? 2 : 4); i++)
for (int i = 0; i < ((sx < 16) ? 1 : 4); i++)
{
if (h_count > 0xff)
{
@ -658,7 +658,7 @@ void changela_state::draw_tree(bitmap_ind16 &bitmap, int sy, int tree_num)
for (int sx = 0; sx < 256; sx++)
{
for (int i = 0; i < ((sx < 24) ? 2 : 4); i++)
for (int i = 0; i < ((sx < 16) ? 1 : 4); i++)
{
if (h_count > 0xff)
{
@ -1216,7 +1216,7 @@ static INPUT_PORTS_START( changela )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_START("IN0") // 0xDx2C
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_CONDITION("DSWA", 0x20, EQUALS, 0x00) // SPARE
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSWA", 0x20, EQUALS, 0x00) // SPARE
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSWA", 0x20, EQUALS, 0x00) // SPARE
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) PORT_CONDITION("DSWA", 0x20, EQUALS, 0x20)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) PORT_CONDITION("DSWA", 0x20, EQUALS, 0x20)