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heathzenith/h89.cpp: Connect write-enable pullup on new h89bus (#12918)
This commit is contained in:
parent
864013166f
commit
b5ee6d82d2
6 changed files with 36 additions and 25 deletions
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@ -257,12 +257,12 @@ u8 h89bus_device::io_dispatch_r(offs_t offset)
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{
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{
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if (entry.m_p506_signals)
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if (entry.m_p506_signals)
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{
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{
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// p506 has FLPY but not CASS or LP
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// p506 does not have CASS or LP
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retval |= entry.read(decode & ~(H89_CASS | H89_LP), offset & 7);
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retval |= entry.read(decode & ~(H89_CASS | H89_LP), offset & 7);
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}
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}
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else
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else
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{
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{
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// p504/p505 have CASS and LP but not FLPY
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// p504/p505 does not have FLPY
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retval |= entry.read(decode & ~H89_FLPY , offset & 7);
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retval |= entry.read(decode & ~H89_FLPY , offset & 7);
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}
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}
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}
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}
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@ -295,12 +295,12 @@ void h89bus_device::io_dispatch_w(offs_t offset, u8 data)
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{
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{
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if (entry.m_p506_signals)
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if (entry.m_p506_signals)
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{
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{
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// p506 has FLPY but not CASS or LP1
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// p506 does not have CASS or LP
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entry.write(decode & ~H89_CASS, offset & 7, data);
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entry.write(decode & ~(H89_CASS | H89_LP), offset & 7, data);
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}
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}
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else
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else
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{
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{
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// p504/p505 have LP1 and CASS but not FLPY
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// p504/p505 does not have FLPY
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entry.write(decode & ~H89_FLPY, offset & 7, data);
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entry.write(decode & ~H89_FLPY, offset & 7, data);
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}
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}
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}
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}
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@ -26,7 +26,7 @@
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#define LOG_LINES (1U << 2)
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#define LOG_LINES (1U << 2)
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#define LOG_CASS (1U << 3)
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#define LOG_CASS (1U << 3)
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#define LOG_FUNC (1U << 4)
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#define LOG_FUNC (1U << 4)
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#define VERBOSE (0xff)
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#define VERBOSE (0)
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#include "logmacro.h"
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#include "logmacro.h"
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@ -213,4 +213,4 @@ void h89bus_sigmasoft_snd_device::device_add_mconfig(machine_config &config)
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} // anonymous namespace
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} // anonymous namespace
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DEFINE_DEVICE_TYPE_PRIVATE(H89BUS_SIGMASOFT_SND, device_h89bus_right_card_interface, h89bus_sigmasoft_snd_device, "h89sigmasnd", "SigmaSoft Sound Effects Board");
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DEFINE_DEVICE_TYPE_PRIVATE(H89BUS_SIGMASOFT_SND, device_h89bus_right_card_interface, h89bus_sigmasoft_snd_device, "h89_sigma_snd", "SigmaSoft Sound Effects Board");
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@ -2,9 +2,15 @@
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// copyright-holders:Mark Garlanger
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// copyright-holders:Mark Garlanger
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/***************************************************************************
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/***************************************************************************
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Heathkit Write enable pull
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Heathkit Write Enable pull up resistor
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On
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The H89 has a 1k floppy RAM which can be write protected. With the original
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equipment, the hard-sector controller card (H-88-1) could control the memory.
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In later systems, Heath/Zenith wanted to provide a system with only the soft-
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sectored controller (Z-89-37), but needed to allow writing to the floppy RAM.
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Heath provided a pullup resistor with the new controller, which allowed the
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memory to always be write enabled, this was installed on slot P506. Without
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this, HDOS is not bootable on Z-89-37 soft-sectored controller.
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****************************************************************************/
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****************************************************************************/
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@ -44,7 +44,6 @@
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#include "emu.h"
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#include "emu.h"
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#include "intr_cntrl.h"
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#include "intr_cntrl.h"
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//#include "mms77316_fdc.h"
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#include "sigmasoft_parallel_port.h"
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#include "sigmasoft_parallel_port.h"
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#include "tlb.h"
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#include "tlb.h"
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@ -63,7 +62,7 @@
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// Single Step
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// Single Step
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#define LOG_SS (1U << 1)
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#define LOG_SS (1U << 1)
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// #define VERBOSE ( LOG_SS )
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#define VERBOSE (0)
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#include "logmacro.h"
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#include "logmacro.h"
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#define LOGSS(...) LOGMASKED(LOG_SS, __VA_ARGS__)
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#define LOGSS(...) LOGMASKED(LOG_SS, __VA_ARGS__)
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@ -113,7 +112,7 @@ protected:
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bool m_rom_enabled;
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bool m_rom_enabled;
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bool m_timer_intr_enabled;
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bool m_timer_intr_enabled;
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bool m_single_step_enabled;
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bool m_single_step_enabled;
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bool m_floppy_ram_wp;
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bool m_floppy_ram_we;
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// single step flags
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// single step flags
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bool m_555a_latch;
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bool m_555a_latch;
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@ -151,6 +150,8 @@ protected:
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void set_wait_state(int data);
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void set_wait_state(int data);
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void set_fmwe(int data);
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u8 raise_NMI_r();
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u8 raise_NMI_r();
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void raise_NMI_w(u8 data);
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void raise_NMI_w(u8 data);
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void console_intr(int data);
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void console_intr(int data);
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@ -175,9 +176,6 @@ public:
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}
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}
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void h88(machine_config &config);
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void h88(machine_config &config);
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protected:
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void h88_io(address_map &map);
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};
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};
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@ -653,7 +651,7 @@ void h89_base_state::machine_start()
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save_item(NAME(m_rom_enabled));
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save_item(NAME(m_rom_enabled));
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save_item(NAME(m_timer_intr_enabled));
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save_item(NAME(m_timer_intr_enabled));
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save_item(NAME(m_single_step_enabled));
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save_item(NAME(m_single_step_enabled));
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save_item(NAME(m_floppy_ram_wp));
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save_item(NAME(m_floppy_ram_we));
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save_item(NAME(m_cpu_speed_multiplier));
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save_item(NAME(m_cpu_speed_multiplier));
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save_item(NAME(m_555a_latch));
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save_item(NAME(m_555a_latch));
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save_item(NAME(m_555b_latch));
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save_item(NAME(m_555b_latch));
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@ -700,6 +698,8 @@ void h89_base_state::machine_start()
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// remap the top 8k down to addr 0
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// remap the top 8k down to addr 0
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m_mem_view[2].install_ram(0x0000, 0x1fff, ram_ptr + ram_size - 0x2000);
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m_mem_view[2].install_ram(0x0000, 0x1fff, ram_ptr + ram_size - 0x2000);
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}
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}
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m_floppy_ram_we = false;
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}
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}
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void h89_base_state::machine_reset()
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void h89_base_state::machine_reset()
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@ -707,7 +707,6 @@ void h89_base_state::machine_reset()
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m_rom_enabled = true;
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m_rom_enabled = true;
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m_timer_intr_enabled = true;
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m_timer_intr_enabled = true;
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m_single_step_enabled = false;
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m_single_step_enabled = false;
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m_floppy_ram_wp = false;
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reset_single_step_state();
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reset_single_step_state();
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ioport_value const cfg(m_config->read());
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ioport_value const cfg(m_config->read());
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@ -747,6 +746,13 @@ void h89_base_state::set_wait_state(int data)
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}
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}
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}
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}
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void h89_base_state::set_fmwe(int data)
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{
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m_floppy_ram_we = bool(data);
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update_mem_view();
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}
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u8 h89_base_state::raise_NMI_r()
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u8 h89_base_state::raise_NMI_r()
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{
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{
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m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::from_usec(2));
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m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::from_usec(2));
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@ -792,7 +798,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(h89_base_state::h89_irq_timer)
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void h89_base_state::update_mem_view()
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void h89_base_state::update_mem_view()
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{
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{
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m_mem_view.select(m_rom_enabled ? (m_floppy_ram_wp ? 0 : 1) : 2);
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m_mem_view.select(m_rom_enabled ? (m_floppy_ram_we ? 1 : 0) : 2);
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}
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}
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void h89_base_state::reset_single_step_state()
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void h89_base_state::reset_single_step_state()
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@ -925,7 +931,7 @@ void h89_base_state::h89_base(machine_config &config)
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Z80(config, m_maincpu, H89_CLOCK);
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Z80(config, m_maincpu, H89_CLOCK);
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m_maincpu->set_m1_map(&h89_base_state::map_fetch);
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m_maincpu->set_m1_map(&h89_base_state::map_fetch);
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m_maincpu->set_memory_map(&h89_base_state::h89_mem);
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m_maincpu->set_memory_map(&h89_base_state::h89_mem);
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m_maincpu->set_io_map(&h88_state::h89_base_io);
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m_maincpu->set_io_map(&h89_base_state::h89_base_io);
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m_maincpu->set_irq_acknowledge_callback("intr_socket", FUNC(heath_intr_socket::irq_callback));
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m_maincpu->set_irq_acknowledge_callback("intr_socket", FUNC(heath_intr_socket::irq_callback));
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RAM(config, m_ram).set_default_size("64K").set_extra_options("16K,32K,48K").set_default_value(0x00);
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RAM(config, m_ram).set_default_size("64K").set_extra_options("16K,32K,48K").set_default_value(0x00);
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@ -955,7 +961,7 @@ void h89_base_state::h89_base(machine_config &config)
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m_h89bus->out_tlb_callback().set(m_console, FUNC(ins8250_device::ins8250_w));
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m_h89bus->out_tlb_callback().set(m_console, FUNC(ins8250_device::ins8250_w));
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m_h89bus->in_nmi_callback().set(FUNC(h89_base_state::raise_NMI_r));
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m_h89bus->in_nmi_callback().set(FUNC(h89_base_state::raise_NMI_r));
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m_h89bus->out_nmi_callback().set(FUNC(h89_base_state::raise_NMI_w));
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m_h89bus->out_nmi_callback().set(FUNC(h89_base_state::raise_NMI_w));
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m_h89bus->in_gpp_callback().set_ioport("SW501");
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m_h89bus->in_gpp_callback().set_ioport(m_sw501);
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m_h89bus->out_gpp_callback().set(FUNC(h89_base_state::port_f2_w));
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m_h89bus->out_gpp_callback().set(FUNC(h89_base_state::port_f2_w));
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m_h89bus->out_int3_callback().set(FUNC(h89_base_state::slot_irq<3>));
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m_h89bus->out_int3_callback().set(FUNC(h89_base_state::slot_irq<3>));
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m_h89bus->out_int4_callback().set(FUNC(h89_base_state::slot_irq<4>));
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m_h89bus->out_int4_callback().set(FUNC(h89_base_state::slot_irq<4>));
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@ -964,6 +970,7 @@ void h89_base_state::h89_base(machine_config &config)
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m_h89bus->out_fdcirq_callback().set(m_intr_socket, FUNC(heath_intr_socket::set_irq));
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m_h89bus->out_fdcirq_callback().set(m_intr_socket, FUNC(heath_intr_socket::set_irq));
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m_h89bus->out_fdcdrq_callback().set(m_intr_socket, FUNC(heath_intr_socket::set_drq));
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m_h89bus->out_fdcdrq_callback().set(m_intr_socket, FUNC(heath_intr_socket::set_drq));
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m_h89bus->out_blockirq_callback().set(m_intr_socket, FUNC(heath_intr_socket::block_interrupts));
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m_h89bus->out_blockirq_callback().set(m_intr_socket, FUNC(heath_intr_socket::block_interrupts));
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m_h89bus->out_fmwe_callback().set(FUNC(h89_base_state::set_fmwe));
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H89BUS_LEFT_SLOT(config, "p501", "h89bus", h89_left_cards, nullptr);
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H89BUS_LEFT_SLOT(config, "p501", "h89bus", h89_left_cards, nullptr);
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H89BUS_LEFT_SLOT(config, "p502", "h89bus", h89_left_cards, nullptr);
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H89BUS_LEFT_SLOT(config, "p502", "h89bus", h89_left_cards, nullptr);
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H89BUS_LEFT_SLOT(config, "p503", "h89bus", h89_left_cards, nullptr);
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H89BUS_LEFT_SLOT(config, "p503", "h89bus", h89_left_cards, nullptr);
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@ -991,8 +998,6 @@ void h89_state::h89(machine_config &config)
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h89_base(config);
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h89_base(config);
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m_h89bus->set_default_bios_tag("444-61");
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m_h89bus->set_default_bios_tag("444-61");
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m_maincpu->set_io_map(&h89_state::h89_base_io);
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m_intr_socket->set_default_option("h37");
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m_intr_socket->set_default_option("h37");
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m_intr_socket->set_fixed(true);
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m_intr_socket->set_fixed(true);
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