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igt/gkigt.cpp: cleanup video functions, hookup debug terminal as default
This commit is contained in:
angelosa
parent
88ce9cf0dc
commit
b4d6fa485d
1 changed files with 43 additions and 103 deletions
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@ -108,12 +108,12 @@ class igt_gameking_state : public driver_device
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{
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public:
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igt_gameking_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_palette(*this, "palette"),
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m_screen(*this, "screen"),
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m_vram(*this, "vram"),
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m_quart1(*this, "quart1")
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_palette(*this, "palette")
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, m_screen(*this, "screen")
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, m_vram(*this, "vram")
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, m_quart(*this, "quart%u", 1U)
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{ }
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void igt_gameking(machine_config &config);
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@ -121,23 +121,14 @@ public:
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private:
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virtual void video_start() override ATTR_COLD;
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uint32_t screen_update_igt_gameking(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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virtual void machine_start() override ATTR_COLD;
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virtual void machine_reset() override ATTR_COLD;
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uint32_t igt_gk_28010008_r()
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{
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return machine().rand(); // don't quite understand this one
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};
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uint32_t uart_status_r();
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void uart_w(uint32_t data);
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void irq_enable_w(uint8_t data);
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void irq_ack_w(uint8_t data);
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uint8_t irq_vector_r();
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void unk_w(uint8_t data);
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uint8_t frame_number_r();
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void vblank_irq(int state);
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uint8_t timer_r();
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@ -151,7 +142,7 @@ private:
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required_device<palette_device> m_palette;
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required_device<screen_device> m_screen;
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required_shared_ptr<uint32_t> m_vram;
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required_device<sc28c94_device> m_quart1;
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required_device_array<sc28c94_device, 2> m_quart;
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uint8_t m_irq_enable = 0;
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uint8_t m_irq_pend = 0;
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@ -162,40 +153,28 @@ void igt_gameking_state::video_start()
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{
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}
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uint32_t igt_gameking_state::screen_update_igt_gameking(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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uint32_t igt_gameking_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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bitmap.fill(m_palette->black_pen(), cliprect);
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for(int y = 0; y < 480; y++)
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for(int y = cliprect.min_y; y <= cliprect.max_y; y++)
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{
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for(int x = 0; x < 640; x+=4)
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for(int x = cliprect.min_x; x <= cliprect.max_x; x+=4)
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{
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for(int xi=0;xi<4;xi++)
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const u32 gfx_data = m_vram[(x + y * 1024) / 4];
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for(int xi = 0; xi < 4; xi++)
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{
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uint32_t const color = (m_vram[(x+y*1024)/4] >> (xi*8)) & 0xff;
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if(cliprect.contains(x+xi, y))
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bitmap.pix(y, x+xi) = m_palette->pen(color);
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uint32_t const color = (gfx_data >> (xi*8)) & 0xff;
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bitmap.pix(y, x+xi) = m_palette->pen(color);
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}
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}
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}
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return 0;
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}
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uint32_t igt_gameking_state::uart_status_r()
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{
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return 0x00040004;
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}
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void igt_gameking_state::uart_w(uint32_t data)
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{
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printf("%c", (data>>16) & 0x7f);
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}
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void igt_gameking_state::irq_enable_w(uint8_t data)
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{
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m_irq_enable = data;
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@ -213,25 +192,12 @@ uint8_t igt_gameking_state::irq_vector_r()
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return m_irq_pend;
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}
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uint8_t igt_gameking_state::frame_number_r()
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{
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// TODO: likely not right, checked in irq 0
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return 0;//m_screen->frame_number() & 7;
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}
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void igt_gameking_state::unk_w(uint8_t data)
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{
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// bit 7 toggled, unknown purpose
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}
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void igt_gameking_state::igt_gameking_map(address_map &map)
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{
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map(0x00000000, 0x0007ffff).flags(i960_cpu_device::BURST).rom().region("maincpu", 0);
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map(0x08000000, 0x081fffff).flags(i960_cpu_device::BURST).rom().region("game", 0);
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map(0x08200000, 0x083fffff).flags(i960_cpu_device::BURST).rom().region("plx", 0);
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// it's unclear how much of this is saved and how much total RAM there is.
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map(0x10000000, 0x1001ffff).flags(i960_cpu_device::BURST).ram().share("nvram");
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map(0x10020000, 0x17ffffff).flags(i960_cpu_device::BURST).ram();
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@ -246,26 +212,22 @@ void igt_gameking_state::igt_gameking_map(address_map &map)
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// 28050000: SOUND SEL
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// 28060000: COLOR SEL
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// 28070000: OUT SEL
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// map(0x28010000, 0x2801007f).rw("quart1", FUNC(sc28c94_device::read), FUNC(sc28c94_device::write)).umask32(0x00ff00ff);
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map(0x28010008, 0x2801000b).r(FUNC(igt_gameking_state::uart_status_r));
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map(0x2801001c, 0x2801001f).nopw();
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map(0x28010030, 0x28010033).r(FUNC(igt_gameking_state::uart_status_r)); // channel D
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map(0x28010034, 0x28010037).w(FUNC(igt_gameking_state::uart_w)); // channel D
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map(0x28010000, 0x2801007f).rw(m_quart[0], FUNC(sc28c94_device::read), FUNC(sc28c94_device::write)).umask32(0x00ff00ff);
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map(0x28020000, 0x280205ff).flags(i960_cpu_device::BURST).ram(); // CMOS?
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// map(0x28020000, 0x2802007f).r(FUNC(igt_gameking_state::igt_gk_28010008_r)).nopw();
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map(0x28030000, 0x28030003).portr("IN0");
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// map(0x28040000, 0x2804007f).rw("quart2", FUNC(sc28c94_device::read), FUNC(sc28c94_device::write)).umask32(0x00ff00ff);
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map(0x2804000a, 0x2804000a).w(FUNC(igt_gameking_state::unk_w));
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map(0x28040000, 0x2804007f).rw(m_quart[1], FUNC(sc28c94_device::read), FUNC(sc28c94_device::write)).umask32(0x00ff00ff);
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// TODO: these overlays should come from the QUART device
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// map(0x2804000a, 0x2804000a).w(FUNC(igt_gameking_state::unk_w));
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map(0x28040008, 0x28040008).rw(FUNC(igt_gameking_state::irq_vector_r), FUNC(igt_gameking_state::irq_enable_w));
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map(0x28040018, 0x2804001b).portr("IN1").nopw();
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map(0x2804001c, 0x2804001f).portr("IN4").nopw();
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map(0x28040028, 0x2804002b).nopr();
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// map(0x28040018, 0x2804001b).portr("IN1").nopw();
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// map(0x2804001c, 0x2804001f).portr("IN4").nopw();
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// map(0x28040028, 0x2804002b).nopr();
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map(0x2804002a, 0x2804002a).w(FUNC(igt_gameking_state::irq_ack_w));
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// map(0x28040038, 0x2804003b).r(FUNC(igt_gameking_state::timer_r)).umask32(0x00ff0000);
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map(0x28040038, 0x2804003b).portr("IN2").nopw();
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map(0x2804003c, 0x2804003f).portr("IN3").nopw();
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map(0x28040050, 0x28040050).r(FUNC(igt_gameking_state::frame_number_r));
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map(0x28040054, 0x28040057).nopw();
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// map(0x2804003c, 0x2804003f).portr("IN3").nopw();
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// map(0x28040050, 0x28040050).r(FUNC(igt_gameking_state::frame_number_r));
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// map(0x28040054, 0x28040057).nopw();
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// map(0x28040054, 0x28040057).w(FUNC(igt_gameking_state::irq_ack_w).umask32(0x000000ff);
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map(0x28050000, 0x28050003).rw("ymz", FUNC(ymz280b_device::read), FUNC(ymz280b_device::write)).umask32(0x00ff00ff);
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@ -425,24 +387,20 @@ static INPUT_PORTS_START( igt_gameking )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x010000, 0x010000, "Door M" ) // Door M
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PORT_DIPNAME( 0x010000, 0x000000, "Door M" ) // Door M
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PORT_DIPSETTING( 0x010000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x020000, 0x020000, "Door C" ) // Door C
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PORT_DIPNAME( 0x020000, 0x000000, "Door C" ) // Door C
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PORT_DIPSETTING( 0x020000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x040000, 0x040000, "Door B" ) // Door B
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PORT_DIPNAME( 0x040000, 0x000000, "Door B" ) // Door B
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PORT_DIPSETTING( 0x040000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x080000, 0x080000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x080000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x100000, 0x100000, "Attendant key" ) // key switch
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PORT_DIPSETTING( 0x100000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x000000, DEF_STR( On ) )
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PORT_DIPNAME( 0x200000, 0x200000, "test switch" ) // test switch
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PORT_DIPSETTING( 0x200000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x000000, DEF_STR( On ) )
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PORT_BIT( 0x100000, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Attendant key")
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PORT_BIT( 0x200000, IP_ACTIVE_LOW, IPT_SERVICE ) // Test switch
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PORT_DIPNAME( 0x400000, 0x400000, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x400000, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x000000, DEF_STR( On ) )
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@ -555,22 +513,6 @@ static INPUT_PORTS_START( igt_gameking )
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INPUT_PORTS_END
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static const gfx_layout igt_gameking_layout =
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{
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16,8,
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RGN_FRAC(1,1),
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4,
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{ 0,1,2,3 },
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{ 0*4,1*4,2*4,3*4,4*4,5*4,6*4,7*4,8*4,9*4,10*4,11*4,12*4,13*4,14*4,15*4 },
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{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64 },
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8*64
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};
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static GFXDECODE_START( gfx_igt_gameking )
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GFXDECODE_ENTRY( "cg", 0, igt_gameking_layout, 0x0, 1 )
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GFXDECODE_END
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void igt_gameking_state::ramdac_map(address_map &map)
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{
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map(0x000, 0x3ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w));
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@ -583,7 +525,7 @@ void igt_gameking_state::machine_start()
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void igt_gameking_state::machine_reset()
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{
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m_timer_count = 0;
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m_quart1->ip2_w(1); // needs to be high
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m_quart[0]->ip2_w(1); // needs to be high
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}
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void igt_gameking_state::vblank_irq(int state)
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@ -610,28 +552,26 @@ void igt_gameking_state::igt_gameking(machine_config &config)
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I960(config, m_maincpu, XTAL(24'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &igt_gameking_state::igt_gameking_map);
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SC28C94(config, m_quart1, XTAL(24'000'000) / 6);
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m_quart1->d_tx_cb().set("diag", FUNC(rs232_port_device::write_txd));
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sc28c94_device &quart2(SC28C94(config, "quart2", XTAL(24'000'000) / 6));
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quart2.irq_cb().set_inputline(m_maincpu, I960_IRQ0);
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rs232_port_device &diag(RS232_PORT(config, "diag", default_rs232_devices, nullptr));
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diag.rxd_handler().set("quart1", FUNC(sc28c94_device::rx_d_w));
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diag.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal));
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GFXDECODE(config, "gfxdecode", m_palette, gfx_igt_gameking);
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SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
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m_screen->set_refresh_hz(60);
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m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
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m_screen->set_size(1024, 512);
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m_screen->set_visarea(0, 640-1, 0, 480-1);
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m_screen->set_screen_update(FUNC(igt_gameking_state::screen_update_igt_gameking));
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m_screen->set_screen_update(FUNC(igt_gameking_state::screen_update));
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m_screen->set_palette(m_palette);
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m_screen->screen_vblank().set(FUNC(igt_gameking_state::vblank_irq));
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// Xilinx used as video chip XTAL(26'666'666) on board
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SC28C94(config, m_quart[0], XTAL(24'000'000) / 6);
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m_quart[0]->d_tx_cb().set("diag", FUNC(rs232_port_device::write_txd));
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SC28C94(config, m_quart[1], XTAL(24'000'000) / 6);
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m_quart[1]->irq_cb().set_inputline(m_maincpu, I960_IRQ0);
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rs232_port_device &diag(RS232_PORT(config, "diag", default_rs232_devices, "terminal"));
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diag.rxd_handler().set(m_quart[0], FUNC(sc28c94_device::rx_d_w));
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diag.set_option_device_input_defaults("terminal", DEVICE_INPUT_DEFAULTS_NAME(terminal));
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PALETTE(config, m_palette).set_entries(0x100);
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ramdac_device &ramdac(RAMDAC(config, "ramdac", 0, m_palette));
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