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docastle: update notes
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2 changed files with 28 additions and 13 deletions
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@ -117,7 +117,12 @@ Notes:
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TODO:
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TODO:
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-----
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-----
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- third CPU
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- Third CPU. According to schematics, it's a doorway for the sprite RAM. The
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main cpu actually doesn't have full access to sprite RAM. But instead, 0x9800
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to 0x9fff is a latch to the 3rd cpu. CPU3 reads 0x200 bytes from maincpu, and
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then passes it through (unmodified) presumedly to the sprite chip. It looks
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very much like hardware protection. And it's easy to circumvent in MAME by
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pretending the maincpu directly writes to sprite RAM.
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- docastle schematics say that maincpu(and cpu3) interrupt comes from the 6845
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- docastle schematics say that maincpu(and cpu3) interrupt comes from the 6845
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CURSOR pin. The cursor is configured at scanline 0, and causes the games to
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CURSOR pin. The cursor is configured at scanline 0, and causes the games to
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update the next video frame during active display. What is the culprit here?
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update the next video frame during active display. What is the culprit here?
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@ -151,6 +156,14 @@ TODO:
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- bad communication in idsoccer
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- bad communication in idsoccer
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- adpcm status in idsoccer
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- adpcm status in idsoccer
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- real values for the adpcm interface in idsoccer
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- real values for the adpcm interface in idsoccer
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- bad adpcm sound in attract mode for idsoccer clones (once you get them to boot up)
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- idsoccer clones lock up MAME after writing junk to CRTC. Workaround:
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idsoccera/idsoccert: maincpu bp 1120 -> pc=1123 -> run
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asoccer: maincpu bp 1120 -> pc=1135 -> run
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Or simply ROM_FILL(0x247, 1, 0x23 or 0x35 instead of 0x20) on the slave cpu (not
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guaranteed that a permanent ROM hack like this won't break anything).
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This 0x1120 is a return address written to the stack after communicating with
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the slave CPU. Maybe protection. See MT05419.
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2008-08
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2008-08
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@ -250,9 +263,8 @@ void docastle_state::docastle_map3(address_map &map)
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{
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{
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map(0x0000, 0x00ff).rom();
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map(0x0000, 0x00ff).rom();
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map(0x4000, 0x47ff).ram();
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map(0x4000, 0x47ff).ram();
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map(0x8000, 0x8008).r(FUNC(docastle_state::docastle_shared1_r)); // ???
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map(0x8000, 0x8000).nopr(); // latch from maincpu
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map(0xc003, 0xc003).noprw(); // EP according to schematics
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map(0xc000, 0xc7ff).noprw(); // sprite chip?
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map(0xc432, 0xc435).noprw(); // ???
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}
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}
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void docastle_state::docastle_io_map(address_map &map)
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void docastle_state::docastle_io_map(address_map &map)
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@ -78,13 +78,18 @@ void docastle_state::docastle_colorram_w(offs_t offset, uint8_t data)
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uint8_t docastle_state::inputs_flipscreen_r(offs_t offset)
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uint8_t docastle_state::inputs_flipscreen_r(offs_t offset)
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{
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{
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// inputs pass through LS244 non-inverting buffer
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uint8_t buf = 0xff;
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uint8_t buf = (m_inp[1]->read_h() << 4) | m_inp[0]->read_h();
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// LS273 latches address bits on rising edge of address decode
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if (!machine().side_effects_disabled())
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flip_screen_set(BIT(offset, 7));
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{
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m_inp[0]->write_s(offset & 7);
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// inputs pass through LS244 non-inverting buffer
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m_inp[1]->write_s(offset & 7);
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buf = (m_inp[1]->read_h() << 4) | m_inp[0]->read_h();
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// LS273 latches address bits on rising edge of address decode
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flip_screen_set(BIT(offset, 7));
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m_inp[0]->write_s(offset & 7);
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m_inp[1]->write_s(offset & 7);
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}
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return buf;
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return buf;
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}
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}
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@ -121,11 +126,9 @@ VIDEO_START_MEMBER(docastle_state,dorunrun)
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void docastle_state::draw_sprites( screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect )
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void docastle_state::draw_sprites( screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect )
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{
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{
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int offs;
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screen.priority().fill(1);
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screen.priority().fill(1);
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for (offs = m_spriteram.bytes() - 4; offs >= 0; offs -= 4)
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for (int offs = m_spriteram.bytes() - 4; offs >= 0; offs -= 4)
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{
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{
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int sx, sy, flipx, flipy, code, color;
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int sx, sy, flipx, flipy, code, color;
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