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Convert 7430 to macro module.

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This commit is contained in:
couriersud 2016-05-05 14:53:45 +02:00
parent 38d3050da0
commit add61d2a00
7 changed files with 87 additions and 139 deletions
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2
scripts/src/netlist.lua
View file

@ -86,8 +86,6 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/devices/nld_4020.h",
MAME_DIR .. "src/lib/netlist/devices/nld_4066.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_4066.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7430.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7430.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7448.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7448.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7450.cpp",

2
src/lib/netlist/devices/net_lib.cpp
View file

@ -98,7 +98,6 @@ void initialize_factory(factory_list_t &factory)
ENTRY(switch2, SWITCH2, "-")
ENTRY(nicRSFF, NETDEV_RSFF, "+S,R")
ENTRY(nicDelay, NETDEV_DELAY, "-")
ENTRY(7430, TTL_7430_NAND, "+A,B,C,D,E,F,G,H")
ENTRY(7450, TTL_7450_ANDORINVERT, "+A,B,C,D")
ENTRY(7486, TTL_7486_XOR, "+A,B")
ENTRY(7448, TTL_7448, "+A,B,C,D,LTQ,BIQ,RBIQ")
@ -127,7 +126,6 @@ void initialize_factory(factory_list_t &factory)
ENTRY(NE555, NE555, "-")
ENTRY(r2r_dac, R2R_DAC, "+VIN,R,N")
ENTRY(4538_dip, CD4538_DIP, "-")
ENTRY(7430_dip, TTL_7430_DIP, "-")
ENTRY(7448_dip, TTL_7448_DIP, "-")
ENTRY(7450_dip, TTL_7450_DIP, "-")
ENTRY(7474_dip, TTL_7474_DIP, "-")

1
src/lib/netlist/devices/net_lib.h
View file

@ -16,7 +16,6 @@
#include "nld_4020.h"
#include "nld_4066.h"
#include "nld_7430.h"
#include "nld_7448.h"
#include "nld_7450.h"
#include "nld_7474.h"

59
src/lib/netlist/devices/nld_7430.cpp
View file

@ -1,59 +0,0 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_7430.c
*
*/
#include "nld_7430.h"
NETLIB_NAMESPACE_DEVICES_START()
#if (USE_TRUTHTABLE)
nld_7430::truthtable_t nld_7430::m_ttbl;
const char *nld_7430::m_desc[] = {
"A,B,C,D,E,F,G,H|Q ",
"0,X,X,X,X,X,X,X|1|22",
"X,0,X,X,X,X,X,X|1|22",
"X,X,0,X,X,X,X,X|1|22",
"X,X,X,0,X,X,X,X|1|22",
"X,X,X,X,0,X,X,X|1|22",
"X,X,X,X,X,0,X,X|1|22",
"X,X,X,X,X,X,0,X|1|22",
"X,X,X,X,X,X,X,0|1|22",
"1,1,1,1,1,1,1,1|0|15",
""
};
#endif
NETLIB_START(7430_dip)
{
register_sub("1", m_1);
register_subalias("1", m_1->m_I[0]);
register_subalias("2", m_1->m_I[1]);
register_subalias("3", m_1->m_I[2]);
register_subalias("4", m_1->m_I[3]);
register_subalias("5", m_1->m_I[4]);
register_subalias("6", m_1->m_I[5]);
register_subalias("8", m_1->m_Q[0]);
register_subalias("11", m_1->m_I[6]);
register_subalias("12", m_1->m_I[7]);
}
NETLIB_UPDATE(7430_dip)
{
/* only called during startup */
m_1->update_dev();
}
NETLIB_RESET(7430_dip)
{
m_1->do_reset();
}
NETLIB_NAMESPACE_DEVICES_END()

75
src/lib/netlist/devices/nld_7430.h
View file

@ -1,75 +0,0 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_7430.h
*
* DM7430: 8-Input NAND Gate
*
* +--------------+
* A |1 ++ 14| VCC
* B |2 13| NC
* C |3 12| H
* D |4 7430 11| G
* E |5 10| NC
* F |6 9| NC
* GND |7 8| Y
* +--------------+
* ________
* Y = ABCDEFGH
* +---+---+---+---+---+---+---+---++---+
* | A | B | C | D | E | F | G | H || Y |
* +===+===+===+===+===+===+===+===++===+
* | X | X | X | X | X | X | X | 0 || 1 |
* | X | X | X | X | X | X | 0 | X || 1 |
* | X | X | X | X | X | 0 | X | X || 1 |
* | X | X | X | X | 0 | X | X | X || 1 |
* | X | X | X | 0 | X | X | X | X || 1 |
* | X | X | 0 | X | X | X | X | X || 1 |
* | X | 0 | X | X | X | X | X | X || 1 |
* | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 || 0 |
* +---+---+---+---+---+---+---+---++---+
*
* Naming conventions follow National Semiconductor datasheet
*
*/
#ifndef NLD_7430_H_
#define NLD_7430_H_
#include "nld_signal.h"
#include "nld_truthtable.h"
#define TTL_7430_NAND(_name, _I1, _I2, _I3, _I4, _I5, _I6, _I7, _I8) \
NET_REGISTER_DEV(TTL_7430_NAND, _name) \
NET_CONNECT(_name, A, _I1) \
NET_CONNECT(_name, B, _I2) \
NET_CONNECT(_name, C, _I3) \
NET_CONNECT(_name, D, _I4) \
NET_CONNECT(_name, E, _I5) \
NET_CONNECT(_name, F, _I6) \
NET_CONNECT(_name, G, _I7) \
NET_CONNECT(_name, H, _I8)
#define TTL_7430_DIP(_name) \
NET_REGISTER_DEV(TTL_7430_DIP, _name)
NETLIB_NAMESPACE_DEVICES_START()
#if (USE_TRUTHTABLE)
NETLIB_TRUTHTABLE(7430, 8, 1, 0);
#else
NETLIB_SIGNAL(7430, 8, 0, 0);
#endif
NETLIB_DEVICE(7430_dip,
NETLIB_SUB(7430) m_1;
);
NETLIB_NAMESPACE_DEVICES_END()
#endif /* NLD_7430_H_ */

69
src/lib/netlist/macro/nlm_ttl74xx.cpp
View file

@ -381,6 +381,46 @@ NETLIST_START(TTL_7427_DIP)
)
NETLIST_END()
/*
* DM7430: 8-Input NAND Gate
*
* ________
* Y = ABCDEFGH
* +---+---+---+---+---+---+---+---++---+
* | A | B | C | D | E | F | G | H || Y |
* +===+===+===+===+===+===+===+===++===+
* | X | X | X | X | X | X | X | 0 || 1 |
* | X | X | X | X | X | X | 0 | X || 1 |
* | X | X | X | X | X | 0 | X | X || 1 |
* | X | X | X | X | 0 | X | X | X || 1 |
* | X | X | X | 0 | X | X | X | X || 1 |
* | X | X | 0 | X | X | X | X | X || 1 |
* | X | 0 | X | X | X | X | X | X || 1 |
* | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 || 0 |
* +---+---+---+---+---+---+---+---++---+
*
* Naming conventions follow National Semiconductor datasheet
*/
NETLIST_START(TTL_7430_DIP)
TTL_7430_GATE(s1)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DUMMY_INPUT(NC)
DIPPINS( /* +--------------+ */
s1.A, /* A |1 ++ 14| VCC */ VCC.I,
s1.B, /* B |2 13| NC */ NC.I,
s1.C, /* C |3 12| H */ s1.H,
s1.D, /* D |4 7420 11| G */ s1.G,
s1.E, /* E |5 10| NC */ NC.I,
s1.F, /* F |6 9| NC */ NC.I,
GND.I, /* GND |7 8| Y */ s1.Q
/* +--------------+ */
)
NETLIST_END()
/*
* DM7432: Quad 2-Input OR Gates
*
@ -629,6 +669,34 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7430_GATE, 8, 1, 0, "")
TT_HEAD("A,B,C,D,E,F,G,H|Q ")
TT_LINE("0,X,X,X,X,X,X,X|1|22")
TT_LINE("X,0,X,X,X,X,X,X|1|22")
TT_LINE("X,X,0,X,X,X,X,X|1|22")
TT_LINE("X,X,X,0,X,X,X,X|1|22")
TT_LINE("X,X,X,X,0,X,X,X|1|22")
TT_LINE("X,X,X,X,X,0,X,X|1|22")
TT_LINE("X,X,X,X,X,X,0,X|1|22")
TT_LINE("X,X,X,X,X,X,X,0|1|22")
TT_LINE("1,1,1,1,1,1,1,1|0|15")
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7430_NAND, 8, 1, 0, "A,B,C,D,E,F,G,H")
TT_HEAD("A,B,C,D,E,F,G,H|Q ")
TT_LINE("0,X,X,X,X,X,X,X|1|22")
TT_LINE("X,0,X,X,X,X,X,X|1|22")
TT_LINE("X,X,0,X,X,X,X,X|1|22")
TT_LINE("X,X,X,0,X,X,X,X|1|22")
TT_LINE("X,X,X,X,0,X,X,X|1|22")
TT_LINE("X,X,X,X,X,0,X,X|1|22")
TT_LINE("X,X,X,X,X,X,0,X|1|22")
TT_LINE("X,X,X,X,X,X,X,0|1|22")
TT_LINE("1,1,1,1,1,1,1,1|0|15")
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7432_GATE, 2, 1, 0, "")
TT_HEAD("A,B|Q ")
TT_LINE("1,X|1|22")
@ -675,6 +743,7 @@ NETLIST_START(TTL74XX_lib)
LOCAL_LIB_ENTRY(TTL_7420_DIP)
LOCAL_LIB_ENTRY(TTL_7425_DIP)
LOCAL_LIB_ENTRY(TTL_7427_DIP)
LOCAL_LIB_ENTRY(TTL_7430_DIP)
LOCAL_LIB_ENTRY(TTL_7432_DIP)
LOCAL_LIB_ENTRY(TTL_7437_DIP)
NETLIST_END()

18
src/lib/netlist/macro/nlm_ttl74xx.h
View file

@ -132,6 +132,24 @@
NET_REGISTER_DEV(TTL_7427_DIP, _name)
#define TTL_7430_GATE(_name) \
NET_REGISTER_DEV(TTL_7430_GATE, _name)
#define TTL_7430_NAND(_name, _I1, _I2, _I3, _I4, _I5, _I6, _I7, _I8) \
NET_REGISTER_DEV(TTL_7430_NAND, _name) \
NET_CONNECT(_name, A, _I1) \
NET_CONNECT(_name, B, _I2) \
NET_CONNECT(_name, C, _I3) \
NET_CONNECT(_name, D, _I4) \
NET_CONNECT(_name, E, _I5) \
NET_CONNECT(_name, F, _I6) \
NET_CONNECT(_name, G, _I7) \
NET_CONNECT(_name, H, _I8)
#define TTL_7430_DIP(_name) \
NET_REGISTER_DEV(TTL_7430_DIP, _name)
#define TTL_7432_GATE(_name) \
NET_REGISTER_DEV(TTL_7432_OR, _name)