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qbus: Add dump of Matrox QG-640 Color Display Processor Card and skeleton device implementation [AJR, Bitsavers]
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parent
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commit
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4 changed files with 166 additions and 2 deletions
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@ -4625,6 +4625,8 @@ if (BUSES["QBUS"]~=null) then
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MAME_DIR .. "src/devices/bus/qbus/pc11.h",
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MAME_DIR .. "src/devices/bus/qbus/qbus.cpp",
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MAME_DIR .. "src/devices/bus/qbus/qbus.h",
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MAME_DIR .. "src/devices/bus/qbus/qg640.cpp",
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MAME_DIR .. "src/devices/bus/qbus/qg640.h",
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MAME_DIR .. "src/devices/bus/qbus/qtx.cpp",
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MAME_DIR .. "src/devices/bus/qbus/qtx.h",
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}
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@ -12,10 +12,11 @@
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// Peripheral boards
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#include "dsd4432.h"
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#include "pc11.h"
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#include "qtx.h"
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#include "dvk_kgd.h"
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#include "dvk_mx.h"
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#include "pc11.h"
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#include "qg640.h"
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#include "qtx.h"
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void qbus_cards(device_slot_interface &device)
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@ -25,6 +26,7 @@ void qbus_cards(device_slot_interface &device)
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device.option_add("dsd4432", DSD4432);
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device.option_add("kgd", DVK_KGD);
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device.option_add("mx", DVK_MX);
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device.option_add("qg640", MATROX_QG640);
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}
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106
src/devices/bus/qbus/qg640.cpp
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106
src/devices/bus/qbus/qg640.cpp
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@ -0,0 +1,106 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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/**********************************************************************
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Matrox QG-640 640×480×8 graphics card (skeleton)
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**********************************************************************/
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#include "emu.h"
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#include "qg640.h"
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#include "cpu/ns32000/ns32000.h"
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#include "screen.h"
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// device type definition
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DEFINE_DEVICE_TYPE(MATROX_QG640, qg640_device, "qg640", "Matrox QG-640 Color Display Processor Card")
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qg640_device::qg640_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: device_t(mconfig, MATROX_QG640, tag, owner, clock)
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, device_qbus_card_interface(mconfig, *this)
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, m_qgcpu(*this, "qgcpu")
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, m_fifo(*this, "fifo")
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, m_acrtc(*this, "acrtc")
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, m_clut(*this, "clut%u", 1U)
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{
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}
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void qg640_device::device_start()
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{
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}
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u32 qg640_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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return 0;
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}
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u8 qg640_device::status_r()
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{
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return 0;
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}
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void qg640_device::unknown_w(u8 data)
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{
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logerror("%s: unknown_w 0x%02X\n", machine().describe_context(), data);
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}
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void qg640_device::clut_w(offs_t offset, u8 data)
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{
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m_clut[BIT(offset, 18)]->write(BIT(offset, 16, 2), data);
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}
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u16 qg640_device::acrtc_r(offs_t offset)
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{
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return m_acrtc->read16(!BIT(offset, 17));
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}
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void qg640_device::acrtc_w(offs_t offset, u16 data)
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{
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m_acrtc->write16(!BIT(offset, 17), data);
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}
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void qg640_device::mem_map(address_map &map)
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{
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map(0x000000, 0x01ffff).rom().region("firmware", 0);
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map(0x400000, 0x400000).r(FUNC(qg640_device::status_r));
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map(0x500000, 0x500000).w(FUNC(qg640_device::unknown_w));
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map(0x600000, 0x600000).select(0x70000).w(FUNC(qg640_device::clut_w));
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map(0x780000, 0x780001).select(0x40000).rw(FUNC(qg640_device::acrtc_r), FUNC(qg640_device::acrtc_w));
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map(0xc00000, 0xc1ffff).ram(); // 4x OKI M41464-12
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}
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void qg640_device::videoram_map(address_map &map)
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{
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map(0x00000, 0x7ffff).ram(); // 10x HM53461P-12
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}
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void qg640_device::device_add_mconfig(machine_config &config)
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{
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NS32016(config, m_qgcpu, 18.432_MHz_XTAL / 2); // NS32016N-10 + NS32C201D-10C
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m_qgcpu->set_addrmap(AS_PROGRAM, &qg640_device::mem_map);
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IDT7201(config, m_fifo);
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_raw(50_MHz_XTAL / 2, 816, 0, 640, 510, 0, 480); // 25 MHz pixel clock, 30.63 kHz horizontal, 60.07 Hz vertical
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screen.set_screen_update(FUNC(qg640_device::screen_update));
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HD63484(config, m_acrtc, 50_MHz_XTAL / 8); // SCC63484C8N64; divider unknown
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m_acrtc->set_screen("screen");
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m_acrtc->set_addrmap(0, &qg640_device::videoram_map);
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BT471(config, m_clut[0], 0); // IMSG170P-35
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BT471(config, m_clut[1], 0); // IMSG170P-35
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}
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ROM_START(qg640)
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ROM_REGION16_LE(0x20000, "firmware", 0)
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// "COPYRIGHT (C) 1985 Matrox Electronics, Ltd." (agrees with board copyright date; EPROMs and most other ICs have 1989 date codes, however)
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ROM_LOAD16_BYTE("504-8.bin", 0x00000, 0x10000, CRC(213c5804) SHA1(6ab86aeda47d148dd85a548ef716c98b61c53a1a)) // TMS27C512JL
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ROM_LOAD16_BYTE("505-8.bin", 0x00001, 0x10000, CRC(73610833) SHA1(815b195c37ca1053e5cddfa1efd4764c4550f4b5)) // TMS27C512JL
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ROM_END
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const tiny_rom_entry *qg640_device::device_rom_region() const
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{
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return ROM_NAME(qg640);
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}
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54
src/devices/bus/qbus/qg640.h
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54
src/devices/bus/qbus/qg640.h
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@ -0,0 +1,54 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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#ifndef MAME_BUS_QBUS_QG640_H
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#define MAME_BUS_QBUS_QG640_H
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#pragma once
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#include "qbus.h"
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#include "machine/7200fifo.h"
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#include "video/bt47x.h"
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#include "video/hd63484.h"
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> qg640_device
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class qg640_device : public device_t, public device_qbus_card_interface
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{
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public:
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// device type constructor
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qg640_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_add_mconfig(machine_config &config) override;
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virtual const tiny_rom_entry *device_rom_region() const override;
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private:
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u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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u8 status_r();
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void unknown_w(u8 data);
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void clut_w(offs_t offset, u8 data);
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u16 acrtc_r(offs_t offset);
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void acrtc_w(offs_t offset, u16 data);
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void mem_map(address_map &map);
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void videoram_map(address_map &map);
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required_device<cpu_device> m_qgcpu;
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required_device<idt7201_device> m_fifo;
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required_device<hd63484_device> m_acrtc;
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required_device_array<bt47x_device_base, 2> m_clut;
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};
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// device type declaration
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DECLARE_DEVICE_TYPE(MATROX_QG640, qg640_device)
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#endif // MAME_BUS_QBUS_QG640_H
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